| Commit message (Collapse) | Author | Age | Files | Lines |
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change, now you need a TargetOptions object to create a TargetMachine. Clang
patch to follow.
One small functionality change in PTX. PTX had commented out the machine
verifier parts in their copy of printAndVerify. That now calls the version in
LLVMTargetMachine. Users of PTX who need verification disabled should rely on
not passing the command-line flag to enable it.
llvm-svn: 145714
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Like V_SET0, these instructions are expanded by ExpandPostRA to xorps /
vxorps so they can participate in execution domain swizzling.
This also makes the AVX variants redundant.
llvm-svn: 145440
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it fails to emit a store. This fixes <rdar://problem/10215997>.
llvm-svn: 142432
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llvm-svn: 141749
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an alias involves thread-local storage. (I'm not entirely sure how this is supposed to work, but this patch makes fast-isel consistent with the normal isel path.)
llvm-svn: 140355
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llvm-svn: 139062
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missing from fast-isel.
llvm-svn: 139044
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Krasin!
llvm-svn: 136663
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llvm-svn: 136653
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llvm-svn: 135375
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We would put the return value from long double functions in the wrong
register.
This fixes gcc.c-torture/execute/conversion.c
llvm-svn: 134205
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llvm-svn: 134030
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sink them into MC layer.
- Added MCInstrInfo, which captures the tablegen generated static data. Chang
TargetInstrInfo so it's based off MCInstrInfo.
llvm-svn: 134021
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Drop the FpMov instructions, use plain COPY instead.
Drop the FpSET/GET instruction for accessing fixed stack positions.
Instead use normal COPY to/from ST registers around inline assembly, and
provide a single new FpPOP_RETVAL instruction that can access the return
value(s) from a call. This is still necessary since you cannot tell from
the CALL instruction alone if it returns anything on the FP stack. Teach
fast isel to use this.
This provides a much more robust way of handling fixed stack registers -
we can tolerate arbitrary FP stack instructions inserted around calls
and inline assembly. Live range splitting could sometimes break x87 code
by inserting spill code in unfortunate places.
As a bonus we handle floating point inline assembly correctly now.
llvm-svn: 134018
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llvm-svn: 133726
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memcpy/memset symbol doesn't get marked up correctly in PIC modes otherwise.
Should fix llvm-x86_64-linux-checks buildbot. Followup to r132864.
llvm-svn: 132869
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rdar://9431466
llvm-svn: 132864
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No functional change.
Part of PR6965
llvm-svn: 132763
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simpler and more consistent.
The practical effects here are that x86-64 fast-isel can now handle trunc from i8 to i1, and ARM fast-isel can handle many more constructs involving integers narrower than 32 bits (including loads, stores, and many integer casts).
rdar://9437928 .
llvm-svn: 132099
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llvm-svn: 131764
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llvm-svn: 131689
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llvm-svn: 131597
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llvm-svn: 131596
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This is r131438 with a couple small fixes.
llvm-svn: 131474
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it more tomorrow.
llvm-svn: 131451
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llvm-svn: 131438
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llvm-svn: 131420
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intrinsic from the x86 code to the generic code.
llvm-svn: 131332
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to being bottom-up (a very long time ago).
llvm-svn: 131329
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rdar://problem/9303592 .
llvm-svn: 130429
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llvm-svn: 130412
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rdar://problem/9303592 .
llvm-svn: 130348
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common. rdar://problem/9303592 .
llvm-svn: 130338
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length. (I'm planning to use this to implement byval.)
llvm-svn: 130274
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rdar://problem/9303306 .
llvm-svn: 130272
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triple component.
llvm-svn: 129838
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llvm-svn: 129813
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llvm-svn: 129765
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generated
en-mass for C++ PODs. On my c++ test file, this cuts the fast isel rejects by 10x
and shrinks the generated .s file by 5%
llvm-svn: 129755
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llvm-svn: 129753
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are illegal,
when they are a truncate from something else. This eliminates fully half of all the
fastisel rejections on a test c++ file I'm working with, which should make a substantial
improvement for -O0 compile of c++ code.
This fixed rdar://9297003 - fast isel bails out on all functions taking bools
llvm-svn: 129752
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Before we would bail out on i1 arguments all together, now we just bail on
non-constant ones. Also, we used to emit extraneous code. e.g. test12 was:
movb $0, %al
movzbl %al, %edi
callq _test12
and test13 was:
movb $0, %al
xorl %edi, %edi
movb %al, 7(%rsp)
callq _test13f
Now we get:
movl $0, %edi
callq _test12
and:
movl $0, %edi
callq _test13f
llvm-svn: 129751
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testb $1, %al
je LBB0_2
## BB#1: ## %if.then
movb $0, %al
instead of:
testb $1, %al
jne LBB0_1
jmp LBB0_2
LBB0_1: ## %if.then
movb $0, %al
how 'bout that.
llvm-svn: 129749
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a common cause of fast isel rejects on c++ code.
llvm-svn: 129748
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2. implement rdar://9289501 - fast isel should fold trivial multiplies to shifts
3. teach tblgen to handle shift immediates that are different sizes than the
shifted operands, eliminating some code from the X86 fast isel backend.
4. Have FastISel::SelectBinaryOp use (the poorly named) FastEmit_ri_ function
instead of FastEmit_ri to simplify code.
llvm-svn: 129666
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when we have a global variable base an an index. Instead, just give up on
folding the global variable.
Before we'd geenrate:
_test: ## @test
## BB#0:
movq _rtx_length@GOTPCREL(%rip), %rax
leaq (%rax), %rax
addq %rdi, %rax
movzbl (%rax), %eax
ret
now we generate:
_test: ## @test
## BB#0:
movq _rtx_length@GOTPCREL(%rip), %rax
movzbl (%rax,%rdi), %eax
ret
The difference is even more significant when there is a scale
involved.
This fixes rdar://9289558 - total fail with addr mode formation at -O0/x86-64
llvm-svn: 129664
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less trivial things) into a dummy lea. Before we generated:
_test: ## @test
movq _G@GOTPCREL(%rip), %rax
leaq (%rax), %rax
ret
now we produce:
_test: ## @test
movq _G@GOTPCREL(%rip), %rax
ret
This is part of rdar://9289558
llvm-svn: 129662
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llvm-svn: 129661
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llvm-svn: 129271
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outside of the current basic block. This fixes PR9500, rdar://9156159.
llvm-svn: 128041
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