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* Fix MachineCodeEmitter to use uintptr_t instead of intptr_t. This avoids ↵Evan Cheng2008-12-101-1/+1
| | | | | | some overflow issues. Patch by Thomas Jablin. llvm-svn: 60828
* Eliminate a compile time warning.Evan Cheng2008-11-191-4/+6
| | | | llvm-svn: 59677
* Fix indentation.Dan Gohman2008-11-101-1/+1
| | | | llvm-svn: 59004
* Rename isGVNonLazyPtr to isIndirectSym to reflect how it will be used.Evan Cheng2008-11-101-13/+13
| | | | llvm-svn: 58949
* Rename isGVLazyPtr to isGVNonLazyPtr relocation. This represents Mac OS XEvan Cheng2008-11-051-16/+16
| | | | | | indirect gv reference. Please don't call it lazy. llvm-svn: 58746
* x86_64 rip-relative and magic mode addressMon P Wang2008-10-311-4/+8
| | | | llvm-svn: 58528
* Generate code for TLS instructions.Nicolas Geoffray2008-10-251-0/+17
| | | | llvm-svn: 58141
* Fix constant-offset emission for x86-64 absolute addresses. ThisDan Gohman2008-10-241-11/+19
| | | | | | | fixes a bunch of test-suite JIT failures on x86-64 in -relocation-model=static mode. llvm-svn: 58066
* Fix lfence and mfence encoding. These look like MRM5r and MRM6r instructions ↵Evan Cheng2008-10-171-3/+15
| | | | | | except they do not have any operands. The RegModRM byte is encoded with register number 0. llvm-svn: 57692
* Update size of inst correctly with segment override.Anton Korobeynikov2008-10-121-0/+2
| | | | llvm-svn: 57414
* Fix comment typo.Duncan Sands2008-10-111-1/+1
| | | | llvm-svn: 57381
* Add ability to override segment (mostly for code emitter purposes).Anton Korobeynikov2008-10-111-0/+10
| | | | llvm-svn: 57380
* Switch the MachineOperand accessors back to the short names likeDan Gohman2008-10-031-30/+30
| | | | | | isReg, etc., from isRegister, etc. llvm-svn: 57006
* Tidy up several unbeseeming casts from pointer to intptr_t.Dan Gohman2008-09-041-2/+2
| | | | llvm-svn: 55779
* Allow inline asm nodes with empty bodies inside JIT.Anton Korobeynikov2008-08-211-2/+6
| | | | | | | This unbreaks explicit reg vars inside JIT, which are implemented in such hacky way :) llvm-svn: 55128
* Clean up whitespace.Bill Wendling2008-08-211-5/+7
| | | | llvm-svn: 55117
* Make x86-64 JIT changes Darwin-specific.Dale Johannesen2008-08-121-1/+12
| | | | llvm-svn: 54700
* In the absence of a linker to build the GOT, use the 32-bitDale Johannesen2008-08-121-1/+3
| | | | | | | non_lazy_ptr mechanism on x86-64 Darwin JIT. Fixes a bunch of last night's failures. llvm-svn: 54692
* Some fixes for x86-64 JIT. Make it use small codeDale Johannesen2008-08-111-12/+8
| | | | | | | | | | | | model, except for external calls; this makes addressing modes PC-relative. Incomplete. The assertion at the top of Emitter::runOnMachineFunction was obviously bogus (always true) so I removed it. If someone knows what the correct test should be to cover all the various targets, please fix. llvm-svn: 54656
* Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminatingDan Gohman2008-07-011-1/+2
| | | | | | | | | | | | | | | | the need for a flavor operand, and add a new SDNode subclass, LabelSDNode, for use with them to eliminate the need for a label id operand. Change instruction selection to let these label nodes through unmodified instead of creating copies of them. Teach the MachineInstr emitter how to emit a MachineInstr directly from an ISD label node. This avoids the need for allocating SDNodes for the label id and flavor value, as well as SDNodes for each of the post-isel label, label id, and label flavor. llvm-svn: 52943
* runOnMachineFunction should set IsPIC because relocation model may have been ↵Evan Cheng2008-05-201-0/+1
| | | | | | changed. llvm-svn: 51291
* Change target-specific classes to use more precise static types.Dan Gohman2008-05-141-7/+7
| | | | | | | This eliminates the need for several awkward casts, including the last dynamic_cast under lib/Target. llvm-svn: 51091
* - Fix atomic operation JIT encoding.Evan Cheng2008-04-181-1/+4
| | | | | | - Remove unused instructions. llvm-svn: 49921
* Infrastructure for getting the machine code size of a function and an ↵Nicolas Geoffray2008-04-161-147/+12
| | | | | | instruction. X86, PowerPC and ARM are implemented llvm-svn: 49809
* Fix x86-64 encoding bug. REX prefix must always follow 0x0F prefix. For ↵Evan Cheng2008-04-031-10/+13
| | | | | | example, extractps in 64bit mode: 66 REX 0F 3A 17, not 66 0F 3A REX 17. llvm-svn: 49157
* Unbreak JIT. Ignore TargetInstrInfo::IMPLICIT_DEF.Evan Cheng2008-03-171-0/+1
| | | | llvm-svn: 48447
* Replace all target specific implicit def instructions with a target ↵Evan Cheng2008-03-151-8/+0
| | | | | | independent one: TargetInstrInfo::IMPLICIT_DEF. llvm-svn: 48380
* Add debugging stuff.Evan Cheng2008-03-141-0/+4
| | | | llvm-svn: 48359
* Ignore debugging related instructions if they get this far.Evan Cheng2008-03-051-0/+4
| | | | llvm-svn: 47934
* Rather than asserting. Dump out the MI that we are not able to encode and abort.Evan Cheng2008-03-051-1/+6
| | | | llvm-svn: 47933
* Add lock prefix support to x86. Also add the instructions necessary for the ↵Andrew Lenharth2008-03-011-0/+3
| | | | | | atomic ops. They are still marked pseudo, since I cannot figure out what format to use, but they are the correct opcode. llvm-svn: 47795
* De-tabifyBill Wendling2008-02-261-2/+2
| | | | llvm-svn: 47600
* Enable exception handling int JITNicolas Geoffray2008-02-131-5/+12
| | | | llvm-svn: 47079
* Avoid needlessly casting away const qualifiers.Dan Gohman2008-02-081-3/+3
| | | | llvm-svn: 46877
* IMPLICIT_USE and IMPLICIT_DEF are dead, remove them.Chris Lattner2008-01-101-2/+0
| | | | llvm-svn: 45838
* rename TargetInstrDescriptor -> TargetInstrDesc.Chris Lattner2008-01-071-12/+12
| | | | | | | Make MachineInstr::getDesc return a reference instead of a pointer, since it can never be null. llvm-svn: 45695
* rename hasVariableOperands() -> isVariadic(). Add some comments.Chris Lattner2008-01-071-2/+1
| | | | | | | Evan, please review the comments I added to getNumDefs to make sure that they are accurate, thx. llvm-svn: 45687
* Move a bunch more accessors from TargetInstrInfo to TargetInstrDescriptorChris Lattner2008-01-071-2/+2
| | | | llvm-svn: 45680
* Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflectsChris Lattner2008-01-071-2/+2
| | | | | | | | | | | | | | | that it is cheap and efficient to get. Move a variety of predicates from TargetInstrInfo into TargetInstrDescriptor, which makes it much easier to query a predicate when you don't have TII around. Now you can use MI->getDesc()->isBranch() instead of going through TII, and this is much more efficient anyway. Not all of the predicates have been moved over yet. Update old code that used MI->getInstrDescriptor()->Flags to use the new predicates in many places. llvm-svn: 45674
* X86 JIT PIC jumptable support.Evan Cheng2008-01-051-9/+14
| | | | llvm-svn: 45616
* Combine MovePCtoStack + POP32r into one instruction MOVPC32r so it can be ↵Evan Cheng2008-01-051-14/+23
| | | | | | moved if needed. llvm-svn: 45605
* Unbreak tailcall opt in JIT.Evan Cheng2008-01-041-1/+2
| | | | llvm-svn: 45576
* X86 PIC JIT support fixes: encoding bugs, add lazy pointer stubs support.Evan Cheng2008-01-041-30/+53
| | | | llvm-svn: 45575
* Change MachineRelocation::DoesntNeedFnStub to NeedStub. This fields will be usedEvan Cheng2008-01-031-48/+48
| | | | | | for non-function GV relocations that require function address stubs (e.g. Mac OS X in non-static mode). llvm-svn: 45527
* X86 PIC JIT bug fix: relocations for constantpool and jumptable.Evan Cheng2008-01-021-7/+6
| | | | llvm-svn: 45515
* Add new shorter predicates for testing machine operands for various types: Chris Lattner2007-12-301-11/+11
| | | | | | | | | | | | e.g. MO.isMBB() instead of MO.isMachineBasicBlock(). I don't plan on switching everything over, so new clients should just start using the shorter names. Remove old long accessors, switching everything over to use the short accessor: getMachineBasicBlock() -> getMBB(), getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc. llvm-svn: 45464
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+2
| | | | llvm-svn: 45418
* Preliminary PIC JIT support for X86 (32-bit) / Darwin.Evan Cheng2007-12-221-61/+70
| | | | llvm-svn: 45313
* Add parameter to getDwarfRegNum to permit targetsDale Johannesen2007-11-131-1/+0
| | | | | | | | to use different mappings for EH and debug info; no functional change yet. Fix warning in X86CodeEmitter. llvm-svn: 44056
* Fix x86-64 jit: remove reliance on Dwarf numbers.Evan Cheng2007-11-131-6/+13
| | | | llvm-svn: 44048
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