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* Remove the X86::FP_REG_KILL pseudo-instruction and the X86FloatingPointRegKillJakob Stoklund Olesen2010-07-161-5/+0
| | | | | | | | | pass that inserted it. It is no longer necessary to limit the live ranges of FP registers to a single basic block. llvm-svn: 108536
* Reapply bottom-up fast-isel, with several fixes for x86-32:Dan Gohman2010-07-101-0/+4
| | | | | | | | | - Check getBytesToPopOnReturn(). - Eschew ST0 and ST1 for return values. - Fix the PIC base register initialization so that it doesn't ever fail to end up the top of the entry block. llvm-svn: 108039
* Fix PR6696 and PR6663Jim Grosbach2010-04-061-0/+6
| | | | | | | | | | | | | | | | | When a frame pointer is not otherwise required, and dynamic stack alignment is necessary solely due to the spilling of a register with larger alignment requirements than the default stack alignment, the frame pointer can be both used as a general purpose register and a frame pointer. That goes poorly, for obvious reasons. This patch brings back a bit of old logic for identifying the use of such registers and conservatively reserves the frame pointer during register allocation in such cases. For now, implement for X86 only since it's 32-bit linux which is hitting this, and we want a targeted fix for 2.7. As a follow-on, this will be expanded to handle other targets, as theoretically the problem could arise elsewhere as well. llvm-svn: 100559
* Add a late SSEDomainFix pass that twiddles SSE instructions to avoid domain ↵Jakob Stoklund Olesen2010-03-251-0/+4
| | | | | | | | | | | | | | | | | | | | | | crossings. On Nehalem and newer CPUs there is a 2 cycle latency penalty on using a register in a different domain than where it was defined. Some instructions have equvivalents for different domains, like por/orps/orpd. The SSEDomainFix pass tries to minimize the number of domain crossings by changing between equvivalent opcodes where possible. This is a work in progress, in particular the pass doesn't do anything yet. SSE instructions are tagged with their execution domain in TableGen using the last two bits of TSFlags. Note that not all instructions are tagged correctly. Life just isn't that simple. The SSE execution domain issue is very similar to the ARM NEON/VFP pipeline issue handled by NEONMoveFixPass. This pass may become target independent to handle both. llvm-svn: 99524
* Revert "Add a late SSEDomainFix pass that twiddles SSE instructions to avoid ↵Jakob Stoklund Olesen2010-03-231-4/+0
| | | | | | | | domain crossings." This reverts commit 99345. It was breaking buildbots. llvm-svn: 99352
* Add a late SSEDomainFix pass that twiddles SSE instructions to avoid domain ↵Jakob Stoklund Olesen2010-03-231-0/+4
| | | | | | | | | crossings. This is work in progress. So far, SSE execution domain tables are added to X86InstrInfo, and a skeleton pass is enabled with -sse-domain-fix. llvm-svn: 99345
* MC: Provide the target triple to AsmBackend constructors.Daniel Dunbar2010-03-111-3/+2
| | | | llvm-svn: 98220
* MC/X86: Add stub AsmBackend.Daniel Dunbar2010-02-211-3/+8
| | | | llvm-svn: 96763
* rip out the 'heinous' x86 MCCodeEmitter implementation.Chris Lattner2010-02-131-2/+0
| | | | | | | We still have the templated X86 JIT emitter, *and* the almost-copy in X86InstrInfo for getting instruction sizes. llvm-svn: 96059
* give MCCodeEmitters access to the current MCContext.Chris Lattner2010-02-121-3/+7
| | | | llvm-svn: 96038
* wire up 64-bit MCCodeEmitter.Chris Lattner2010-02-051-1/+2
| | | | llvm-svn: 95438
* stub out a new X86 encoder, which can be tried withChris Lattner2010-02-031-0/+1
| | | | | | -enable-new-x86-encoder until its stable. llvm-svn: 95256
* rename createX86MCCodeEmitter to more accurately reflect what it creates.Chris Lattner2010-02-031-1/+1
| | | | llvm-svn: 95254
* remove dead code.Chris Lattner2010-02-021-5/+0
| | | | llvm-svn: 95144
* Factor the stack alignment calculations out into a target independent pass.Jim Grosbach2009-12-021-5/+0
| | | | | | No functionality change. llvm-svn: 90336
* llvm-mc/X86: Implement single instruction encoding interface for MC.Daniel Dunbar2009-08-271-0/+4
| | | | | | | | | | | | - Note, this is a gigantic hack, with the sole purpose of unblocking further work on the assembler (its also possible to test the mathcer more completely now). - Despite being a hack, its actually good enough to work over all of 403.gcc (although some encodings are probably incorrect). This is a testament to the beauty of X86's MachineInstr, no doubt! ;) llvm-svn: 80234
* Add new helpers for registering targets.Daniel Dunbar2009-07-251-8/+0
| | | | | | - Less boilerplate == good. llvm-svn: 77052
* Put Target definitions inside Target specific header, and llvm namespace.Daniel Dunbar2009-07-181-0/+2
| | | | llvm-svn: 76344
* Reapply TargetRegistry refactoring commits.Daniel Dunbar2009-07-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | --- Reverse-merging r75799 into '.': U test/Analysis/PointerTracking U include/llvm/Target/TargetMachineRegistry.h U include/llvm/Target/TargetMachine.h U include/llvm/Target/TargetRegistry.h U include/llvm/Target/TargetSelect.h U tools/lto/LTOCodeGenerator.cpp U tools/lto/LTOModule.cpp U tools/llc/llc.cpp U lib/Target/PowerPC/PPCTargetMachine.h U lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp U lib/Target/PowerPC/PPCTargetMachine.cpp U lib/Target/PowerPC/PPC.h U lib/Target/ARM/ARMTargetMachine.cpp U lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp U lib/Target/ARM/ARMTargetMachine.h U lib/Target/ARM/ARM.h U lib/Target/XCore/XCoreTargetMachine.cpp U lib/Target/XCore/XCoreTargetMachine.h U lib/Target/PIC16/PIC16TargetMachine.cpp U lib/Target/PIC16/PIC16TargetMachine.h U lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp U lib/Target/Alpha/AlphaTargetMachine.cpp U lib/Target/Alpha/AlphaTargetMachine.h U lib/Target/X86/X86TargetMachine.h U lib/Target/X86/X86.h U lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h U lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp U lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h U lib/Target/X86/X86TargetMachine.cpp U lib/Target/MSP430/MSP430TargetMachine.cpp U lib/Target/MSP430/MSP430TargetMachine.h U lib/Target/CppBackend/CPPTargetMachine.h U lib/Target/CppBackend/CPPBackend.cpp U lib/Target/CBackend/CTargetMachine.h U lib/Target/CBackend/CBackend.cpp U lib/Target/TargetMachine.cpp U lib/Target/IA64/IA64TargetMachine.cpp U lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp U lib/Target/IA64/IA64TargetMachine.h U lib/Target/IA64/IA64.h U lib/Target/MSIL/MSILWriter.cpp U lib/Target/CellSPU/SPUTargetMachine.h U lib/Target/CellSPU/SPU.h U lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp U lib/Target/CellSPU/SPUTargetMachine.cpp U lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp U lib/Target/Mips/MipsTargetMachine.cpp U lib/Target/Mips/MipsTargetMachine.h U lib/Target/Mips/Mips.h U lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp U lib/Target/Sparc/SparcTargetMachine.cpp U lib/Target/Sparc/SparcTargetMachine.h U lib/ExecutionEngine/JIT/TargetSelect.cpp U lib/Support/TargetRegistry.cpp llvm-svn: 75820
* Revert 75762, 75763, 75766..75769, 75772..75775, 75778, 75780, 75782 to ↵Stuart Hastings2009-07-151-1/+1
| | | | | | | | repair broken LLVM-GCC build. Will revert 75770 in the llvm-gcc trunk. llvm-svn: 75799
* Register Target's TargetMachine and AsmPrinter in the new registry.Daniel Dunbar2009-07-151-1/+1
| | | | | | | - This abuses TargetMachineRegistry's constructor for now, this will get cleaned up in time. llvm-svn: 75762
* Have asm printers use formatted_raw_ostream directly to avoid aDavid Greene2009-07-141-2/+3
| | | | | | dynamic_cast<>. llvm-svn: 75670
* Add the Object Code Emitter class. Original patch by Aaron Gray, I did someBruno Cardoso Lopes2009-07-061-0/+2
| | | | | | cleanup, removed some #includes and moved Object Code Emitter out-of-line. llvm-svn: 74813
* Remove unused AsmPrinter OptLevel argument, and propogate.Daniel Dunbar2009-07-011-3/+1
| | | | | | | - This more or less amounts to a revert of r65379. I'm curious to know what happened that caused this variable to become unused. llvm-svn: 74579
* Fix new CodeEmitter stuff to follow LLVM codying style. Patch by Aaron GrayBruno Cardoso Lopes2009-06-011-7/+8
| | | | llvm-svn: 72697
* First patch in the direction of splitting MachineCodeEmitter in two subclasses:Bruno Cardoso Lopes2009-05-301-2/+6
| | | | | | JITCodeEmitter and ObjectCodeEmitter. No functional changes yet. Patch by Aaron Gray llvm-svn: 72631
* Instead of passing in an unsigned value for the optimization level, use an enum,Bill Wendling2009-04-291-2/+5
| | | | | | | which better identifies what the optimization is doing. And is more flexible for future uses. llvm-svn: 70440
* Second attempt:Bill Wendling2009-04-291-2/+2
| | | | | | | | | | | | Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to use the old behavior, the flag is -O0. This change allows for finer-grained control over which optimizations are run at different -O levels. Most of this work was pretty mechanical. The majority of the fixes came from verifying that a "fast" variable wasn't used anymore. The JIT still uses a "Fast" flag. I'll change the JIT with a follow-up patch. llvm-svn: 70343
* r70270 isn't ready yet. Back this out. Sorry for the noise.Bill Wendling2009-04-281-2/+2
| | | | llvm-svn: 70275
* Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want toBill Wendling2009-04-281-2/+2
| | | | | | | | | | | use the old behavior, the flag is -O0. This change allows for finer-grained control over which optimizations are run at different -O levels. Most of this work was pretty mechanical. The majority of the fixes came from verifying that a "fast" variable wasn't used anymore. The JIT still uses a "Fast" flag. I'm not 100% sure if it's necessary to change it there... llvm-svn: 70270
* CodeGen still defaults to non-verbose asm, but llc now overrides it and ↵Evan Cheng2009-03-251-1/+1
| | | | | | default to verbose. llvm-svn: 67668
* Overhaul my earlier submission due to feedback. It's a large patch, but most ofBill Wendling2009-02-241-1/+3
| | | | | | | | | | | | them are generic changes. - Use the "fast" flag that's already being passed into the asm printers instead of shoving it into the DwarfWriter. - Instead of calling "MI->getParent()->getParent()" for every MI, set the machine function when calling "runOnMachineFunction" in the asm printers. llvm-svn: 65379
* Tidy up #includes, deleting a bunch of unnecessary #includes.Dan Gohman2009-01-051-2/+0
| | | | llvm-svn: 61715
* Move the code that inserts X87 FP_REG_KILL instructions from aDan Gohman2008-11-121-0/+5
| | | | | | | | special-purpose hook to a new pass. Also, add check to see if any x87 virtual registers are used, to avoid doing any work in the common case that no x87 code is needed. llvm-svn: 59190
* Use raw_ostream throughout the AsmPrinter.Owen Anderson2008-08-211-1/+2
| | | | llvm-svn: 55092
* Add X86 Maximal Stack Alignment Calculator Pass before RAAnton Korobeynikov2008-04-231-0/+5
| | | | llvm-svn: 50166
* Use PassManagerBase instead of FunctionPassManager for functionsDan Gohman2008-03-111-1/+0
| | | | | | | | that merely add passes. This allows them to be used with either FunctionPassManager or PassManager, or even with a custom new kind of pass manager. llvm-svn: 48256
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+2
| | | | llvm-svn: 45418
* Moved the MachOWriter and ELFWriter out of the Target/* files. Placed theBill Wendling2007-02-081-6/+0
| | | | | | | | definition of it into the CodeGen library. This is so that a backend doesn't necessarily add in these writers if it doesn't use them (like in the lli program). llvm-svn: 34034
* Remove unneeded forward declsChris Lattner2006-11-151-1/+0
| | | | llvm-svn: 31754
* Completely rearchitect the interface between targets and the pass manager.Chris Lattner2006-09-041-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | This pass: 1. Splits TargetMachine into TargetMachine (generic targets, can be implemented any way, like the CBE) and LLVMTargetMachine (subclass of TM that is used by things using libcodegen and other support). 2. Instead of having each target fully populate the passmgr for file or JIT output, move all this to common code, and give targets hooks they can implement. 3. Commonalize the target population stuff between file emission and JIT emission. 4. All (native code) codegen stuff now happens in a FunctionPassManager, which paves the way for "fast -O0" stuff in the CFE later, and now LLC could lazily stream .bc files from disk to use less memory. 5. There are now many fewer #includes and the targets don't depend on the scalar xforms or libanalysis anymore (but codegen does). 6. Changing common code generator pass ordering stuff no longer requires touching all targets. 7. The JIT now has the option of "-fast" codegen or normal optimized codegen, which is now orthogonal to the fact that JIT'ing is being done. llvm-svn: 30081
* - Enable x86 isel preprocessing by default unless -fast is specified.Evan Cheng2006-08-291-1/+1
| | | | | | - Also disable isel load folding if -fast. llvm-svn: 29956
* - Refactor the code that resolve basic block references to a TargetJITInfoEvan Cheng2006-07-251-1/+2
| | | | | | | | | | method. - Added synchronizeICache() to TargetJITInfo. It is called after each block of code is emitted to flush the icache. This ensures correct execution on targets that have separate dcache and icache. - Added PPC / Mac OS X specific code to do icache flushing. llvm-svn: 29276
* Added getTargetLowering() to TargetMachine. Refactored targets to support this.Evan Cheng2006-03-131-4/+4
| | | | llvm-svn: 26742
* Kill the x86 pattern isel. boom.Nate Begeman2006-02-171-8/+0
| | | | llvm-svn: 26246
* Remove the X86PeepholeOptimizerPass, a truly horrible old hack that is nowChris Lattner2006-02-031-5/+0
| | | | | | obsolete. yaay :) llvm-svn: 25939
* Bye bye Pattern ISel, hello DAG ISel.Evan Cheng2006-01-271-1/+1
| | | | llvm-svn: 25700
* x86 CPU detection and proper subtarget supportEvan Cheng2006-01-271-6/+0
| | | | llvm-svn: 25679
* Added preliminary x86 subtarget support.Evan Cheng2006-01-261-1/+1
| | | | llvm-svn: 25645
* Only lower SELECT when using DAG based isel.Evan Cheng2005-12-171-0/+1
| | | | llvm-svn: 24755
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