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* remove some never-completed and now-obsolete code.Chris Lattner2005-12-121-5/+0
| | | | llvm-svn: 24671
* Separate X86ISelLowering stuff out from the X86ISelPattern.cpp file. PatchChris Lattner2005-11-151-3/+9
| | | | | | contributed by Evan Cheng. llvm-svn: 24358
* Remove the X86 and PowerPC Simple instruction selectors; their time hasNate Begeman2005-08-181-6/+0
| | | | | | passed. llvm-svn: 22886
* Refactor things a bit to allow the ELF code emitter to run the X86 machine ↵Chris Lattner2005-07-111-6/+11
| | | | | | | | code emitter after itself. llvm-svn: 22376
* Remove prototype for non-existant functionChris Lattner2005-07-111-6/+0
| | | | llvm-svn: 22372
* First round of support for doing scalar FP using the SSE2 ISA extension andNate Begeman2005-07-061-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | XMM registers. There are many known deficiencies and fixmes, which will be addressed ASAP. The major benefit of this work is that it will allow the LLVM register allocator to allocate FP registers across basic blocks. The x86 backend will still default to x87 style FP. To enable this work, you must pass -enable-sse-scalar-fp and either -sse2 or -sse3 to llc. An example before and after would be for: double foo(double *P) { double Sum = 0; int i; for (i = 0; i < 1000; ++i) Sum += P[i]; return Sum; } The inner loop looks like the following: x87: .LBB_foo_1: # no_exit fldl (%esp) faddl (%eax,%ecx,8) fstpl (%esp) incl %ecx cmpl $1000, %ecx #FP_REG_KILL jne .LBB_foo_1 # no_exit SSE2: addsd (%eax,%ecx,8), %xmm0 incl %ecx cmpl $1000, %ecx #FP_REG_KILL jne .LBB_foo_1 # no_exit llvm-svn: 22340
* Add support to the X86 backend for emitting ELF files. To use this, weChris Lattner2005-06-271-0/+6
| | | | | | | | | currently use: llc t.bc --filetype=obj This will produce a t.o file which is dumpable with readelf. Currently the file produced is empty, but the scaffolding to do more is now in place. llvm-svn: 22292
* * Remove trailing whitespaceMisha Brukman2005-04-211-2/+2
| | | | | | * Convert tabs to spaces llvm-svn: 21426
* Add a new prototypeChris Lattner2005-01-071-2/+7
| | | | llvm-svn: 19332
* Add -sse[,2,3] arguments to LLCChris Lattner2004-08-241-0/+6
| | | | llvm-svn: 16018
* Disable the pattern iselChris Lattner2004-08-151-6/+0
| | | | llvm-svn: 15787
* Remove some (LARGE) abandoned code for the release. If this is ever neededChris Lattner2004-07-221-6/+0
| | | | | | again in the future, it can be resurrected out of CVS llvm-svn: 15112
* Tablgen files for really simple instruction selectorJakub Staszak2004-04-061-0/+6
| | | | llvm-svn: 12714
* Clean up a lot of the code I added yesterday by exposing the IntrinsicLoweringChris Lattner2003-12-281-4/+2
| | | | | | implementation from the TargetMachine directly. llvm-svn: 10636
* implement support for the intrinsic lowering functionalityChris Lattner2003-12-281-2/+5
| | | | llvm-svn: 10629
* Add a floating point killer pass. This pass runs before registerAlkis Evlogimenos2003-12-131-0/+6
| | | | | | | | | | allocaton on the X86 to add information to the machine code denoting that our floating point stackifier cannot handle virtual point register that are alive across basic blocks. This pass adds an implicit def of all virtual floating point register at the end of each basic block. llvm-svn: 10446
* Add an option to enable the SSA based peephole optimizer.Chris Lattner2003-12-011-0/+5
| | | | | | | | | | Eventually this pass will provide substantially better code in the interim between when we have a crappy isel and nice isel. Unfortunately doing so requires fixing the backend to actually SUPPORT all of the fancy addressing modes that we now generate, and writing a DCE pass for machine code. Each of these is a fairly substantial job, so this will remain disabled for the immediate future. :( llvm-svn: 10276
* Put all LLVM code into the llvm namespace, as per bug 109.Brian Gaeke2003-11-111-0/+5
| | | | llvm-svn: 9903
* Added LLVM copyright header.John Criswell2003-10-211-0/+7
| | | | llvm-svn: 9321
* Factory methods for FunctionPasses now return type FunctionPass *.Brian Gaeke2003-08-131-10/+10
| | | | | | Correct one of the functions' comments. llvm-svn: 7816
* Add support for a pattern matching instruction selector. This is still inChris Lattner2003-08-111-0/+6
| | | | | | the early implementation phases, so it is disabled by default llvm-svn: 7719
* Start using tablegen'd instruction enum listChris Lattner2003-08-031-10/+3
| | | | llvm-svn: 7542
* Switch over to tablegen generated header filesChris Lattner2003-08-031-9/+6
| | | | llvm-svn: 7512
* Rename function to be more consistent with filenameChris Lattner2003-07-261-2/+2
| | | | llvm-svn: 7352
* Printer.cpp: Ditch addRequired/getAnalysis, because they leaveBrian Gaeke2003-07-231-4/+5
| | | | | | | | | | | Printer::doFinalization() out in the cold. Now we pass in a TargetMachine to Printer's constructor and get the TargetData from the TargetMachine. Don't pass TargetMachine or MRegisterInfo objects around in the Printer. Constify TargetData references. X86.h: Update comment and prototype of createX86CodePrinterPass(). X86TargetMachine.cpp: Update callers of createX86CodePrinterPass(). llvm-svn: 7275
* Add namespace comments for doxygenChris Lattner2003-06-031-3/+3
| | | | llvm-svn: 6581
* Move passes out to Passes.hChris Lattner2003-01-131-10/+7
| | | | llvm-svn: 5227
* * Most pass ctor functions don't take TM arguments anymoreChris Lattner2002-12-281-7/+12
| | | | | | * New createPrologEpilogCodeInserter() function llvm-svn: 5181
* Try #2 to get alias set stuff to workChris Lattner2002-12-161-1/+1
| | | | llvm-svn: 5077
* Add info about register aliases, add prototype for createLocalRegisterAllocatorChris Lattner2002-12-161-1/+2
| | | | llvm-svn: 5075
* Rename createSimpleX86RegisterAllocator to createSimpleRegisterAllocatorChris Lattner2002-12-161-4/+4
| | | | llvm-svn: 5071
* * Move information about Implicit Defs/Uses into X86InstrInfo.def.Chris Lattner2002-12-031-1/+1
| | | | | | | * Expose information about implicit defs/uses of register through the MachineInstrInfo.h file. llvm-svn: 4877
* Start to add more information to instr.defChris Lattner2002-11-181-1/+1
| | | | llvm-svn: 4741
* Convert backend to use passes, implement X86TargetMachineChris Lattner2002-10-291-14/+12
| | | | llvm-svn: 4421
* Rename X86InstructionInfo to X86InstrInfoChris Lattner2002-10-291-1/+1
| | | | llvm-svn: 4413
* Be compatible with sparc backendChris Lattner2002-10-291-1/+2
| | | | llvm-svn: 4395
* Initial stab at MachineInstr'icationChris Lattner2002-10-281-5/+5
| | | | llvm-svn: 4367
* Initial checkin of X86 backend.Chris Lattner2002-10-251-0/+61
We can instruction select exactly one instruction 'ret void'. Wow. llvm-svn: 4284
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