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* Target/X86/MCTargetDesc/X86MCAsmInfo.cpp: Enable DwarfCFI (aka DW2) on Cygming.NAKAMURA Takumi2012-04-071-0/+3
| | | | | | | Cygwin-1.7 supports dw2. Some recent mingw distros support one, too. I have confirmed test-suite/SingleSource/Benchmarks/Shootout-C++/except.cpp can pass on Cygwin. llvm-svn: 154247
* Make MCInstrInfo available to the MCInstPrinter. This will be used to remove ↵Craig Topper2012-04-021-2/+3
| | | | | | getInstructionName and the static data it contains since the same tables are already in MCInstrInfo. llvm-svn: 153860
* Prune some includesCraig Topper2012-03-271-1/+0
| | | | llvm-svn: 153502
* Put Is64BitMemOperand into !defined(NDEBUG) for now.Joerg Sonnenberger2012-03-211-0/+2
| | | | llvm-svn: 153185
* Fix generation of the address size override prefix. Add assertions forJoerg Sonnenberger2012-03-211-5/+51
| | | | | | | the invalid cases. At least 16bit operand in 64bit mode is currently not rejected in the parser. llvm-svn: 153166
* Reorder includes in Target backends to following coding standards. Remove ↵Craig Topper2012-03-171-1/+1
| | | | | | some superfluous forward declarations. llvm-svn: 152997
* Make MCRegisterInfo available to the the MCInstPrinter.Jim Grosbach2012-03-051-2/+3
| | | | | | | Used to allow context sensitive printing of super-register or sub-register references. llvm-svn: 152043
* Minimal changes for LLVM to compile under VS11.Michael J. Spencer2012-03-011-0/+4
| | | | llvm-svn: 151849
* Add vmfunc instruction to X86 assembler and disassembler.Craig Topper2012-02-192-12/+16
| | | | llvm-svn: 150899
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, ↵Jia Liu2012-02-184-4/+4
| | | | | | MSP430, PPC, PTX, Sparc, X86, XCore. llvm-svn: 150878
* Add X86 assembler and disassembler support for AMD SVM instructions. ↵Craig Topper2012-02-182-71/+52
| | | | | | Original patch by Kay Tiong Khoo. Few tweaks by me for code density and to reduce replication. llvm-svn: 150873
* Add support for implicit TLS model used with MS VC runtime.Anton Korobeynikov2012-02-113-2/+14
| | | | | | Patch by Kai Nacke! llvm-svn: 150307
* Convert assert(0) to llvm_unreachableCraig Topper2012-02-051-0/+1
| | | | llvm-svn: 149814
* Convert assert(0) to llvm_unreachable in X86 Target directory.Craig Topper2012-02-053-15/+15
| | | | llvm-svn: 149809
* PR11834: Use macros which are defined on Windows. Patch by Marina Yatsina.Evan Cheng2012-01-301-1/+2
| | | | llvm-svn: 149294
* Keep source location information for X86 MCFixup's.Jim Grosbach2012-01-271-18/+20
| | | | llvm-svn: 149106
* More dead code removal (using -Wunreachable-code)David Blaikie2012-01-202-8/+15
| | | | llvm-svn: 148578
* Tidy up. MCAsmBackend naming conventions.Jim Grosbach2012-01-181-8/+8
| | | | llvm-svn: 148400
* Separate the concept of having memory access in operand 4 from the concept ↵Craig Topper2011-12-302-21/+13
| | | | | | of having the W bit set for XOP instructons. Removes ORing W-bits in the encoder and will similarly simplify the disassembler implementation. llvm-svn: 147366
* Section relative fixups are a coff concept, not a x86 one. Replace theRafael Espindola2011-12-243-6/+6
| | | | | | x86 specific reloc_coff_secrel32 with a generic FK_SecRel_4. llvm-svn: 147252
* Move x86 specific bits of the COFF writer to lib/Target/X86.Rafael Espindola2011-12-244-1/+74
| | | | llvm-svn: 147231
* Move the X86 specific bits of the ELF writer to the Target/X86 directory.Rafael Espindola2011-12-214-13/+232
| | | | | | Other targets will follow shortly. llvm-svn: 147060
* Reduce the exposure of Triple::OSType in the ELF object writer. This willRafael Espindola2011-12-211-14/+16
| | | | | | | avoid including ADT/Triple.h in many places when the target specific bits are moved. llvm-svn: 147059
* Unweaken vtables as per ↵David Blaikie2011-12-202-4/+20
| | | | | | http://llvm.org/docs/CodingStandards.html#ll_virtual_anch llvm-svn: 146960
* Add back the MC bits of 126425. Original patch by Nathan Jeffords. I added theRafael Espindola2011-12-172-1/+5
| | | | | | asm parsing and testcase. llvm-svn: 146801
* LLVMBuild: Remove trailing newline, which irked me.Daniel Dunbar2011-12-121-1/+0
| | | | llvm-svn: 146409
* XOP encoding bits and logic.Jan Sjödin2011-12-122-5/+39
| | | | llvm-svn: 146397
* Handle expressions of the form _GLOBAL_OFFSET_TABLE_-symbol the same way gasRafael Espindola2011-12-101-12/+28
| | | | | | | | does. The _GLOBAL_OFFSET_TABLE_ is still magical in that we get a R_386_GOTPC, but it doesn't change the immediate in the same way as when the expression has no right hand side symbol. llvm-svn: 146311
* Src2 and src3 were accidentally swapped for the FMA4 rr patterns. Undo this ↵Jan Sjödin2011-12-081-11/+8
| | | | | | and fix the encoding. llvm-svn: 146151
* Move target-specific logic out of generic MCAssembler.Jim Grosbach2011-12-061-0/+13
| | | | | | | | Whether a fixup needs relaxation for the associated instruction is a target-specific function, as the FIXME indicated. Create a hook for that and use it. llvm-svn: 145881
* build/CMake: Finish removal of add_llvm_library_dependencies.Daniel Dunbar2011-11-291-7/+0
| | | | llvm-svn: 145420
* MC/X86/COFF: Allow quotes in names when targeting MS/Windows,Michael J. Spencer2011-11-293-5/+23
| | | | | | | | | | as MC is the only assembler we support. This splits MS/Windows and GNU/Windows ASM infos into two seperate classes. While there is currently only one difference, full MS C++ ABI support will require many more. llvm-svn: 145409
* This patch contains support for encoding FMA4 instructions andBruno Cardoso Lopes2011-11-252-6/+38
| | | | | | | | | tablegen patterns for scalar FMA4 operations and intrinsic. Also add tests for vfmaddsd. Patch by Jan Sjodin llvm-svn: 145133
* Sink codegen optimization level into MCCodeGenInfo along side relocation modelEvan Cheng2011-11-161-2/+3
| | | | | | | and code model. This eliminates the need to pass OptLevel flag all over the place and makes it possible for any codegen pass to use this information. llvm-svn: 144788
* build: Attempt to rectify inconsistencies between CMake and LLVMBuild ↵Daniel Dunbar2011-11-121-1/+0
| | | | | | | | versions of explicit dependencies. - The hope is that we have a tool/test to verify these are accurate (and tight) soon. llvm-svn: 144444
* build: Add initial cut at LLVMBuild.txt files.Daniel Dunbar2011-11-031-0/+24
| | | | llvm-svn: 143634
* Add X86 RORX instructionCraig Topper2011-10-232-0/+12
| | | | llvm-svn: 142741
* Remove NaClModeDavid Meyer2011-10-181-4/+0
| | | | llvm-svn: 142338
* Don't use inline assembly in 64-bit Visual Studio. Unfortunately, this means ↵Craig Topper2011-10-171-16/+10
| | | | | | that cpuid leaf 7 can't be queried on versions of Visual Studio earlier than VS 2008 SP1. Fixes PR11147. llvm-svn: 142177
* Add X86 PEXTR and PDEP instructions.Craig Topper2011-10-162-5/+17
| | | | llvm-svn: 142141
* Add X86 BZHI instruction as well as BMI2 feature detection.Craig Topper2011-10-162-37/+22
| | | | llvm-svn: 142122
* Add X86 BEXTR instruction. This instruction uses VEX.vvvv to encode Operand ↵Craig Topper2011-10-162-7/+31
| | | | | | 3 instead of Operand 2 so needs special casing in the disassembler and code emitter. Ultimately, should pass this information from tablegen llvm-svn: 142105
* Add X86 feature detection support for BMI instructions. Added new cpuid ↵Craig Topper2011-10-162-0/+73
| | | | | | function for accessing leafs with sub leafs specified in ECX. Also added code to keep track of the max cpuid level supported in both basic and extended leaves and qualified the existing cpuid calls and the new call to leaf 7. llvm-svn: 142089
* Add support for X86 blsr, blsmsk, and blsi instructions. Required extra work ↵Craig Topper2011-10-152-16/+25
| | | | | | because these are the first VEX encoded instructions to use the reg field as an opcode extension. llvm-svn: 142082
* Simplify assertion, and avoid undefined shift. Based on patch by Ahmed Charles.Eli Friedman2011-10-131-8/+1
| | | | llvm-svn: 141912
* Add support in the disassembler for ignoring the L-bit on certain VEX ↵Craig Topper2011-10-041-1/+5
| | | | | | instructions. Mark instructions that have this behavior. Fixes PR10676. llvm-svn: 141065
* Tidy up a bit more, fix tab and remove trailing whitespacesBruno Cardoso Lopes2011-09-201-9/+5
| | | | llvm-svn: 140186
* Tidy up code!Bruno Cardoso Lopes2011-09-201-6/+5
| | | | llvm-svn: 140183
* Refactor instprinter and mcdisassembler to take a SubtargetInfo. Add -mattr= ↵James Molloy2011-09-071-1/+2
| | | | | | handling to llvm-mc. Reviewed by Owen Anderson. llvm-svn: 139237
* Add a new MC bit for NaCl (Native Client) mode. NaCl requires that certainNick Lewycky2011-09-051-2/+9
| | | | | | | instructions are more aligned than the CPU requires, and adds some additional directives, to follow in future patches. Patch by David Meyer! llvm-svn: 139125
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