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* Fix a crash with X86 Mach-O and a subtraction expression where both symbols areKevin Enderby2013-08-121-0/+5
| | | | | | | | | undefined and produce an error message instead as this is a non-relocatable expression with X86 Mach-O. rdar://8920876 llvm-svn: 188218
* [Object] Split the ELF interface into 3 parts.Michael J. Spencer2013-08-081-1/+1
| | | | | | | | * ELFTypes.h contains template magic for defining types based on endianess, size, and alignment. * ELFFile.h defines the ELFFile class which provides low level ELF specific access. * ELFObjectFile.h contains ELFObjectFile which uses ELFFile to implement the ObjectFile interface. llvm-svn: 188022
* EVEX and compressed displacement encoding for AVX512Elena Demikhovsky2013-08-011-47/+268
| | | | llvm-svn: 187576
* Added encoding prefixes for KNL instructions (EVEX).Elena Demikhovsky2013-07-281-11/+68
| | | | | | | Added 512-bit operands printing. Added instruction formats for KNL instructions. llvm-svn: 187324
* Integrate Assembler: Support X86_64_DTPOFF64 relocationsDavid Blaikie2013-06-281-1/+12
| | | | llvm-svn: 185131
* Use pointers to the MCAsmInfo and MCRegInfo.Bill Wendling2013-06-181-1/+1
| | | | | | | | | Someone may want to do something crazy, like replace these objects if they change or something. No functionality change intended. llvm-svn: 184175
* Handle relocations that don't point to symbols.Rafael Espindola2013-06-052-11/+10
| | | | | | | | In ELF (as in MachO), not all relocations point to symbols. Represent this properly by using a symbol_iterator instead of a SymbolRef. Update llvm-readobj ELF's dumper to handle relocatios without symbols. llvm-svn: 183284
* Follow up of the introduction of MCSymbolizer.Quentin Colombet2013-05-241-4/+5
| | | | | | | - Ressurect old MCDisassemble API to soften transition. - Extend MCTargetDesc to set target specific symbolizer. llvm-svn: 182688
* Add MCSymbolizer for symbolic/annotated disassembly.Ahmed Bougacha2013-05-245-0/+277
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a basic first step towards symbolization of disassembled instructions. This used to be done using externally provided (C API) callbacks. This patch introduces: - the MCSymbolizer class, that mimics the same functions that were used in the X86 and ARM disassemblers to symbolize immediate operands and to annotate loads based off PC (for things like c string literals). - the MCExternalSymbolizer class, which implements the old C API. - the MCRelocationInfo class, which provides a way for targets to translate relocations (either object::RelocationRef, or disassembler C API VariantKinds) to MCExprs. - the MCObjectSymbolizer class, which does symbolization using what it finds in an object::ObjectFile. This makes simple symbolization (with no fancy relocation stuff) work for all object formats! - x86-64 Mach-O and ELF MCRelocationInfos. - A basic ARM Mach-O MCRelocationInfo, that provides just enough to support the C API VariantKinds. Most of what works in otool (the only user of the old symbolization API that I know of) for x86-64 symbolic disassembly (-tvV) works, namely: - symbol references: call _foo; jmp 15 <_foo+50> - relocations: call _foo-_bar; call _foo-4 - __cf?string: leaq 193(%rip), %rax ## literal pool for "hello" Stub support is the main missing part (because libObject doesn't know, among other things, about mach-o indirect symbols). As for the MCSymbolizer API, instead of relying on the disassemblers to call the tryAdding* methods, maybe this could be done automagically using InstrInfo? For instance, even though PC-relative LEAs are used to get the address of string literals in a typical Mach-O file, a MOV would be used in an ELF file. And right now, the explicit symbolization only recognizes PC-relative LEAs. InstrInfo should have already have most of what is needed to know what to symbolize, so this can definitely be improved. I'd also like to remove object::RelocationRef::getValueString (it seems only used by relocation printing in objdump), as simply printing the created MCExpr is definitely enough (and cleaner than string concats). llvm-svn: 182625
* Remove the MachineMove class.Rafael Espindola2013-05-131-7/+9
| | | | | | | | | | | | It was just a less powerful and more confusing version of MCCFIInstruction. A side effect is that, since MCCFIInstruction uses dwarf register numbers, calls to getDwarfRegNum are pushed out, which should allow further simplifications. I left the MachineModuleInfo::addFrameMove interface unchanged since this patch was already fairly big. llvm-svn: 181680
* Remove unused argument.Rafael Espindola2013-05-101-1/+1
| | | | llvm-svn: 181618
* Fix section relocation for SECTIONREL32 with immediate offset.Rafael Espindola2013-04-251-2/+15
| | | | | | Patch by Kai Nacke. This matches the gnu as output. llvm-svn: 180568
* Add CLAC/STAC instruction encoding/decoding supportMichael Liao2013-04-112-17/+22
| | | | | | | As these two instructions in AVX extension are privileged instructions for special purpose, it's only expected to be used in inlined assembly. llvm-svn: 179266
* MC: Support COFF image-relative MCSymbolRefsNico Rieck2013-04-101-2/+16
| | | | | | | | | | | | | | | | Add support for the COFF relocation types IMAGE_REL_I386_DIR32NB and IMAGE_REL_AMD64_ADDR32NB for 32- and 64-bit respectively. These are similar to normal 4-byte relocations except that they do not include the base address of the image. Image-relative relocations are used for debug information (32-bit) and SEH unwind tables (64-bit). A new MCSymbolRef variant called 'VK_COFF_IMGREL32' is introduced to specify such relocations. For AT&T assembly, this variant can be accessed using the symbol suffix '@imgrel'. llvm-svn: 179240
* In the X86 back end, getMemoryOperandNo() returns the offsetPreston Gurd2013-04-102-12/+22
| | | | | | | | | | | | into the operand array of the start of the memory reference descriptor. Additional code in EncodeInstruction provides an additional adjustment. This patch places that additional code in a separate function, called getOperandBias, so that any caller of getMemoryOperandNo can also call getOperandBias. llvm-svn: 179211
* x86 -- add the XTEST instructionDave Zarzycki2013-03-252-23/+18
| | | | llvm-svn: 177888
* Add X86 code emitter support AVX encoded MRMDestReg instructions.Craig Topper2013-03-161-4/+15
| | | | | | Previously we weren't skipping the VVVV encoded register. Based on patch by Michael Liao. llvm-svn: 177221
* Fix a bug in the calculation of the VEX.B bit for FMA4 rr with the VEX.W bit ↵Craig Topper2013-03-141-0/+8
| | | | | | set. The VEX.B was being calculated from the wrong operand. Fixes at least some portion of PR14185. llvm-svn: 177014
* The current X86 NOP padding uses one long NOP followed by the remainder inDavid Sehr2013-03-051-12/+12
| | | | | | | | | | | one-byte NOPs. If the processor actually executes those NOPs, as it sometimes does with aligned bundling, this can have a performance impact. From my micro-benchmarks run on my one machine, a 15-byte NOP followed by twelve one-byte NOPs is about 20% worse than a 15 followed by a 12. This patch changes NOP emission to emit as many 15-byte (the maximum) as possible followed by at most one shorter NOP. llvm-svn: 176464
* Fix typo in X86BaseInfo.h that I introduced in r157818.Hans Wennborg2013-01-291-2/+2
| | | | llvm-svn: 173798
* Initial patch for x32 ABI support.Eli Bendersky2013-01-221-3/+11
| | | | | | | | Add the x32 environment kind to the triple, and separate the concept of pointer size and callee save stack slot size, since they're not equal on x32. llvm-svn: 173175
* Renamed MCInstFragment to MCRelaxableFragment and added some comments.Eli Bendersky2013-01-081-2/+2
| | | | | | No change in functionality. llvm-svn: 171822
* MC: Add MCInstrDesc::mayAffectControlFlow() method.Jim Grosbach2012-12-191-1/+2
| | | | | | | | | MC disassembler clients (LLDB) are interested in querying if an instruction may affect control flow other than by virtue of being an explicit branch instruction. For example, instructions which write directly to the PC on some architectures. llvm-svn: 170610
* Fix a bogus commentEli Bendersky2012-12-131-3/+3
| | | | llvm-svn: 170052
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-032-8/+8
| | | | | | | | | | | | | | | | | Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] llvm-svn: 169131
* Add support of RTM from TSX extensionMichael Liao2012-11-082-15/+16
| | | | | | | | - Add RTM code generation support throught 3 X86 intrinsics: xbegin()/xend() to start/end a transaction region, and xabort() to abort a tranaction region llvm-svn: 167573
* Enable ELF machine type to be specified explicitly in X86 backendMichael Liao2012-10-303-15/+19
| | | | llvm-svn: 167027
* X86: Disable long nops for all cpus prior to pentiumpro/i686.Benjamin Kramer2012-10-131-1/+3
| | | | llvm-svn: 165878
* Add register encoding support in X86 backendMichael Liao2012-10-043-119/+6
| | | | | | | | - Add 'HwEncoding' for X86 registers and call getEncodingValue() to retrieve their encoding values. - This's the first step to adopt new scheme. Furthur revising is onging. llvm-svn: 165241
* Support for generating ELF objects on Windows.Andrew Kaylor2012-10-022-3/+7
| | | | | | This adds 'elf' as a recognized target triple environment value and overrides the default generated object format on Windows platforms if that value is present. This patch also enables MCJIT tests on Windows using the new environment value. llvm-svn: 165030
* Use constants for all return values in switch. Allows clang to optimize it ↵Craig Topper2012-10-011-3/+8
| | | | | | into a lookup table. llvm-svn: 164926
* X86_32: Large Symbol+Offset relocations.Jim Grosbach2012-09-261-8/+40
| | | | | | | | | | If the offset is more than 24-bits, it won't fit in a scattered relocation offset field, so we fall back to using a non-scattered relocation. rdar://12358909 llvm-svn: 164724
* Mark jump tables in code sections with DataRegion directives.Jim Grosbach2012-09-241-0/+5
| | | | | | | | | Even out-of-line jump tables can be in the code section, so mark them as data-regions for those targets which support the directives. rdar://12362871&12362974 llvm-svn: 164571
* Remove code for setting the VEX L-bit as a function of operand size from the ↵Craig Topper2012-09-191-9/+0
| | | | | | code emitters and the disassembler table builder. Fix a couple instructions that were still missing VEX_L. llvm-svn: 164204
* When creating MCAsmBackend pass the CPU string as well. In X86AsmBackendRoman Divacky2012-09-182-26/+34
| | | | | | | | | store this and use it to not emit long nops when the CPU is geode which doesnt support them. Fixes PR11212. llvm-svn: 164132
* Use LLVM_DELETED_FUNCTION in place of 'DO NOT IMPLEMENT' comments.Craig Topper2012-09-151-2/+2
| | | | llvm-svn: 163974
* Fix Doxygen issues:Dmitri Gribenko2012-09-141-2/+2
| | | | | | | | | | * wrap code blocks in \code ... \endcode; * refer to parameter names in paragraphs correctly (\arg is not what most people want -- it starts a new paragraph); * use \param instead of \arg to document parameters in order to be consistent with the rest of the codebase. llvm-svn: 163902
* Add support for the OpenBSD for Bitrig.Eric Christopher2012-08-061-3/+4
| | | | | | Patch by David Hill. llvm-svn: 161344
* Update GATHER instructions to support 2 read-write operands. Patch from ↵Craig Topper2012-07-121-5/+14
| | | | | | myself and Manman Ren. llvm-svn: 160110
* X86: add GATHER intrinsics (AVX2) in LLVMManman Ren2012-06-261-1/+6
| | | | | | | | | | | | Support the following intrinsics: llvm.x86.avx2.gather.d.pd, llvm.x86.avx2.gather.q.pd llvm.x86.avx2.gather.d.pd.256, llvm.x86.avx2.gather.q.pd.256 llvm.x86.avx2.gather.d.ps, llvm.x86.avx2.gather.q.ps llvm.x86.avx2.gather.d.ps.256, llvm.x86.avx2.gather.q.ps.256 Modified Disassembler to handle VSIB addressing mode. llvm-svn: 159221
* Remove 'static' from inline functions defined in header files.Chandler Carruth2012-06-201-7/+7
| | | | | | | | | | | | | | | | | There is a pretty staggering amount of this in LLVM's header files, this is not all of the instances I'm afraid. These include all of the functions that (in my build) are used by a non-static inline (or external) function. Specifically, these issues were caught by the new '-Winternal-linkage-in-inline' warning. I'll try to just clean up the remainder of the clearly redundant "static inline" cases on functions (not methods!) defined within headers if I can do so in a reliable way. There were even several cases of a missing 'inline' altogether, or my personal favorite "static bool inline". Go figure. ;] llvm-svn: 158800
* Better comments for TLS-related X86 MachineOperand flags.Hans Wennborg2012-06-041-9/+18
| | | | llvm-svn: 157920
* Implement the local-dynamic TLS model for x86 (PR3985)Hans Wennborg2012-06-011-0/+27
| | | | | | | | | This implements codegen support for accesses to thread-local variables using the local-dynamic model, and adds a clean-up pass so that the base address for the TLS block can be re-used between local-dynamic access on an execution path. llvm-svn: 157818
* Added FMA3 Intel instructions.Elena Demikhovsky2012-05-311-2/+6
| | | | | | | | I disabled FMA3 autodetection, since the result may differ from expected for some benchmarks. I added tests for GodeGen and intrinsics. I did not change llvm.fma.f32/64 - it may be done later. llvm-svn: 157737
* Add intrinsics, code gen, assembler and disassembler support for the SSE4a ↵Benjamin Kramer2012-05-291-2/+3
| | | | | | | | | | | extrq and insertq instructions. This required light surgery on the assembler and disassembler because the instructions use an uncommon encoding. They are the only two instructions in x86 that use register operands and two immediates. llvm-svn: 157634
* Tidy up some spacing and inconsistent use of pre/post increment. No ↵Craig Topper2012-05-191-15/+15
| | | | | | functional change intended. llvm-svn: 157122
* Allow MCCodeEmitter access to the target MCRegisterInfo.Jim Grosbach2012-05-152-0/+2
| | | | | | | | Add the MCRegisterInfo to the factories and constructors. Patch by Tom Stellard <Tom.Stellard@amd.com>. llvm-svn: 156828
* Implement initial-exec TLS model for 32-bit PIC x86Hans Wennborg2012-05-111-0/+7
| | | | | | | This fixes a TODO from 2007 :) Previously, LLVM would emit the wrong code here (see the update to test/CodeGen/X86/tls-pie.ll). llvm-svn: 156611
* Nuke a few dead remnants of the CBE.Jim Grosbach2012-05-051-17/+0
| | | | llvm-svn: 156241
* Copied all the VEX prefix encoding code from X86MCCodeEmitter to the x86 JIT ↵Pete Cooper2012-04-301-1/+3
| | | | | | emitter. Needs some major refactoring as these two code emitters are almost identical llvm-svn: 155810
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