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* Prune includes in X86 target.Craig Topper2014-03-191-1/+1
| | | | llvm-svn: 204216
* Simplify a really complicated check for Arch == X86_64.Rafael Espindola2014-03-111-1/+0
| | | | | | | | | | | | The function hasReliableSymbolDifference had exactly one use in the MachO writer. It is also only true for X86_64. In fact, the comments refers to "Darwin x86_64" and everything else, so this makes the code match the comment. If this is to be abstracted again, it should be a property of TargetObjectWriter, like useAggressiveSymbolFolding. llvm-svn: 203605
* [C++11] Remove 'virtual' keyword from methods marked with 'override' keyword.Craig Topper2014-03-101-3/+2
| | | | llvm-svn: 203444
* [C++11] Add 'override' keyword to virtual methods that override their base ↵Craig Topper2014-03-097-36/+35
| | | | | | class. llvm-svn: 203418
* MC: Remove superfluous section attribute flag definitionsDavid Majnemer2014-03-072-11/+11
| | | | | | | | | | | | | | | | | | | Summary: llvm/MC/MCSectionMachO.h and llvm/Support/MachO.h both had the same definitions for the section flags. Instead, grab the definitions out of support. No functionality change. Reviewers: grosbach, Bigcheese, rafael Reviewed By: rafael CC: llvm-commits Differential Revision: http://llvm-reviews.chandlerc.com/D2998 llvm-svn: 203211
* Support: split object format out of environmentSaleem Abdulrasool2014-03-062-4/+4
| | | | | | | | | | | This is a preliminary setup change to support a renaming of Windows target triples. Split the object file format information out of the environment into a separate entity. Unfortunately, file format was previously treated as an environment with an unknown OS. This is most obvious in the ARM subtarget where the handling for macho on an arbitrary platform switches to AAPCS rather than APCS (as per Apple's needs). llvm-svn: 203160
* AVX-512: fixed comressed displacement - by Robert KhazanovElena Demikhovsky2014-03-061-1/+1
| | | | llvm-svn: 203096
* X86: 80-columnSaleem Abdulrasool2014-03-041-1/+2
| | | | llvm-svn: 202863
* Switch all uses of LLVM_OVERRIDE to just use 'override' directly.Craig Topper2014-03-021-1/+1
| | | | llvm-svn: 202621
* Remove special FP opcode maps and instead add enough MRM_XX formats to ↵Craig Topper2014-02-192-28/+63
| | | | | | handle all the FP operations. This increases format by 1 bit, but decreases opcode map by 1 bit so the TSFlags size doesn't change. llvm-svn: 201649
* Reduce size of map field in X86 TSFlags since it now requires less bits.Craig Topper2014-02-191-2/+2
| | | | llvm-svn: 201646
* Put some of the X86 formats in a more logical order.Craig Topper2014-02-191-16/+16
| | | | llvm-svn: 201645
* Remove A6/A7 opcode maps. They can all be handled with a TB map, opcode of ↵Craig Topper2014-02-192-36/+27
| | | | | | 0xa6/0xa7, and adding MRM_C0/MRM_E0 forms. Removes 376K from the disassembler tables. llvm-svn: 201641
* Add an x86 prefix encoding for instructions that would decode to a different ↵Craig Topper2014-02-181-6/+6
| | | | | | instruction with 0xf2/f3/66 were in front of them, but don't themselves have a prefix. For now this doesn't change any bbehavior, but plan to use it to fix some bugs in the disassembler. llvm-svn: 201538
* Re-commit: Demote EmitRawText call in AsmPrinter::EmitInlineAsm() and remove ↵Daniel Sanders2014-02-131-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | hasRawTextSupport() call Summary: AsmPrinter::EmitInlineAsm() will no longer use the EmitRawText() call for targets with mature MC support. Such targets will always parse the inline assembly (even when emitting assembly). Targets without mature MC support continue to use EmitRawText() for assembly output. The hasRawTextSupport() check in AsmPrinter::EmitInlineAsm() has been replaced with MCAsmInfo::UseIntegratedAs which when true, causes the integrated assembler to parse inline assembly (even when emitting assembly output). UseIntegratedAs is set to true for targets that consider any failure to parse valid assembly to be a bug. Target specific subclasses generally enable the integrated assembler in their constructor. The default value can be overridden with -no-integrated-as. All tests that rely on inline assembly supporting invalid assembly (for example, those that use mnemonics such as 'foo' or 'hello world') have been updated to disable the integrated assembler. Changes since review (and last commit attempt): - Fixed test failures that were missed due to configuration of local build. (fixes crash.ll and a couple others). - Fixed tests that happened to pass because the local build was on X86 (should fix 2007-12-17-InvokeAsm.ll) - mature-mc-support.ll's should no longer require all targets to be compiled. (should fix ARM and PPC buildbots) - Object output (-filetype=obj and similar) now forces the integrated assembler to be enabled regardless of default setting or -no-integrated-as. (should fix SystemZ buildbots) Reviewers: rafael Reviewed By: rafael CC: llvm-commits Differential Revision: http://llvm-reviews.chandlerc.com/D2686 llvm-svn: 201333
* Revert r201237+r201238: Demote EmitRawText call in ↵Daniel Sanders2014-02-121-10/+0
| | | | | | | | AsmPrinter::EmitInlineAsm() and remove hasRawTextSupport() call It introduced multiple test failures in the buildbots. llvm-svn: 201241
* Demote EmitRawText call in AsmPrinter::EmitInlineAsm() and remove ↵Daniel Sanders2014-02-121-0/+10
| | | | | | | | | | | | | | | | | | | | | hasRawTextSupport() call Summary: AsmPrinter::EmitInlineAsm() will no longer use the EmitRawText() call for targets with mature MC support. Such targets will always parse the inline assembly (even when emitting assembly). Targets without mature MC support continue to use EmitRawText() for assembly output. The hasRawTextSupport() check in AsmPrinter::EmitInlineAsm() has been replaced with MCAsmInfo::UseIntegratedAs which when true, causes the integrated assembler to parse inline assembly (even when emitting assembly output). UseIntegratedAs is set to true for targets that consider any failure to parse valid assembly to be a bug. Target specific subclasses generally enable the integrated assembler in their constructor. The default value can be overridden with -no-integrated-as. All tests that rely on inline assembly supporting invalid assembly (for example, those that use mnemonics such as 'foo' or 'hello world') have been updated to disable the integrated assembler. Reviewers: rafael Reviewed By: rafael CC: llvm-commits Differential Revision: http://llvm-reviews.chandlerc.com/D2686 llvm-svn: 201237
* Recommit r201059 and r201060 with hopefully a fix for its original failure.Craig Topper2014-02-102-4/+18
| | | | | | | | | | Original commits messages: Add MRMXr/MRMXm form to X86 for use by instructions which treat the 'reg' field of modrm byte as a don't care value. Will allow for simplification of disassembler code. Simplify a bunch of code by removing the need for the x86 disassembler table builder to know about extended opcodes. The modrm forms are sufficient to convey the information. llvm-svn: 201065
* Revert r201059 and r201060.Bob Wilson2014-02-102-17/+4
| | | | | | | | r201059 appears to cause a crash in a bootstrapped build of clang. Craig isn't available to look at it right now, so I'm reverting it while he investigates. llvm-svn: 201064
* Add MRMXr/MRMXm form to X86 for use by instructions which treat the 'reg' ↵Craig Topper2014-02-102-4/+17
| | | | | | field of modrm byte as a don't care value. Will allow for simplification of disassembler code. llvm-svn: 201059
* don't set HasReliableSymbolDifference for ELF.Rafael Espindola2014-02-061-3/+1
| | | | | | | It is only used in MachObjectWriter.cpp. Another leftover from early days of ELF in MC. llvm-svn: 200895
* doesSectionRequireSymbols is meaningless on ELF, remove.Rafael Espindola2014-02-061-5/+0
| | | | | | | | | | | | | | | | | | | | This is a nop. doesSectionRequireSymbols is only used from isSymbolLinkerVisible. isSymbolLinkerVisible only use from ELF was in if (!Asm.isSymbolLinkerVisible(Symbol) && !Symbol.isUndefined()) return false; if (Symbol.isTemporary()) return false; If the symbol is a temporary this code returns false and it is irrelevant if we take the first if or not. If the symbol is not a temporary, Asm.isSymbolLinkerVisible returns true without ever calling doesSectionRequireSymbols. This was an horrible leftover from when support for ELF was first added. llvm-svn: 200894
* AVX-512: fixed a bug in EVEX encoding (the bug appeared after r200624)Elena Demikhovsky2014-02-051-2/+4
| | | | llvm-svn: 200837
* Merge x86 HasOpSizePrefix/HasOpSize16Prefix into a 2-bit OpSize field with 0 ↵Craig Topper2014-02-022-10/+14
| | | | | | meaning no 0x66 prefix in any mode. Rename Opsize16->OpSize32 and OpSize->OpSize16. The classes now refer to their operand size rather than the mode in which they need a 0x66 prefix. Hopefully can merge REX_W into this as OpSize64. llvm-svn: 200626
* Merge HasVEXPrefix/HasEVEXPrefix/HasXOPPrefix into a 2-bit 'encoding' field ↵Craig Topper2014-02-022-60/+70
| | | | | | in TSFlags. llvm-svn: 200624
* Separate x86 opcode maps and 0x66/0xf2/0xf3 prefixes from each other in the ↵Craig Topper2014-01-312-128/+67
| | | | | | TSFlags. This greatly simplifies the switch statements in the disassembler tables and the code emitters. llvm-svn: 200522
* Move REP out of the Prefix field of the X86 format. Give it its own bit. It ↵Craig Topper2014-01-312-12/+11
| | | | | | had special handling anyway and this enables a future patch. llvm-svn: 200520
* Move address override handling in X86MCCodeEmitter to a place where it works ↵Craig Topper2014-01-311-46/+43
| | | | | | for VEX encoded instructions too. This allows 32-bit addressing to work in 64-bit mode. llvm-svn: 200516
* [x86] Fix signed relocations for i64i32imm operandsDavid Woodhouse2014-01-302-13/+31
| | | | | | | | | These should end up (in ELF) as R_X86_64_32S relocs, not R_X86_64_32. Kill the horrid and incomplete special case and FIXME in EncodeInstruction() and set things up so it can infer the signedness from the ImmType just like it can the size and whether it's PC-relative. llvm-svn: 200495
* Simplify the handling of iterators in ObjectFile.Rafael Espindola2014-01-301-4/+4
| | | | | | | | | | | | None of the object file formats reported error on iterator increment. In retrospect, that is not too surprising: no object format stores symbols or sections in a linked list or other structure that requires chasing pointers. As a consequence, all error checking can be done on begin() and end(). This reduces the text segment of bin/llvm-readobj in my machine from 521233 to 518526 bytes. llvm-svn: 200442
* Delete MCSubtargetInfo data members from target MCCodeEmitter classesDavid Woodhouse2014-01-281-38/+38
| | | | | | | | The subtarget info is explicitly passed to the EncodeInstruction method and we should use that subtarget info to influence any encoding decisions. llvm-svn: 200350
* Explictly pass MCSubtargetInfo to MCCodeEmitter::EncodeInstruction()David Woodhouse2014-01-281-2/+4
| | | | llvm-svn: 200348
* Pass a MCSubtargetInfo down to the TargetStreamer creation.Rafael Espindola2014-01-261-0/+1
| | | | | | | With this the target streamers will be able to know the target features that are in use. llvm-svn: 200135
* Construct the MCStreamer before constructing the MCTargetStreamer.Rafael Espindola2014-01-261-1/+1
| | | | | | | | | | This has a few advantages: * Only targets that use a MCTargetStreamer have to worry about it. * There is never a MCTargetStreamer without a MCStreamer, so we can use a reference. * A MCTargetStreamer can talk to the MCStreamer in its constructor. llvm-svn: 200129
* [x86] Silence unused diReg variable warning in non-asserting buildsDavid Woodhouse2014-01-221-4/+3
| | | | llvm-svn: 199812
* ]x86] Allow segment and address-size overrides for CMPS[BWLQ] (PR9385)David Woodhouse2014-01-222-0/+24
| | | | llvm-svn: 199806
* [x86] Allow address-size overrides for STOS[BWLQ] (PR9385)David Woodhouse2014-01-222-0/+15
| | | | llvm-svn: 199804
* [x86] Allow segment and address-size overrides for LODS[BWLQ] (PR9385)David Woodhouse2014-01-222-0/+18
| | | | llvm-svn: 199803
* [x86] Support i386-*-*-code16 triple for emitting 16-bit codeDavid Woodhouse2014-01-201-1/+4
| | | | llvm-svn: 199648
* Replace duplicated code with a existing helper function.Craig Topper2014-01-171-16/+1
| | | | llvm-svn: 199468
* Allow x86 mov instructions to/from memory with absolute address to be ↵Craig Topper2014-01-162-13/+25
| | | | | | encoded and disassembled with a segment override prefix. Fixes PR16962. llvm-svn: 199364
* Remove use of OpSize for populating VEX_PP field. A prefix encoding is now ↵Craig Topper2014-01-161-10/+4
| | | | | | used instead. Simplify some other code. No functional changes intended. llvm-svn: 199353
* Separate the concept of 16-bit/32-bit operand size controlled by 0x66 prefix ↵Craig Topper2014-01-142-0/+29
| | | | | | | | and the current mode from the concept of SSE instructions using 0x66 prefix as part of their encoding without being affected by the mode. This should allow SSE instructions to be encoded correctly in 16-bit mode which r198586 probably broke. llvm-svn: 199193
* AVX-512: Embedded Rounding Control - encoding and printingElena Demikhovsky2014-01-132-10/+18
| | | | | | Changed intrinsics for vrcp14/vrcp28 vrsqrt14/vrsqrt28 - aligned with GCC. llvm-svn: 199102
* [x86] Support R_386_PC8, R_386_PC16 and R_X86_64_PC8David Woodhouse2014-01-081-0/+23
| | | | llvm-svn: 198763
* [x86] Do not relax PUSHi16 to PUSHi32 (PR18414)David Woodhouse2014-01-081-3/+3
| | | | | | | | They do *different* things to %esp, so they are not equivalent. Rename PUSHi8 to PUSH32i8 and add the missing PUSH16i8. llvm-svn: 198761
* [x86] Fix MOV8ao8 et al for 16-bit mode, fix up disassembler to understandDavid Woodhouse2014-01-081-4/+9
| | | | | | | | | | It seems there is no separate instruction class for having AdSize *and* OpSize bits set, which is required in order to disambiguate between all these instructions. So add that to the disassembler. Hm, perhaps we do need an AdSize16 bit after all? llvm-svn: 198759
* [x86] Use 16-bit addressing where possible in 16-bit modeDavid Woodhouse2014-01-081-14/+18
| | | | | | | | | Where "where possible" means that it's an immediate value and it's below 0x10000. In fact GAS will either truncate or error with larger values, and will insist on using the addr32 prefix to get 32-bit addressing. So perhaps we should do that, in a later patch. llvm-svn: 198758
* [x86] Fix JCXZ,JECXZ_32 for 16-bit modeDavid Woodhouse2014-01-081-1/+5
| | | | | | | JCXZ should have the 0x67 prefix only if we're in 32-bit mode, so make that appropriately conditional. And JECXZ needs the prefix instead. llvm-svn: 198757
* [patch] Adjust behavior of FDE cross-section relocs for targets that don't ↵Iain Sandoe2014-01-081-0/+5
| | | | | | | | | | | | support abs-differences. Modern versions of OSX/Darwin's ld (ld64 > 97.17) have an optimisation present that allows the back end to omit relocations (and replace them with an absolute difference) for FDE some text section refs. This patch allows a backend to opt-in to this behaviour by setting "DwarfFDESymbolsUseAbsDiff". At present, this is only enabled for modern x86 OSX ports. test changes by David Fang. llvm-svn: 198744
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