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* X86: Produce @ABS8 symbol modifiers for absolute symbols in range [0,128).Peter Collingbourne2017-02-021-1/+6
| | | | | | Differential Revision: https://reviews.llvm.org/D28689 llvm-svn: 293844
* MC: Introduce the ABS8 symbol modifier.Peter Collingbourne2017-01-311-0/+2
| | | | | | | | | | | @ABS8 can be applied to symbols which appear as immediate operands to instructions that have a 8-bit immediate form for that operand. It causes the assembler to use the 8-bit form and an 8-bit relocation (e.g. R_386_8 or R_X86_64_8) for the symbol. Differential Revision: https://reviews.llvm.org/D28688 llvm-svn: 293667
* [LMT] Restrict nop length to oneAsaf Badouh2016-12-011-2/+2
| | | | | | | | | not all lakemont MCU support long nop. we can't assume we can generate long nop by default for MCU. Differential Revision: https://reviews.llvm.org/D26895 llvm-svn: 288363
* Revert r283690, "MC: Remove unused entities."Peter Collingbourne2016-10-101-1/+1
| | | | llvm-svn: 283814
* Move the global variables representing each Target behind accessor functionMehdi Amini2016-10-092-4/+5
| | | | | | | | This avoids "static initialization order fiasco" Differential Revision: https://reviews.llvm.org/D25412 llvm-svn: 283702
* MC: Remove unused entities.Peter Collingbourne2016-10-091-1/+1
| | | | llvm-svn: 283691
* Turn cl::values() (for enum) from a vararg function to using C++ variadic ↵Mehdi Amini2016-10-081-2/+1
| | | | | | | | | | | | | | | template The core of the change is supposed to be NFC, however it also fixes what I believe was an undefined behavior when calling: va_start(ValueArgs, Desc); with Desc being a StringRef. Differential Revision: https://reviews.llvm.org/D25342 llvm-svn: 283671
* [AVX-512] Add support for commuting VPTERNLOG instructions.Craig Topper2016-09-221-0/+10
| | | | | | | | | | VPTERNLOG is a ternary instruction with an immediate specifying the logical operation to perform. For each bit position in the 3 source vectors the bit from each source is concatenated together and the resulting 3-bit value is used to select a bit in the immediate. This bit value is written to the result vector. We can commute this by swapping operands and modifying the immediate. To modify the immediate we need to swap two pairs of bits. The pairs correspond to the locations in the immediate where the commuted operands bits have opposite values and the uncommuted operand has the same value. Bits 0 and 7 will never be swapped since the relevant bits from all sources are the same value. This refactors and reuses parts of the FMA3 commuting code which is also a three operand instruction. llvm-svn: 282132
* X86: loosen an overly aggressive MachO assertionSaleem Abdulrasool2016-09-201-2/+6
| | | | | | | | | | | | | We would assert that the FP setup CFI used esp/rsp always. This held up in practice when the code was generated from IR. However, with the integrated assembler, it is possible to have the input be user specified assembly. In such a case, we cannot assume that the function implementation has a compact unwind representation. Loosen the assertion into a check and bail if we cannot represent the frame pointer in the compact unwinding. Addresses PR30453! llvm-svn: 281986
* [X86] Rename predicate function that detects if requires one of the REX.B, ↵Craig Topper2016-08-271-15/+16
| | | | | | REX.X or REX.R bits. It's old name conflicted with a function in X8II namespace that doesnt' quite do the same thing. NFC llvm-svn: 279924
* [X86] Keep looping over operands looking for byte registers even if we ↵Craig Topper2016-08-271-5/+4
| | | | | | already found a register that requires a REX prefix. Otherwise we don't error if a high byte register is used after SPL/BPL/DIL/SIL. llvm-svn: 279923
* [X86] Include XMM/YMM/ZMM16-23 in X86II::isX86_64ExtendedReg. This feels ↵Craig Topper2016-08-271-6/+3
| | | | | | more consistent with its name and simplifies assembler code. llvm-svn: 279922
* [X86] Don't allow DR8-DR15 to be assembled in 32-bit mode. Add missing test ↵Craig Topper2016-08-271-0/+2
| | | | | | for CR8-CR15. llvm-svn: 279921
* [X86] Simplify getOperandBias as a bit. NFCCraig Topper2016-08-251-12/+11
| | | | | | There's no reason for it to return a signed type. Just return the operand bias in each if instead of starting from 0 and adding in the 'if'. llvm-svn: 279720
* [X86] Create a new instruction format to handle 4VOp3 encoding. This saves ↵Craig Topper2016-08-222-23/+65
| | | | | | one bit in TSFlags and simplifies MRMSrcMem/MRMSrcReg format handling. llvm-svn: 279424
* [X86] Create a new instruction format to handle MemOp4 encoding. This saves ↵Craig Topper2016-08-222-24/+80
| | | | | | one bit in TSFlags and simplifies MRMSrcMem/MRMSrcReg format handling. llvm-svn: 279423
* [X86] Space out the encodings of X86 instruction formats. I plan to add some ↵Craig Topper2016-08-221-55/+61
| | | | | | | | new encodings in future commits and this will reduce the size of those commits. NFC This tries to keep all the ModRM memory and register forms in their own regions of the encodings. Hoping to make it simple on some of the switch statements that operate on these encodings. llvm-svn: 279422
* [X86] Merge hasVEX_i8ImmReg into the ImmFormat type which had extra unused ↵Craig Topper2016-08-222-28/+26
| | | | | | encodings. This saves one bit in TSFlags. NFC llvm-svn: 279412
* [X86] Remove ignoreVEX_L from TSFlags. Only the disassembler needs it and ↵Craig Topper2016-08-221-14/+1
| | | | | | the disassembler doesn't use TSFlags. NFC llvm-svn: 279411
* MC] Provide an MCTargetOptions to implementors of MCAsmBackendCtorTy, NFCJoel Jones2016-07-252-4/+9
| | | | | | | | | | | | | | | Some targets, notably AArch64 for ILP32, have different relocation encodings based upon the ABI. This is an enabling change, so a future patch can use the ABIName from MCTargetOptions to chose which relocations to use. Tested using check-llvm. The corresponding change to clang is in: http://reviews.llvm.org/D16538 Patch by: Joel Jones Differential Revision: https://reviews.llvm.org/D16213 llvm-svn: 276654
* Add missing include from previous commitNirav Dave2016-07-111-0/+1
| | | | llvm-svn: 275069
* Fix branch relaxation in 16-bit mode.Nirav Dave2016-07-111-30/+52
| | | | | | | | | | | | | | | Thread through MCSubtargetInfo to relaxInstruction function allowing relaxation to generate jumps with 16-bit sized immediates in 16-bit mode. This fixes PR22097. Reviewers: dwmw2, tstellarAMD, craig.topper, jyknight Subscribers: jfb, arsenm, jyknight, llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D20830 llvm-svn: 275068
* Don't crash trying to relax 32 loads on COFF.Rafael Espindola2016-07-071-0/+1
| | | | | | Fixes pr28452. llvm-svn: 274754
* Add initial support for R_386_GOT32X.Rafael Espindola2016-07-066-9/+29
| | | | | | This adds it only for movl mov@GOT(%reg), %reg. llvm-svn: 274678
* Delete MCCodeGenInfo.Rafael Espindola2016-06-301-10/+3
| | | | | | | MC doesn't really care about CodeGen stuff, so this was just complicating target initialization. llvm-svn: 274258
* Drop support for creating $stubs.Rafael Espindola2016-06-291-5/+0
| | | | | | They are created by ld64 since OS X 10.5. llvm-svn: 274130
* [codeview] Add EFLAGS to the list of CodeView register numbersReid Kleckner2016-06-221-1/+3
| | | | llvm-svn: 273516
* Fix a crash when producing COFF.Rafael Espindola2016-05-301-0/+2
| | | | llvm-svn: 271229
* Move RelaxELFRel out to llvm-mc.Rafael Espindola2016-05-291-6/+0
| | | | llvm-svn: 271160
* Fix production of R_X86_64_GOTPCRELX/R_X86_64_REX_GOTPCRELX.Rafael Espindola2016-05-285-31/+70
| | | | | | | | We were producing R_X86_64_GOTPCRELX for invalid instructions and sometimes producing R_X86_64_GOTPCRELX instead of R_X86_64_REX_GOTPCRELX. llvm-svn: 271118
* Simplify and clang-format a table.Rafael Espindola2016-05-281-5/+5
| | | | llvm-svn: 271112
* Delete Reloc::Default.Rafael Espindola2016-05-181-31/+0
| | | | | | | | | | | | Having an enum member named Default is quite confusing: Is it distinct from the others? This patch removes that member and instead uses Optional<Reloc> in places where we have a user input that still hasn't been maped to the default value, which is now clear has no be one of the remaining 3 options. llvm-svn: 269988
* Simplify handling of hidden stub.Rafael Espindola2016-05-171-6/+0
| | | | | | | | | Since r207518 they are printed exactly like non-hidden stubs on x86 and since r207517 on ARM. This means we can use a single set for all stubs in those platforms. llvm-svn: 269776
* X86-Darwin: start emitting data-region directives for jump-tables.Tim Northover2016-05-031-1/+1
| | | | | | The surrounding tools can cope these days, and they were invented for a reason. llvm-svn: 268437
* [X86] Remove unused operand from a function and all its callers. NFCCraig Topper2016-04-282-2/+2
| | | | llvm-svn: 267854
* [MC/ELF] Implement support for GOTPCRELX/REX_GOTPCRELX.Davide Italiano2016-04-242-5/+25
| | | | | | | | | The option to control the emission of the new relocations is -relax-relocations (blatantly copied from GNU as). It can't be enabled by default because it breaks relatively recent versions of ld.bfd/ld.gold (late 2015). llvm-svn: 267307
* [MC/ELF] Pass Fixup to getRelocType64.Davide Italiano2016-04-231-2/+3
| | | | | | In preparation for other changes. llvm-svn: 267300
* [NFC] Header cleanupMehdi Amini2016-04-181-1/+0
| | | | | | | | | | | | | | Removed some unused headers, replaced some headers with forward class declarations. Found using simple scripts like this one: clear && ack --cpp -l '#include "llvm/ADT/IndexedMap.h"' | xargs grep -L 'IndexedMap[<]' | xargs grep -n --color=auto 'IndexedMap' Patch by Eugene Kosov <claprix@yandex.ru> Differential Revision: http://reviews.llvm.org/D19219 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 266595
* [X86] Restrict max long nop length for Lakemont.Andrey Turetskiy2016-04-111-1/+2
| | | | | | | | | Restrict the max length of long nops for Lakemont to 7. Experiments on MCU benchmarks (Dhrystone, Coremark) show that this is the most optimal length. Differential Revision: http://reviews.llvm.org/D18897 llvm-svn: 265924
* [MC] support TLSDESC and TLSCALL / GNU2 tls dialectDavide Italiano2016-04-091-0/+4
| | | | | | Differential Revision: http://reviews.llvm.org/D18885 llvm-svn: 265881
* [X86] Use high bits of return value from getEncoding instead of predicate ↵Craig Topper2016-03-061-162/+101
| | | | | | functions to populate the REX and VEX prefix bits that extend register encodings. NFC llvm-svn: 262800
* [X86] Remove unnecessary masking. The assert above it already guaranteed it. NFCCraig Topper2016-03-061-2/+0
| | | | llvm-svn: 262799
* [X86] Use uint8_t instead of unsigned char as it shortens the code and more ↵Craig Topper2016-03-061-27/+26
| | | | | | explicitly reflects the desired size. llvm-svn: 262798
* [X86] Remove unnecessary call to isReg from emitter's DestMem handling for ↵Craig Topper2016-03-021-7/+5
| | | | | | VEX prefix. The operand is always a register. NFC llvm-svn: 262468
* [X86] Make X86MCCodeEmitter::DetermineREXPrefix locate operands more like ↵Craig Topper2016-03-021-54/+50
| | | | | | how VEX prefix handling does. llvm-svn: 262467
* [X86] Remove assertion I accidentally left in.Craig Topper2016-03-021-1/+0
| | | | llvm-svn: 262464
* [X86] Be more structured about how we capture the register number when it is ↵Craig Topper2016-03-021-41/+39
| | | | | | | | | | encoded in bits 7:4 of the immediate. For some instructions the register is not the last operand and the immediate handling had to detect this and hardcode the index to find it. It also required CurOp to be pointing at the last operand handled in the Form switch whereas for any instruction it would be pointing at the next operand. Now we just capture the value in the Form switch when we know exactly where it is and the CurOp pointer can behave normally. llvm-svn: 262462
* [X86] Use MCPhysReg and uint16_t for static arrays of registers and opcodes ↵Craig Topper2016-03-021-2/+2
| | | | | | respectively should reduce size tiny bit. NFC llvm-svn: 262458
* [X86] Centralize the masking of TSFlags with FormMask into a variable ↵Craig Topper2016-03-011-6/+3
| | | | | | earlier so we can stop masking in multiple places. NFC llvm-svn: 262312
* [X86] Localize a temporary variable into the cases its need in. NFCCraig Topper2016-03-011-10/+9
| | | | llvm-svn: 262310
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