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path: root/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h
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* More refactoring.Evan Cheng2011-07-251-0/+11
| | | | llvm-svn: 135939
* Refactor X86 target to separate MC code from Target code.Evan Cheng2011-07-251-0/+8
| | | | llvm-svn: 135930
* Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo downEvan Cheng2011-07-181-1/+24
| | | | | | | | | to MCRegisterInfo. Also initialize the mapping at construction time. This patch eliminate TargetRegisterInfo from TargetAsmInfo. It's another step towards fixing the layering violation. llvm-svn: 135424
* Next round of MC refactoring. This patch factor MC table instantiations, MCEvan Cheng2011-07-141-0/+3
| | | | | | registeration and creation code into XXXMCDesc libraries. llvm-svn: 135184
* Eliminate asm parser's dependency on TargetMachine:Evan Cheng2011-07-081-0/+9
| | | | | | | | | | - Each target asm parser now creates its own MCSubtatgetInfo (if needed). - Changed AssemblerPredicate to take subtarget features which tablegen uses to generate asm matcher subtarget feature queries. e.g. "ModeThumb,FeatureThumb2" is translated to "(Bits & ModeThumb) != 0 && (Bits & FeatureThumb2) != 0". llvm-svn: 134678
* Add Mode64Bit feature and sink it down to MC layer.Evan Cheng2011-07-071-0/+14
| | | | llvm-svn: 134641
* Rename files for consistency.Evan Cheng2011-07-061-0/+34
llvm-svn: 134546
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