summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/X86/InstPrinter/X86InstComments.cpp
Commit message (Collapse)AuthorAgeFilesLines
* [X86] Don't pass getRegisterName from the InstPrinters into ↵Craig Topper2018-03-291-8/+10
| | | | | | | | EmitAnyX86InstComments. Just always use the function from the ATTPrinter. NFC The IntelPrinter and the ATTPrinter produce the same strings for the same input. We already use the ATTPrinter explicitly in several other places. llvm-svn: 328762
* [X86] Remove use of MVT class from the ShuffleDecode library.Craig Topper2018-03-121-105/+87
| | | | | | | | MVT belongs to the CodeGen layer, but ShuffleDecode is used by the X86 InstPrinter which is part of the MC layer. This only worked because MVT is completely implemented in a header file with no other library dependencies. Differential Revision: https://reviews.llvm.org/D44353 llvm-svn: 327292
* [X86] Add comments to the end of FMA3 instructions to make the operation clearCraig Topper2018-03-101-0/+286
| | | | | | | | | | | | | | | | | | | | | Summary: There are 3 different operand orders for FMA instructions so figuring out the exact operation being performed requires a lot of thought. This patch adds a comment to the end of the assembly line to print the exact operation. I think I've got all the instructions in here except the ones with builtin rounding. I didn't update all tests, but I assume we can get them as we regenerate tests in the future. Reviewers: spatel, v_klochkov, RKSimon Reviewed By: spatel Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D44345 llvm-svn: 327225
* [X86] Add a missing EVEX instruction to EmitAnyX86InstComments.Craig Topper2018-03-101-0/+1
| | | | | | The equivalent SSE and VEX instruction are already there. llvm-svn: 327205
* [X86] Rewrite printMasking code in X86InstComments to use TSFlags to ↵Craig Topper2018-03-101-187/+16
| | | | | | | | determine whether the instruction is masked. This should have been NFC, but it looks like we were missing PUNPCKLHQDQ/PUNPCKLQDQ instructions in there. llvm-svn: 327200
* [X86] Fix a few instructions that were named Z512 instead of just Z.Craig Topper2017-12-101-4/+4
| | | | | | This makes things consistent with our normal instruction naming. llvm-svn: 320316
* [X86] Remove temporary std::string creation from shuffle comment printing. ↵Craig Topper2017-10-111-12/+12
| | | | | | We can just write directly to the raw_ostream. llvm-svn: 315399
* [X86] Add 128-bit version of vbroadcasti32x2 to shuffle comment decoding.Craig Topper2017-10-111-0/+11
| | | | llvm-svn: 315395
* [X86][SSE4A] Generalized EXTRQI/INSERTQI shuffle decodesSimon Pilgrim2017-07-041-2/+2
| | | | | | The existing decodes only worked for v16i8 vectors, this adds support for any 128-bit vector llvm-svn: 307095
* Sort the remaining #include lines in include/... and lib/....Chandler Carruth2017-06-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | I did this a long time ago with a janky python script, but now clang-format has built-in support for this. I fed clang-format every line with a #include and let it re-sort things according to the precise LLVM rules for include ordering baked into clang-format these days. I've reverted a number of files where the results of sorting includes isn't healthy. Either places where we have legacy code relying on particular include ordering (where possible, I'll fix these separately) or where we have particular formatting around #include lines that I didn't want to disturb in this patch. This patch is *entirely* mechanical. If you get merge conflicts or anything, just ignore the changes in this patch and run clang-format over your #include lines in the files. Sorry for any noise here, but it is important to keep these things stable. I was seeing an increasing number of patches with irrelevant re-ordering of #include lines because clang-format was used. This patch at least isolates that churn, makes it easy to skip when resolving conflicts, and gets us to a clean baseline (again). llvm-svn: 304787
* Added LLVM_FALLTHROUGH to address warning: this statement may fall through. NFC.Galina Kistanova2017-05-311-0/+4
| | | | llvm-svn: 304332
* This patch closes PR#32216: Better testing of schedule model instruction ↵Andrew V. Tischenko2017-04-141-2/+0
| | | | | | | | latencies/throughputs. The details are here: https://reviews.llvm.org/D30941 llvm-svn: 300311
* [X86] Remove alternate CodeGenOnly version of (v)movq that declared the load ↵Craig Topper2016-11-221-3/+0
| | | | | | | | | | size as i128mem. Change all uses to the use the i64mem version. I'm sure this caused the load size to misprint in Intel syntax output. We were also inconsistent about which patterns used which instruction between VEX and EVEX. There are two different reg/reg versions of movq, one from a GPR and one from the lower 64-bits of an XMM register. This changes the loading folding table to use the single i64mem memory form for folding both cases. But we need to use TB_NO_REVERSE to prevent a duplicate entry in the unfolding table. llvm-svn: 287622
* [X86] Remove duplicate instructions for (v)movq and replace with patterns on ↵Craig Topper2016-11-211-2/+0
| | | | | | other instructions. NFC llvm-svn: 287519
* [X86] Add support for printing shuffle comments for VALIGN instructions.Craig Topper2016-10-221-0/+44
| | | | llvm-svn: 284915
* [X86][AVX512] Add mask/maskz writemask support to subvector broadcast ↵Simon Pilgrim2016-10-211-0/+40
| | | | | | shuffle decode comments llvm-svn: 284821
* [AVX-512] Add shuffle comments for vbroadcast instructions.Craig Topper2016-10-151-0/+43
| | | | llvm-svn: 284305
* Replace a few more "fall through" comments with LLVM_FALLTHROUGHJustin Bogner2016-08-171-41/+77
| | | | | | Follow up to r278902. I had missed "fall through", with a space. llvm-svn: 278970
* [X86] Rename VINSERTzrr to use a capital Z to match other instructions. NFCCraig Topper2016-07-191-2/+2
| | | | llvm-svn: 275939
* [X86][AVX] Add VBROADCASTF128/VBROADCASTI128 shuffle comments supportSimon Pilgrim2016-07-141-0/+6
| | | | llvm-svn: 275400
* [X86][AVX512] Add support for VPERMPD/VPERMQ masked shuffle commentsSimon Pilgrim2016-07-031-0/+16
| | | | llvm-svn: 274469
* [X86][AVX512] Add support for 512-bit shuffle decoding of VPERMPD/VPERMQSimon Pilgrim2016-07-031-17/+20
| | | | llvm-svn: 274468
* [X86][AVX] Renamed VPERMILPI shuffle comment macros to be more specificSimon Pilgrim2016-07-031-27/+27
| | | | llvm-svn: 274467
* [X86][AVX512] Add support for VPALIGNR/PSHUFD/PSHUFHW/PSHUFLW masked shuffle ↵Simon Pilgrim2016-07-031-0/+16
| | | | | | comments llvm-svn: 274466
* [X86][AVX512] Add support for UNPCK masked shuffle commentsSimon Pilgrim2016-07-031-1/+51
| | | | llvm-svn: 274464
* [X86][AVX512] Add support for VPERM/VSHUF masked shuffle commentsSimon Pilgrim2016-07-031-0/+56
| | | | llvm-svn: 274462
* [X86][AVX512] Add support for PMOVZX masked shuffle commentsSimon Pilgrim2016-07-031-0/+34
| | | | llvm-svn: 274461
* [X86][AVX512] Add support for masked shuffle commentsSimon Pilgrim2016-07-031-2/+53
| | | | | | | | | | This patch adds support for including the avx512 mask register information in the mask/maskz versions of shuffle instruction comments. This initial version just adds support for MOVDDUP/MOVSHDUP/MOVSLDUP to reduce the mass of test regenerations, other shuffle instructions can be added in due course. Differential Revision: http://reviews.llvm.org/D21953 llvm-svn: 274459
* [X86][AVX512] Tidied up VSHUFF32x4/VSHUFF64x2/VSHUFI32x4/VSHUFI64x2 comment ↵Simon Pilgrim2016-06-111-35/+17
| | | | | | | | generation Now matches other shuffles llvm-svn: 272464
* [AVX512] Add shuffle comment printing for masked VPERMPD/VPERMQ.Craig Topper2016-06-101-1/+9
| | | | llvm-svn: 272371
* [AVX512] Fix shuffle comment printing to handle the masked versions of some ↵Craig Topper2016-06-101-30/+46
| | | | | | shuffles. Previously we were printing the mask operands as the register names. llvm-svn: 272367
* [X86][AVX512] Added avx512 VPSLLDQ/VPSRLDQ instruction commentsSimon Pilgrim2016-06-091-0/+12
| | | | llvm-svn: 272319
* [AVX512] Fix shuffle decode printing for several instructions with write ↵Craig Topper2016-06-091-3/+3
| | | | | | masks. There are still more bugs here with UNPCK and PALIGN for sure. But these were the easiest ones to fix. llvm-svn: 272252
* [X86] Bring consistent naming to the SSE/AVX and AVX512 PALIGNR ↵Craig Topper2016-06-091-6/+2
| | | | | | instructions. Then add shuffle decode printing for the EVEX forms which is made easier by having the naming structure more similar to other instructions. llvm-svn: 272249
* [AVX512] Fix shuffle comment printing for EVEX encoded PSHUFD, PSHUFHW, and ↵Craig Topper2016-06-031-29/+17
| | | | | | PSHUFLW. llvm-svn: 271628
* [AVX512] Disable AVX2 VPERMD, VPERMQ, VPERMPS, and VPERMPD patterns when ↵Craig Topper2016-05-211-0/+4
| | | | | | AVX512VL is enabled. Also add shuffle comment printing for AVX512VL VPERMPD/VPERMQ to keep some tests that now use these instructions instead of the AVX2 ones. llvm-svn: 270317
* [X86][AVX512] Fixed VPERMILPD/VPERMILPS shuffle comments.Simon Pilgrim2016-05-111-2/+2
| | | | | | Fixed incorrect operands indices used to access src registers llvm-svn: 269221
* [X86][SSE] Avoid repeatedly calling MCInst::getNumOperands(). NFCI.Simon Pilgrim2016-05-111-49/+49
| | | | llvm-svn: 269209
* [X86][AVX512] Updated shuffle comments instruction macros to split writemask ↵Simon Pilgrim2016-05-111-40/+46
| | | | | | | | instructions. NFC This will make it easier to support the different writemask cases in shuffle comments llvm-svn: 269174
* [X86][SSE] Added TODO comment to add support for AVX512 mask registers to ↵Simon Pilgrim2016-05-091-0/+1
| | | | | | | | shuffle comments This came up in discussion on D19198 llvm-svn: 268915
* [X86][SSE] Added support for MOVHPD/MOVLPD + MOVHPS/MOVLPS shuffle decoding.Simon Pilgrim2016-02-071-0/+32
| | | | llvm-svn: 260034
* [X86][AVX512] Added support for VPMOVZX shuffle decoding.Simon Pilgrim2016-02-061-75/+35
| | | | llvm-svn: 260007
* [X86][SSE] Moved shuffle decode CASE macros earlier. NFC.Simon Pilgrim2016-02-061-48/+48
| | | | | | To allow the helper functions to make use of them. llvm-svn: 259997
* [X86][SSE] Refactored PMOVZX shuffle decoding to use scalar input typesSimon Pilgrim2016-02-061-70/+44
| | | | | | | | First step towards being able to decode AVX512 PMOVZX instructions without a massive bloat in the shuffle decode switch statement. This should also make it easier to decode X86ISD::VZEXT target shuffles in the future. llvm-svn: 259995
* [X86][AVX512] Add support for AVX512 VMOVQ (load) shuffle decodingSimon Pilgrim2016-02-021-0/+1
| | | | llvm-svn: 259496
* [X86][AVX512] Add support for AVX512 VMOVD (load) shuffle decodingSimon Pilgrim2016-02-011-0/+1
| | | | llvm-svn: 259430
* [X86][AVX512] Add support for AVX512 VMOVSD/VMOVSS shuffle decodingSimon Pilgrim2016-02-011-0/+4
| | | | llvm-svn: 259427
* [X86][AVX512] Add support for AVX512 VINSERTPS shuffle decodingSimon Pilgrim2016-02-011-0/+2
| | | | llvm-svn: 259420
* [X86] Remove a return after llvm_unreachable.Craig Topper2015-12-311-1/+0
| | | | llvm-svn: 256681
* Fix line endingsSimon Pilgrim2015-12-131-14/+14
| | | | llvm-svn: 255459
OpenPOWER on IntegriCloud