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* Sort the remaining #include lines in include/... and lib/....Chandler Carruth2017-06-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | I did this a long time ago with a janky python script, but now clang-format has built-in support for this. I fed clang-format every line with a #include and let it re-sort things according to the precise LLVM rules for include ordering baked into clang-format these days. I've reverted a number of files where the results of sorting includes isn't healthy. Either places where we have legacy code relying on particular include ordering (where possible, I'll fix these separately) or where we have particular formatting around #include lines that I didn't want to disturb in this patch. This patch is *entirely* mechanical. If you get merge conflicts or anything, just ignore the changes in this patch and run clang-format over your #include lines in the files. Sorry for any noise here, but it is important to keep these things stable. I was seeing an increasing number of patches with irrelevant re-ordering of #include lines because clang-format was used. This patch at least isolates that churn, makes it easy to skip when resolving conflicts, and gets us to a clean baseline (again). llvm-svn: 304787
* [X86] Fix some Include What You Use warnings; other minor fixes (NFC).Eugene Zelenko2017-02-061-5/+9
| | | | | | This is preparation to reduce MCExpr.h dependencies.(vlsj-clangbuild)[622] llvm-svn: 294246
* [X86] Fix for bugzilla 31576 - add support for "data32" instruction prefixMarina Yatsina2017-01-181-0/+11
| | | | | | | | | | | This patch fixes bugzilla 31576 (https://llvm.org/bugs/show_bug.cgi?id=31576). "data32" instruction prefix was not defined in the llvm. An exception had to be added to the X86 tablegen and AsmPrinter because both "data16" and "data32" are encoded to 0x66 (but in different modes). Differential Revision: https://reviews.llvm.org/D28468 llvm-svn: 292352
* X86: Allow expressions to appear as u8imm operands.Peter Collingbourne2016-10-201-0/+3
| | | | llvm-svn: 284688
* [x86] avoid printing unnecessary sign bits of hex immediates in asm comments ↵Sanjay Patel2016-05-281-4/+13
| | | | | | | | | | | (PR20347) It would be better to check the valid/expected size of the immediate operand, but this is generally better than what we print right now. Differential Revision: http://reviews.llvm.org/D20385 llvm-svn: 271114
* clean up; NFCISanjay Patel2016-05-181-5/+4
| | | | llvm-svn: 269962
* [NFC] Header cleanupMehdi Amini2016-04-181-1/+0
| | | | | | | | | | | | | | Removed some unused headers, replaced some headers with forward class declarations. Found using simple scripts like this one: clear && ack --cpp -l '#include "llvm/ADT/IndexedMap.h"' | xargs grep -L 'IndexedMap[<]' | xargs grep -n --color=auto 'IndexedMap' Patch by Eugene Kosov <claprix@yandex.ru> Differential Revision: http://reviews.llvm.org/D19219 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 266595
* Remove extra forward declarations and scrub includes for all in tree ↵Craig Topper2015-12-251-0/+1
| | | | | | InstPrinters. NFC llvm-svn: 256427
* MC: Add target hook to control symbol quotingMatt Arsenault2015-06-091-4/+6
| | | | llvm-svn: 239370
* MC: Clean up MCExpr naming. NFC.Jim Grosbach2015-05-301-1/+1
| | | | llvm-svn: 238634
* Print "lock \t foo" instead of "lock \n foo".Rafael Espindola2015-05-261-1/+1
| | | | | | | | | | | This gets gas and llc -filetype=obj to agree on the order of prefixes. For llvm-mc we need to fix the asm parser to know that it makes a difference on which line the "lock" is in. Part of pr23594. llvm-svn: 238232
* Use std::bitset for SubtargetFeatures.Michael Kuperstein2015-05-261-1/+1
| | | | | | | | | | | | Previously, subtarget features were a bitfield with the underlying type being uint64_t. Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset. No functional change. The first several times this was committed (e.g. r229831, r233055), it caused several buildbot failures. Apparently the reason for most failures was both clang and gcc's inability to deal with large numbers (> 10K) of bitset constructor calls in tablegen-generated initializers of instruction info tables. This should now be fixed. llvm-svn: 238192
* Reverting r237234, "Use std::bitset for SubtargetFeatures"Michael Kuperstein2015-05-131-1/+1
| | | | | | | The buildbots are still not satisfied. MIPS and ARM are failing (even though at least MIPS was expected to pass). llvm-svn: 237245
* Use std::bitset for SubtargetFeaturesMichael Kuperstein2015-05-131-1/+1
| | | | | | | | | | | Previously, subtarget features were a bitfield with the underlying type being uint64_t. Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset. No functional change. The first two times this was committed (r229831, r233055), it caused several buildbot failures. At least some of the ARM and MIPS ones were due to gcc/binutils issues, and should now be fixed. llvm-svn: 237234
* [X86] Read the feature bits from the subtarget that is passed to printInstAkira Hatanaka2015-03-281-1/+1
| | | | | | instead of from MCInstPrinter::AvailableFeatures. llvm-svn: 233485
* Partially revert the changes I made in r233473 to keep the code concise.Akira Hatanaka2015-03-281-137/+47
| | | | llvm-svn: 233474
* clang-format X86ATTInstPrinter.{h,cpp} before I make changes to these files.Akira Hatanaka2015-03-281-74/+155
| | | | llvm-svn: 233473
* [MCInstPrinter] Enable MCInstPrinter to change its behavior based on theAkira Hatanaka2015-03-271-1/+1
| | | | | | | | | | | | | | | | | | | | per-function subtarget. Currently, code-gen passes the default or generic subtarget to the constructors of MCInstPrinter subclasses (see LLVMTargetMachine::addPassesToEmitFile), which enables some targets (AArch64, ARM, and X86) to change their instprinter's behavior based on the subtarget feature bits. Since the backend can now use different subtargets for each function, instprinter has to be changed to use the per-function subtarget rather than the default subtarget. This patch takes the first step towards enabling instprinter to change its behavior based on the per-function subtarget. It adds a bit "PassSubtarget" to AsmWriter which tells table-gen to pass a reference to MCSubtargetInfo to the various print methods table-gen auto-generates. I will follow up with changes to instprinters of AArch64, ARM, and X86. llvm-svn: 233411
* Revert "Use std::bitset for SubtargetFeatures"Michael Kuperstein2015-03-241-1/+1
| | | | | | | | This reverts commit r233055. It still causes buildbot failures (gcc running out of memory on several platforms, and a self-host failure on arm), although less than the previous time. llvm-svn: 233068
* Use std::bitset for SubtargetFeaturesMichael Kuperstein2015-03-241-1/+1
| | | | | | | | | | | | | Previously, subtarget features were a bitfield with the underlying type being uint64_t. Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset. No functional change. The first time this was committed (r229831), it caused several buildbot failures. At least some of the ARM ones were due to gcc/binutils issues, and should now be fixed. Differential Revision: http://reviews.llvm.org/D8542 llvm-svn: 233055
* Reverting r229831 due to multiple ARM/PPC/MIPS build-bot failures.Michael Kuperstein2015-02-191-1/+1
| | | | llvm-svn: 229841
* Use std::bitset for SubtargetFeaturesMichael Kuperstein2015-02-191-1/+1
| | | | | | | | | | | Previously, subtarget features were a bitfield with the underlying type being uint64_t. Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset. No functional change. Differential Revision: http://reviews.llvm.org/D7065 llvm-svn: 229831
* [X86] Add support for parsing and printing the mnemonic aliases for the XOP ↵Craig Topper2015-02-131-1/+17
| | | | | | VPCOM instructions. llvm-svn: 229078
* [X86] Merge printSSECC and printAVXCC. They only differed by an assertion.Craig Topper2015-01-281-15/+3
| | | | llvm-svn: 227301
* [x86] Change u8imm operands to always print as unsigned. This makes shuffle ↵Craig Topper2015-01-231-0/+7
| | | | | | masks and the like make way more sense. llvm-svn: 226902
* [x86] Assert on invalid immediates in the instruction printer for ↵Craig Topper2014-12-271-2/+4
| | | | | | cmp.ps/pd/ss/sd instead of truncating the immediate. The assembly parser and instruction selection shouldn't generate invalid immediates. llvm-svn: 224886
* Teach disassembler to handle illegal immediates on (v)cmpps/pd/ss/sd ↵Craig Topper2014-12-261-28/+14
| | | | | | instructions. Instead of rejecting we'll just generate the _alt forms that don't try to alter the mnemonic. While I'm here, merge some common code in the Instruction printers for the condition code replacement and fix the mask on SSE to be 3-bits instead of 4. llvm-svn: 224846
* [X86] Clean up whitespace as well as minor coding styleMichael Liao2014-12-041-2/+1
| | | | llvm-svn: 223339
* [x32] Emit callq for CALLpcrel32Pavel Chupin2014-09-091-1/+12
| | | | | | | | | | | | | | | | | Summary: In AT&T annotation for both x86_64 and x32 calls should be printed as callq in assembly. It's only a matter of correct mnemonic, object output is ok. Test Plan: trivial test added Reviewers: nadav, dschuff, craig.topper Subscribers: llvm-commits, zinovy.nis Differential Revision: http://reviews.llvm.org/D5213 llvm-svn: 217435
* [x86] Teach the asm comment printing to only print the clarification ofChandler Carruth2014-09-031-5/+10
| | | | | | | | | | an immediate operand when we don't have instruction-specific comments. This ensures that instruction-specific comments are attached to the same line as the instruction which is important for using them to write readable and maintainable tests. My next commit will just such a test. llvm-svn: 217099
* [Modules] Fix potential ODR violations by sinking the DEBUG_TYPEChandler Carruth2014-04-221-1/+2
| | | | | | | definition below all of the header #include lines, lib/Target/... edition. llvm-svn: 206842
* X86: Use enums for memory operand decoding instead of integer literals.Manuel Jacob2014-03-181-8/+8
| | | | | | | | | | | | | | | | Summary: X86BaseInfo.h defines an enum for the offset of each operand in a memory operand sequence. Some code uses it and some does not. This patch replaces (hopefully) all remaining locations where an integer literal was used instead of this enum. No functionality change intended. Reviewers: nadav CC: llvm-commits, t.p.northover Differential Revision: http://llvm-reviews.chandlerc.com/D3108 llvm-svn: 204158
* [x86] Allow address-size overrides for STOS[BWLQ] (PR9385)David Woodhouse2014-01-221-0/+11
| | | | llvm-svn: 199804
* [x86] Allow segment and address-size overrides for LODS[BWLQ] (PR9385)David Woodhouse2014-01-221-0/+19
| | | | llvm-svn: 199803
* Allow x86 mov instructions to/from memory with absolute address to be ↵Craig Topper2014-01-161-0/+7
| | | | | | encoded and disassembled with a segment override prefix. Fixes PR16962. llvm-svn: 199364
* AVX-512: Embedded Rounding Control - encoding and printingElena Demikhovsky2014-01-131-3/+1
| | | | | | Changed intrinsics for vrcp14/vrcp28 vrsqrt14/vrsqrt28 - aligned with GCC. llvm-svn: 199102
* AVX-512: Added intrinsics for vcvt, vcvtt, vrndscale, vcmpElena Demikhovsky2014-01-011-0/+12
| | | | | | | Printing rounding control. Enncoding for EVEX_RC (rounding control). llvm-svn: 198277
* First round of fixes for the x86 fixes for the x86 move accumulator from/to ↵Craig Topper2013-08-251-0/+16
| | | | | | | | | | | | | | memory offset instructions. -Assembly parser now properly check the size of the memory operation specified in intel syntax. So 'mov word ptr [5], al' is no longer accepted. -x86-32 disassembly of these instructions no longer sign extends the 32-bit address immediate based on size. -Intel syntax printing prints the ptr size and places brackets around the address immediate. Known remaining issues with these instructions: -Segment override prefix is not supported. PR16962 and PR16961. -Immediate size should be changed by address size prefix. llvm-svn: 189201
* Fixed the Intel-syntax X86 disassembler to respect the (existing) option for ↵Daniel Malea2013-08-011-2/+1
| | | | | | | | | hexadecimal immediates, to match AT&T syntax. This also brings a new option for C-vs-MASM-style hex. Patch by Richard Mitton Reviewed: http://llvm-reviews.chandlerc.com/D1243 llvm-svn: 187614
* Remove trailing whitespace and some tab characters.Craig Topper2013-07-311-9/+9
| | | | llvm-svn: 187472
* Added a option to the disassembler to print immediates as hex.Kevin Enderby2012-12-051-4/+4
| | | | | | | | | | | | | | | | | | | | This is for the lldb team so most of but not all of the values are to be printed as hex with this option. Some small values like the scale in an X86 address were requested to printed in decimal without the leading 0x. There may be some tweaks need to places that may still be in decimal that they want in hex. Specially for arm. I made my best guess. Any tweaks from here should be simple. I also did the best I know now with help from the C++ gurus creating the cleanest formatImm() utility function and containing the changes. But if someone has a better idea to make something cleaner I'm all ears and game for changing the implementation. rdar://8109283 llvm-svn: 169393
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-031-2/+2
| | | | | | | | | | | | | | | | | Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] llvm-svn: 169131
* Make branch heavy code for generating marked up disassembly simplerKevin Enderby2012-10-231-30/+16
| | | | | | | and easier to read by adding a couple helper functions. Suggestion by Chandler Carruth and seconded by Meador Inge! llvm-svn: 166515
* Add support for annotated disassembly output for X86 and arm.Kevin Enderby2012-10-221-2/+30
| | | | | | | | | | | Per the October 12, 2012 Proposal for annotated disassembly output sent out by Jim Grosbach this set of changes implements this for X86 and arm. The llvm-mc tool now has a -mdis option to produced the marked up disassembly and a couple of small example test cases have been added. rdar://11764962 llvm-svn: 166445
* Separate AVXCC and SSECC printing for cmpps/pd/ss/sd and add masking before ↵Craig Topper2012-10-091-1/+26
| | | | | | the switch statement. This keeps the unreachable default case from being hit if the instruction was created with an intrinsic with too large of an immediate. llvm-svn: 165483
* Add 'lock' prefix output support in assembly printerMichael Liao2012-09-261-0/+7
| | | | | | | | - Instead of embedding 'lock' into each mnemonic of atomic instructions except 'xchg', we teach X86 assembly printer to output 'lock' prefix similar to or consistent with code emitter. llvm-svn: 164659
* Update function names to conform to guidelines. No functional change intended.Chad Rosier2012-09-101-3/+3
| | | | llvm-svn: 163561
* Move getOpcodeName from the various target InstPrinters into the superclass ↵Benjamin Kramer2012-04-021-4/+0
| | | | | | | | MCInstPrinter. All implementations used the same code. llvm-svn: 153866
* Remove getInstructionName from MCInstPrinter implementations in favor of ↵Craig Topper2012-04-021-2/+2
| | | | | | using the instruction name table from MCInstrInfo. Reduces static data in the InstPrinter implementations. llvm-svn: 153863
* Rip out emission of the regIsInRegClass function for the asm printer.Benjamin Kramer2012-03-301-0/+1
| | | | | | It's slow, bloated and completely redundant with MCRegisterClass::contains. llvm-svn: 153782
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