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* Various x86 disassembler fixes.Craig Topper2013-09-302-40/+4
| | | | | | | | | | | Add VEX_LIG to scalar FMA4 instructions. Use VEX_LIG in some of the inheriting checks in disassembler table generator. Make use of VEX_L_W, VEX_L_W_XS, VEX_L_W_XD contexts. Don't let VEX_L_W, VEX_L_W_XS, VEX_L_W_XD, VEX_L_W_OPSIZE inherit from their non-L forms unless VEX_LIG is set. Let VEX_L_W, VEX_L_W_XS, VEX_L_W_XD, VEX_L_W_OPSIZE inherit from all of their non-L or non-W cases. Increase ranking on VEX_L_W, VEX_L_W_XS, VEX_L_W_XD, VEX_L_W_OPSIZE so they get chosen over non-L/non-W forms. llvm-svn: 191649
* Build fixRichard Mitton2013-08-301-1/+1
| | | | llvm-svn: 189699
* Fixed a bug where diassembling an instruction that had a prefix would cause ↵Richard Mitton2013-08-301-7/+9
| | | | | | LLVM to identify a 1-byte instruction, but then upon querying it for that 1-byte instruction would cause an undefined opcode. llvm-svn: 189698
* First round of fixes for the x86 fixes for the x86 move accumulator from/to ↵Craig Topper2013-08-251-17/+12
| | | | | | | | | | | | | | memory offset instructions. -Assembly parser now properly check the size of the memory operation specified in intel syntax. So 'mov word ptr [5], al' is no longer accepted. -x86-32 disassembly of these instructions no longer sign extends the 32-bit address immediate based on size. -Intel syntax printing prints the ptr size and places brackets around the address immediate. Known remaining issues with these instructions: -Segment override prefix is not supported. PR16962 and PR16961. -Immediate size should be changed by address size prefix. llvm-svn: 189201
* Remove trailing whitespace.Craig Topper2013-08-241-1/+1
| | | | llvm-svn: 189178
* Added encoding prefixes for KNL instructions (EVEX).Elena Demikhovsky2013-07-284-4/+181
| | | | | | | Added 512-bit operands printing. Added instruction formats for KNL instructions. llvm-svn: 187324
* Update the X86 disassembler to use xacquire and xrelease when appropriate.Kevin Enderby2013-06-203-0/+32
| | | | | | | | | | | | | | | | | This is a bit tricky as the xacquire and xrelease hints use the same bytes, 0xf2 and 0xf3, as the repne and rep prefixes. Fortunately llvm has different llvm MCInst Opcode enums for rep/xrelease and repne/xacquire. So to make this work a boolean was added the InternalInstruction struct as part of the Prefix state which is set with the added logic in readPrefixes() when decoding an instruction to determine if these prefix bytes are to be disassembled as xacquire or xrelease. Then we let the matcher pick the normal prefix instructionID and we change the Opcode after that when it is set into the MCInst being created. rdar://11019859 llvm-svn: 184490
* Add MCSymbolizer for symbolic/annotated disassembly.Ahmed Bougacha2013-05-241-97/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a basic first step towards symbolization of disassembled instructions. This used to be done using externally provided (C API) callbacks. This patch introduces: - the MCSymbolizer class, that mimics the same functions that were used in the X86 and ARM disassemblers to symbolize immediate operands and to annotate loads based off PC (for things like c string literals). - the MCExternalSymbolizer class, which implements the old C API. - the MCRelocationInfo class, which provides a way for targets to translate relocations (either object::RelocationRef, or disassembler C API VariantKinds) to MCExprs. - the MCObjectSymbolizer class, which does symbolization using what it finds in an object::ObjectFile. This makes simple symbolization (with no fancy relocation stuff) work for all object formats! - x86-64 Mach-O and ELF MCRelocationInfos. - A basic ARM Mach-O MCRelocationInfo, that provides just enough to support the C API VariantKinds. Most of what works in otool (the only user of the old symbolization API that I know of) for x86-64 symbolic disassembly (-tvV) works, namely: - symbol references: call _foo; jmp 15 <_foo+50> - relocations: call _foo-_bar; call _foo-4 - __cf?string: leaq 193(%rip), %rax ## literal pool for "hello" Stub support is the main missing part (because libObject doesn't know, among other things, about mach-o indirect symbols). As for the MCSymbolizer API, instead of relying on the disassemblers to call the tryAdding* methods, maybe this could be done automagically using InstrInfo? For instance, even though PC-relative LEAs are used to get the address of string literals in a typical Mach-O file, a MOV would be used in an ELF file. And right now, the explicit symbolization only recognizes PC-relative LEAs. InstrInfo should have already have most of what is needed to know what to symbolize, so this can definitely be improved. I'd also like to remove object::RelocationRef::getValueString (it seems only used by relocation printing in objdump), as simply printing the created MCExpr is definitely enough (and cleaner than string concats). llvm-svn: 182625
* X86DisassemblerDecoder.c: Make this C89-compliant.NAKAMURA Takumi2013-03-251-1/+1
| | | | llvm-svn: 177910
* Whitespace.NAKAMURA Takumi2013-03-251-160/+160
| | | | llvm-svn: 177909
* x86 -- disassemble the REP/REPNE prefix when neededDave Zarzycki2013-03-251-7/+20
| | | | | | This fixes Apple bug: 13493622 llvm-svn: 177887
* Remove edis - the enhanced disassembler. Fixes PR14654.Roman Divacky2012-12-192-10/+0
| | | | llvm-svn: 170578
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-031-2/+1
| | | | | | | | | | | | | | | | | Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] llvm-svn: 169131
* Fix typoJoerg Sonnenberger2012-10-291-2/+2
| | | | llvm-svn: 166945
* Add a new compression type to ModRM table that detects when the memory modRM ↵Craig Topper2012-09-132-0/+9
| | | | | | byte represent 8 instructions and the reg modRM byte represents up to 64 instructions. Reduces modRM table from 43k entreis to 25k entries. Based on a patch from Manman Ren. llvm-svn: 163774
* Change unsigned to a uint16_t in static disassembler tables to reduce the ↵Craig Topper2012-09-112-2/+2
| | | | | | table size. llvm-svn: 163594
* Use const properly so that we dont remove const qualifier from region and MIIRoman Divacky2012-09-053-13/+13
| | | | | | by casting. Found with gcc48. llvm-svn: 163247
* Add support for converting llvm.fma to fma4 instructions.Craig Topper2012-08-311-0/+2
| | | | llvm-svn: 162999
* Fix integer undefined behavior due to signed left shift overflow in LLVM.Richard Smith2012-08-241-1/+1
| | | | | | Reviewed offline by chandlerc. llvm-svn: 162623
* Add more indirection to the disassembler tables to reduce amount of space ↵Craig Topper2012-08-015-14/+18
| | | | | | used to store the operand types and encodings. Store only the unique combinations in a separate table and store indices in the instruction table. Saves about 32K of static data. llvm-svn: 161101
* Make INSTRUCTION_SPECIFIER_FIELDS match X86DisassemblerCommon.h. Also remove ↵Craig Topper2012-07-311-5/+4
| | | | | | trailing whitespace. llvm-svn: 161029
* Tidy up trailing whitespaceCraig Topper2012-07-311-33/+33
| | | | llvm-svn: 161027
* Tidy up trailing whitespaceCraig Topper2012-07-311-12/+12
| | | | llvm-svn: 161026
* Fix a bug in the x86 disassembler's symbolic disassembly support for Jcc-JumpKevin Enderby2012-07-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | if Condition Is Met instuctions that was not correctly determining the target instruction. So for a jne rel32 instruction: % cat x.s .byte 0x0f, 0x85, 0x09, 0x00, 0x00, 0x00 % as x.s it was incorrectly deterining the target: % otool -q -tv a.out a.out: (__TEXT,__text) section 0000000000000000 jne 0xd and with the fix it gets this correct as: % otool -q -tv a.out a.out: (__TEXT,__text) section 0000000000000000 jne 0xf rdar://11505997 llvm-svn: 160694
* Remove tabs.Bill Wendling2012-07-191-9/+9
| | | | llvm-svn: 160477
* X86: add more GATHER intrinsics in LLVMManman Ren2012-06-291-10/+18
| | | | | | | | | | | | | | | Corrected type for index of llvm.x86.avx2.gather.d.pd.256 from 256-bit to 128-bit. Corrected types for src|dst|mask of llvm.x86.avx2.gather.q.ps.256 from 256-bit to 128-bit. Support the following intrinsics: llvm.x86.avx2.gather.d.q, llvm.x86.avx2.gather.q.q llvm.x86.avx2.gather.d.q.256, llvm.x86.avx2.gather.q.q.256 llvm.x86.avx2.gather.d.d, llvm.x86.avx2.gather.q.d llvm.x86.avx2.gather.d.d.256, llvm.x86.avx2.gather.q.d.256 llvm-svn: 159402
* X86: add GATHER intrinsics (AVX2) in LLVMManman Ren2012-06-262-1/+29
| | | | | | | | | | | | Support the following intrinsics: llvm.x86.avx2.gather.d.pd, llvm.x86.avx2.gather.q.pd llvm.x86.avx2.gather.d.pd.256, llvm.x86.avx2.gather.q.pd.256 llvm.x86.avx2.gather.d.ps, llvm.x86.avx2.gather.q.ps llvm.x86.avx2.gather.d.ps.256, llvm.x86.avx2.gather.q.ps.256 Modified Disassembler to handle VSIB addressing mode. llvm-svn: 159221
* Fixed the llvm-mv X86 disassembler so the 'C' API gets jumps properlyKevin Enderby2012-04-181-2/+5
| | | | | | | symbolicated. These have and operand type of TYPE_RELv which was not handled as isBranch in translateImmediate() in X86Disassembler.cpp. rdar://11268426 llvm-svn: 155074
* Add support for AVX enhanced comparison predicates. Patch from Kay Tiong Khoo.Craig Topper2012-04-032-0/+4
| | | | llvm-svn: 153935
* C files in llvm still have to be C89 compliant, remove C++-style comments.Benjamin Kramer2012-03-101-4/+6
| | | | llvm-svn: 152495
* Fix the x86 disassembler to at least print the lock prefix if it is the firstKevin Enderby2012-03-091-0/+7
| | | | | | | prefix. Added a FIXME to remind us this still does not work when it is not the first prefix. llvm-svn: 152414
* Use uint8_t instead of enums to store values in X86 disassembler table. ↵Craig Topper2012-03-042-4/+4
| | | | | | Shaves 150k off the size of X86DisassemblerDecoder.o llvm-svn: 151995
* Added annotations for x86 pc relative loads to llvm's 'C' disassembler.Kevin Enderby2012-02-291-0/+24
| | | | | | | So with darwin's otool(1) an x86_64 hello world .o file will print: leaq L_.str(%rip), %rax ## literal pool for: Hello world llvm-svn: 151769
* Make MemoryObject accessor members const againDerek Schuff2012-02-292-2/+2
| | | | llvm-svn: 151687
* X86 disassembler support for jcxz, jecxz, and jrcxz. Fixes PR11643. Patch by ↵Craig Topper2012-02-272-2/+8
| | | | | | Kay Tiong Khoo. llvm-svn: 151510
* Updated the llvm-mc disassembler C API to support for the X86 target.Kevin Enderby2012-02-233-18/+166
| | | | | | | | | | | | | | | | | | | | | rdar://10873652 As part of this I updated the llvm-mc disassembler C API to always call the SymbolLookUp call back even if there is no getOpInfo call back. If there is a getOpInfo call back that is tried first and then if that gets no information then the SymbolLookUp is called. I also made the code more robust by memset(3)'ing to zero the LLVMOpInfo1 struct before then setting SymbolicOp.Value before for the call to getOpInfo. And also don't use any values from the LLVMOpInfo1 struct if getOpInfo returns 0. And also don't use any of the ReferenceType or ReferenceName values from SymbolLookUp if it returns NULL. rdar://10873563 and rdar://10873683 For the X86 target also fixed bugs so the annotations get printed. Also fixed a few places in the ARM target that was not producing symbolic operands for some instructions. rdar://10878166 llvm-svn: 151267
* Remove dead code. Improve llvm_unreachable text. Simplify some control flow.Ahmed Charles2012-02-191-3/+1
| | | | llvm-svn: 150918
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, ↵Jia Liu2012-02-185-5/+5
| | | | | | MSP430, PPC, PTX, Sparc, X86, XCore. llvm-svn: 150878
* Don't mix declarations and code.Benjamin Kramer2012-02-112-8/+6
| | | | llvm-svn: 150305
* Make the EDis tables const.Benjamin Kramer2012-02-112-2/+2
| | | | llvm-svn: 150304
* Reuse the enum names from X86Desc in the X86Disassembler.Benjamin Kramer2012-02-115-15/+37
| | | | | | | This requires some gymnastics to make it available for C code. Remove the names from the disassembler tables, making them relocation free. llvm-svn: 150303
* More tweaks to get the size of the X86 disassembler tables down.Craig Topper2012-02-092-0/+7
| | | | llvm-svn: 150167
* Flatten some of the arrays in the X86 disassembler tables to reduce space ↵Craig Topper2012-02-093-7/+6
| | | | | | needed to store pointers on 64-bit hosts and reduce relocations needed at startup. Part of PR11953. llvm-svn: 150161
* Enable streaming of bitcodeDerek Schuff2012-02-062-2/+2
| | | | | | | This CL delays reading of function bodies from initial parse until materialization, allowing overlap of compilation with bitcode download. llvm-svn: 149918
* Persuade GCC that there is nothing worth warning about here (there isn't).Duncan Sands2012-02-051-1/+1
| | | | llvm-svn: 149834
* Remove unnecessary default cases in switches that cover all enum values.David Blaikie2012-01-101-3/+0
| | | | llvm-svn: 147855
* Silence warnings of a mysterious compiler that still defaults to C89.Benjamin Kramer2012-01-041-2/+2
| | | | llvm-svn: 147553
* X86Disassembler: Fix undefined behavior found by GCC 4.6Benjamin Kramer2012-01-011-3/+5
| | | | llvm-svn: 147404
* Add disassembler support for VPERMIL2PD and VPERMIL2PS.Craig Topper2011-12-301-0/+10
| | | | llvm-svn: 147368
* Remove mode specific disassembler classes and just call ↵Craig Topper2011-12-212-41/+7
| | | | | | X86GenericDisassembler constructor with appropriate argument in the creation functions. This removes a few tables that needed to be anchored. llvm-svn: 147046
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