| Commit message (Collapse) | Author | Age | Files | Lines |
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MCAsmParser, and changed the target-specific AsmParsers
to use it.
llvm-svn: 93900
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identifier. There is no way to work around it.
llvm-svn: 93896
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unneeded argument from ParseExpression.
llvm-svn: 93536
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X86Operand's have range info.
llvm-svn: 93535
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to return range information for subexpressions. Use this to
provide range info for several new X86Operands.
llvm-svn: 93534
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llvm-svn: 93532
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X86Operand::Create* implementations to avoid
copy ctor use.
llvm-svn: 93528
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llvm-svn: 93526
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datastructure when parsing a mem operand.
llvm-svn: 93521
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the new ParseInstruction method just parses and returns a list of
target operands. A new MatchInstruction interface is used to
turn the operand list into an MCInst.
This requires new/deleting all the operands, but it also gives
targets the ability to use polymorphic operands if they want to.
llvm-svn: 93469
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Pass in SMLoc of instr opcode into ParseInstruction.
Make AsmToken be a class, not a struct.
llvm-svn: 93457
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llvm-svn: 93454
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llvm-svn: 82054
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that things like .word can be parsed as target specific. Moved parsing .word
out of AsmParser.cpp into X86AsmParser.cpp as it is 2 bytes on X86 and 4 bytes
for other targets that support the .word directive.
llvm-svn: 81461
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disabled.
llvm-svn: 81122
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from MCAsmLexer.h in preparation of supporting other targets. Changed the
X86AsmParser code to reflect this by removing AsmLexer::LexPercent and looking
for AsmToken::Percent when parsing in places that used AsmToken::Register.
Then changed X86ATTAsmParser::ParseRegister to parse out registers as an
AsmToken::Percent followed by an AsmToken::Identifier.
llvm-svn: 80929
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Also, use MCInst::print instead of custom code in MCAsmPrinter.
llvm-svn: 80575
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specific printer (this only works on x86, for now).
- This makes it possible to do some correctness checking of the parsing and
matching, since we can compare the results of 'as' on the original input, to
those of 'as' on the output from llvm-mc.
- In theory, we could now have an easy ATT -> Intel syntax converter. :)
llvm-svn: 78986
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llvm-svn: 78642
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on target specific operands for testing class membership and converting to
MCInst operands.
llvm-svn: 78597
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- We can now discriminate SUB32ri8 from SUB32ri, for example.
llvm-svn: 78530
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Also, redefined MatchRegisterName to just return the register value or a
sentinel, to simplify the generated code.
llvm-svn: 78504
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- This doesn't actually improve the algorithm (its still linear), but the
generated (match) code is now fairly compact and table driven. Still need a
generic string matcher.
- The table still needs to be compressed, this is quite simple to do and should
shrink it to under 16k.
- This also simplifies and restructures the code to make the match classes more
explicit, in anticipation of resolving ambiguities.
llvm-svn: 78461
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llvm-svn: 78404
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llvm-svn: 78381
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i386-apple-darwin9. This presumably will get fixed once the generated code
improves.
llvm-svn: 78379
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- Still not very sane, but a least its not 60k lines on X86. :)
- In terms of correctness, currently some things are hard wired for X86, and we
still don't properly resolve ambiguities (this is ignoring the instructions
we don't even match due to funny .td stuff or other corner cases).
The high level changes:
1. Represent tokens which are significant for matching explicitly as separate
operands. This uniformly handles not only the instruction mnemonic, but
also 'signficiant' syntax like the '*' in "call * ...".
2. Separate the matching of operands to an instruction from the construction of
the MCInst. In theory this can be done during matching, but since the number
of variations is small I think it makes sense to decompose the problems.
3. Improved a few of the mechanisms to at least successfully flatten / tokenize
the assembly strings for PowerPC and ARM.
4. The comment at the top of AsmMatcherEmitter.cpp explains the approach I'm
moving towards for handling ambiguous instructions. The high-bit is to infer
a partial ordering of the operand classes (and force the user to specify one
if we can't) and use that to resolve ambiguities.
llvm-svn: 78378
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operands.
llvm-svn: 77837
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- Operands which are just a label should be parsed as immediates, not memory
operands (from the assembler perspective).
- Match a few more flavors of immediates.
- Distinguish match functions for memory operands which don't take a segment
register.
- We match the .s for "hello world" now!
llvm-svn: 77745
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Also, change scale value to always be 1 when unspecified to machine MachineInst
encoding.
llvm-svn: 77728
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llvm-svn: 77673
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- This is "experimental" code, I am feeling my way around and working out the
best way to do things (and learning tblgen in the process). Comments welcome,
but keep in mind this stuff will change radically.
- This is enough to match "subb" and friends, but not much else. The next step is to
automatically generate the matchers for individual operands.
llvm-svn: 77657
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llvm-svn: 77442
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llvm-svn: 77441
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llvm-svn: 77404
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llvm-svn: 77384
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llvm-svn: 77362
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- My DFS traversal of LLVM is, at least for now, nearly complete! :)
llvm-svn: 77258
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- Less boilerplate == good.
llvm-svn: 77052
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llvm-svn: 76541
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- This provides the AsmLexer interface to the target specific assembly parsers.
llvm-svn: 76460
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- This provides the AsmParser interface to the target specific assembly
parsers.
llvm-svn: 76453
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llvm-svn: 76344
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- Not fully enabled yet, need a configure regeneration.
llvm-svn: 76230
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