summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/X86/AsmParser
Commit message (Collapse)AuthorAgeFilesLines
...
* Revert r148131, it was committed before it was ready.Devang Patel2012-01-131-46/+40
| | | | llvm-svn: 148134
* Refactor.Devang Patel2012-01-131-40/+46
| | | | llvm-svn: 148131
* Rename X86ATTAsmParser -> X86AsmParserDevang Patel2012-01-121-17/+17
| | | | | | We are using one parser to parse att as well as intel style syntax. llvm-svn: 148032
* Add predicate method check match memory operand size, if available.Devang Patel2012-01-121-3/+50
| | | | | | In att style asm syntax memory operand size is derived from suffix attached with mnemonic. In intel style asm syntax it is part of memory operand hence predicate method check is required to select appropriate instruction. llvm-svn: 148006
* Add intel style operand parser skeleton. Devang Patel2012-01-121-1/+97
| | | | | | This is a work in progress. llvm-svn: 148002
* LLVMBuild: Remove trailing newline, which irked me.Daniel Dunbar2011-12-121-1/+0
| | | | llvm-svn: 146409
* build/CMake: Finish removal of add_llvm_library_dependencies.Daniel Dunbar2011-11-291-8/+0
| | | | llvm-svn: 145420
* Replace (Lower|Upper)caseString in favor of StringRef's newest methods.Benjamin Kramer2011-11-062-8/+2
| | | | llvm-svn: 143891
* build: Add initial cut at LLVMBuild.txt files.Daniel Dunbar2011-11-031-0/+24
| | | | llvm-svn: 143634
* Add AsmToken::getEndLoc and use it to add ranges to x86 asm register parsing.Benjamin Kramer2011-10-161-9/+14
| | | | | | | | <stdin>:1:12: error: register %rax is only available in 64-bit mode incl %rax ^~~~ llvm-svn: 142137
* X86AsmParser: Synthesize EndLoc for tokens out of StartLoc + Length and ↵Benjamin Kramer2011-10-161-3/+4
| | | | | | | | | | print ranges for invalid operands. <stdin>:1:4: error: invalid instruction mnemonic 'abc' abc incl %edi ^~~ llvm-svn: 142135
* Enhance llvm::SourceMgr to support diagnostic ranges, the same way clang ↵Chris Lattner2011-10-161-6/+13
| | | | | | | | | | | | | | | does. Enhance the X86 asmparser to produce ranges in the one case that was annoying me, for example: test.s:10:15: error: invalid operand for instruction movl 0(%rax), 0(%edx) ^~~~~~~ It should be straight-forward to enhance filecheck, tblgen, and/or the .ll parser to use ranges where appropriate if someone is interested. llvm-svn: 142106
* Move TargetRegistry and TargetSelect from Target to Support where they belong.Evan Cheng2011-08-242-2/+2
| | | | | | These are strictly utilities for registering targets and components. llvm-svn: 138450
* MCTargetAsmParser target match predicate support.Jim Grosbach2011-08-151-1/+2
| | | | | | | | Allow a target assembly parser to do context sensitive constraint checking on a potential instruction match. This will be used, for example, to handle Thumb2 IT block parsing. llvm-svn: 137675
* Rewrite the CMake build to use explicit dependencies between libraries,Chandler Carruth2011-07-291-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | specified in the same file that the library itself is created. This is more idiomatic for CMake builds, and also allows us to correctly specify dependencies that are missed due to bugs in the GenLibDeps perl script, or change from compiler to compiler. On Linux, this returns CMake to a place where it can relably rebuild several targets of LLVM. I have tried not to change the dependencies from the ones in the current auto-generated file. The only places I've really diverged are in places where I was seeing link failures, and added a dependency. The goal of this patch is not to start changing the dependencies, merely to move them into the correct location, and an explicit form that we can control and change when necessary. This also removes a serialization point in the build because we don't have to scan all the libraries before we begin building various tools. We no longer have a step of the build that regenerates a file inside the source tree. A few other associated cleanups fall out of this. This isn't really finished yet though. After talking to dgregor he urged switching to a single CMake macro to construct libraries with both sources and dependencies in the arguments. Migrating from the two macros to that style will be a follow-up patch. Also, llvm-config is still generated with GenLibDeps.pl, which means it still has slightly buggy dependencies. The internal CMake 'llvm-config-like' macro uses the correct explicitly specified dependencies however. A future patch will switch llvm-config generation (when using CMake) to be based on these deps as well. This may well break Windows. I'm getting a machine set up now to dig into any failures there. If anyone can chime in with problems they see or ideas of how to solve them for Windows, much appreciated. llvm-svn: 136433
* Emit an error is asm parser parsed X86_64 only registers, e.g. %rax, %sil.Evan Cheng2011-07-271-8/+15
| | | | | | | | | This can happen in cases where TableGen generated asm matcher cannot check whether a register operand is in the right register class. e.g. mem operands. rdar://8204588 llvm-svn: 136292
* Fix llvm-mc handing of x86 instructions that take 8-bit unsigned immediates.Kevin Enderby2011-07-271-0/+15
| | | | | | | | | | | | llvm-mc gives an "invalid operand" error for instructions that take an unsigned immediate which have the high bit set such as: pblendw $0xc5, %xmm2, %xmm1 llvm-mc treats all x86 immediates as signed values and range checks them. A small number of x86 instructions use the imm8 field as a set of bits. This change only changes those instructions and where the high bit is not ignored. The others remain unchanged. llvm-svn: 136287
* Support .code32 and .code64 in X86 assembler.Evan Cheng2011-07-271-0/+27
| | | | llvm-svn: 136197
* Rename TargetAsmParser to MCTargetAsmParser and TargetAsmLexer to ↵Evan Cheng2011-07-262-13/+12
| | | | | | MCTargetAsmLexer; rename createAsmLexer to createMCAsmLexer and createAsmParser to createMCAsmParser. llvm-svn: 136027
* Clean up a pile of hacks in our CMake build relating to TableGen.Chandler Carruth2011-07-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The first problem to fix is to stop creating synthetic *Table_gen targets next to all of the LLVM libraries. These had no real effect as CMake specifies that add_custom_command(OUTPUT ...) directives (what the 'tablegen(...)' stuff expands to) are implicitly added as dependencies to all the rules in that CMakeLists.txt. These synthetic rules started to cause problems as we started more and more heavily using tablegen files from *subdirectories* of the one where they were generated. Within those directories, the set of tablegen outputs was still available and so these synthetic rules added them as dependencies of those subdirectories. However, they were no longer properly associated with the custom command to generate them. Most of the time this "just worked" because something would get to the parent directory first, and run tablegen there. Once run, the files existed and the build proceeded happily. However, as more and more subdirectories have started using this, the probability of this failing to happen has increased. Recently with the MC refactorings, it became quite common for me when touching a large enough number of targets. To add insult to injury, several of the backends *tried* to fix this by adding explicit dependencies back to the parent directory's tablegen rules, but those dependencies didn't work as expected -- they weren't forming a linear chain, they were adding another thread in the race. This patch removes these synthetic rules completely, and adds a much simpler function to declare explicitly that a collection of tablegen'ed files are referenced by other libraries. From that, we can add explicit dependencies from the smaller libraries (such as every architectures Desc library) on this and correctly form a linear sequence. All of the backends are updated to use it, sometimes replacing the existing attempt at adding a dependency, sometimes adding a previously missing dependency edge. Please let me know if this causes any problems, but it fixes a rather persistent and problematic source of build flakiness on our end. llvm-svn: 136023
* Fix last bits of MC layer issues. llvm-mc doesn't need to initialize ↵Evan Cheng2011-07-251-1/+1
| | | | | | TargetMachine's anymore. llvm-svn: 135963
* Move TargetAsmParser.h TargetAsmBackend.h and TargetAsmLexer.h to MC where ↵Evan Cheng2011-07-232-6/+5
| | | | | | they belong. llvm-svn: 135833
* Next round of MC refactoring. This patch factor MC table instantiations, MCEvan Cheng2011-07-141-3/+0
| | | | | | registeration and creation code into XXXMCDesc libraries. llvm-svn: 135184
* Update MCParsedAsmOperand debug methods.Jim Grosbach2011-07-131-1/+1
| | | | | | | | | | | Update the debug output interface for MCParsedAsmOperand to have a print() method which takes an output stream argument, an << operator which invokes the print method using the given stream, and a dump() method which prints the operand to the dbgs() stream. This makes the interface more consistent with the rest of LLVM, and more convenient to use at the debugger command line. llvm-svn: 135043
* - Eliminate MCCodeEmitter's dependency on TargetMachine. It now uses MCInstrInfoEvan Cheng2011-07-111-7/+7
| | | | | | | | | | | | and MCSubtargetInfo. - Added methods to update subtarget features (used when targets automatically detect subtarget features or switch modes). - Teach X86Subtarget to update MCSubtargetInfo features bits since the MCSubtargetInfo layer can be shared with other modules. - These fixes .code 16 / .code 32 support since mode switch is updated in MCSubtargetInfo so MC code emitter can do the right thing. llvm-svn: 134884
* Change createAsmParser to take a MCSubtargetInfo instead of triple,Evan Cheng2011-07-091-7/+5
| | | | | | | | | CPU, and feature string. Parsing some asm directives can change subtarget state (e.g. .code 16) and it must be reflected in other modules (e.g. MCCodeEmitter). That is, the MCSubtargetInfo instance must be shared. llvm-svn: 134795
* Plug a leak by giving the AsmParser ownership of the MCSubtargetInfo.Benjamin Kramer2011-07-081-3/+4
| | | | | | Found by valgrind. llvm-svn: 134738
* TargetAsmParser doesn't need reference to Target.Evan Cheng2011-07-081-3/+3
| | | | llvm-svn: 134721
* Eliminate asm parser's dependency on TargetMachine:Evan Cheng2011-07-081-33/+24
| | | | | | | | | | - Each target asm parser now creates its own MCSubtatgetInfo (if needed). - Changed AssemblerPredicate to take subtarget features which tablegen uses to generate asm matcher subtarget feature queries. e.g. "ModeThumb,FeatureThumb2" is translated to "(Bits & ModeThumb) != 0 && (Bits & FeatureThumb2) != 0". llvm-svn: 134678
* Add assembler/disassembler support for non-AVX pclmulqdq. While I'm here, ↵Eli Friedman2011-07-051-17/+0
| | | | | | use proper aliases for the pclmullqlqdq and friends. PR10269. llvm-svn: 134424
* fix rdar://8735979 - "int 3" doesn't match to "int3". Unfortunately,Chris Lattner2011-04-091-0/+12
| | | | | | | InstAlias doesn't allow matching immediate operands, so we have to write C++ code to do this. llvm-svn: 129223
* Support explicit argument forms for the X86 string instructions.Joerg Sonnenberger2011-03-181-1/+126
| | | | | | For now, only the default segments are supported. llvm-svn: 127875
* Use the same (%dx) hack for in[bwl] as for out[bwl].Joerg Sonnenberger2011-02-221-0/+13
| | | | llvm-svn: 126244
* MC/AsmParser: Add support for allowing the conversion process to fail (viaDaniel Dunbar2011-02-041-0/+2
| | | | | | custom conversion functions). llvm-svn: 124872
* Introduce virtual ParseRegister method in TargetAsmParser.Roman Divacky2011-01-271-2/+1
| | | | | | Create override of this method in X86/ARM/MBlaze. llvm-svn: 124378
* Allow a slash, '/', as a prefix separator for X86. rdar://8741045Kevin Enderby2010-12-081-0/+2
| | | | llvm-svn: 121320
* fix PR8686, accepting a 'b' suffix at the end of all the setccChris Lattner2010-11-281-0/+5
| | | | | | | | | | instructions. I choose to handle this with an asmparser hack, though it could be handled by changing all the instruction definitions to allow be "setneb" instead of "setne". The asm parser hack is better in this case, because we want the disassembler to produce setne, not setneb. llvm-svn: 120260
* Implement the data16 prefix.Rafael Espindola2010-11-271-1/+1
| | | | llvm-svn: 120224
* Implement the rex64 prefix.Rafael Espindola2010-11-231-1/+2
| | | | llvm-svn: 120017
* trivial QoI improvement. On this invalid input:Chris Lattner2010-11-181-1/+2
| | | | | | | | | | | | | | | | | | sahf movl 344(%rdi),%r14d we used to produce: t.s:2:1: error: unexpected token in argument list ^ we now produce: t.s:1:11: error: unexpected token in argument list sahf movl 344(%rdi),%r14d ^ rdar://8581401 llvm-svn: 119676
* move the "sh[lr]d op,op" -> "shld $1, op,op" aliases to the .td file.Chris Lattner2010-11-061-8/+0
| | | | llvm-svn: 118361
* rework the rotate-by-1 instructions to be defined like theChris Lattner2010-11-061-9/+3
| | | | | | | | | | | | | shift-by-1 instructions, where the asmstring doesn't contain the implicit 1. It turns out that a bunch of these rotate instructions were completely broken because they used 1 instead of $1. This fixes assembly mismatches on "rclb $1, %bl" and friends, where we used to generate the 3 byte form, we now generate the proper 2-byte form. llvm-svn: 118355
* move the plethora of fp stack aliases to the .td file.Chris Lattner2010-11-061-32/+0
| | | | llvm-svn: 118353
* add (and document) the ability for alias results to haveChris Lattner2010-11-061-13/+3
| | | | | | | | fixed physical registers. Start moving fp comparison aliases to the .td file (which default to using %st1 if nothing is specified). llvm-svn: 118352
* generalize alias support to allow the result of an alias toChris Lattner2010-11-061-21/+16
| | | | | | | add fixed immediate values. Move the aad and aam aliases to use this, and document it. llvm-svn: 118350
* move fnstsw aliases to .td file, fix typoChris Lattner2010-11-061-35/+0
| | | | llvm-svn: 118349
* move in/out aliases to the .td files.Chris Lattner2010-11-061-16/+0
| | | | llvm-svn: 118348
* move sldt, imul, and movabsq aliases from c++ to .td file.Chris Lattner2010-11-061-29/+0
| | | | llvm-svn: 118347
* correct suffix matching to search for s/l/t suffixes on Chris Lattner2010-11-061-33/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | floating point stack instructions instead of looking for b/w/l/q. This fixes issues where we'd accidentally match fistp to fistpl, when it is in fact an ambiguous instruction. This changes the behavior of llvm-mc to reject fstp, which was the correct fix for rdar://8456389: t.s:1:1: error: ambiguous instructions require an explicit suffix (could be 'fstps', 'fstpl', or 'fstpt') fstp (%rax) it also causes us to correctly reject fistp and fist, which addresses PR8528: t.s:2:1: error: ambiguous instructions require an explicit suffix (could be 'fistps', or 'fistpl') fistp (%rax) ^ t.s:3:1: error: ambiguous instructions require an explicit suffix (could be 'fists', or 'fistl') fist (%rax) ^ Thanks to Ismail Donmez for tracking down the issue here! llvm-svn: 118346
* fix a bug where we had an implicit assumption that theChris Lattner2010-11-061-21/+0
| | | | | | | | result instruction operand numbering matched the result pattern. Fixing this allows us to move the xchg/test aliases to the .td file. llvm-svn: 118334
OpenPOWER on IntegriCloud