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* Re-commit r247683: Replace Triple with a new TargetTuple in MCTargetDesc/* ↵Daniel Sanders2015-09-151-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | and related. NFC. Summary: This is the first patch in the series to migrate Triple's (which are ambiguous) to TargetTuple's (which aren't). For the moment, TargetTuple simply passes all requests to the Triple object it holds. Once it has replaced Triple, it will start to implement the interface in a more suitable way. This change makes some changes to the public C++ API. In particular, InitMCSubtargetInfo(), createMCRelocationInfo(), and createMCSymbolizer() now take TargetTuples instead of Triples. The other public C++ API's have been left as-is for the moment to reduce patch size. This commit also contains a trivial patch to clang to account for the C++ API change. Thanks go to Pavel Labath for fixing LLDB for me. Reviewers: rengolin Subscribers: jyknight, dschuff, arsenm, rampitec, danalbert, srhines, javed.absar, dsanders, echristo, emaste, jholewinski, tberghammer, ted, jfb, llvm-commits, rengolin Differential Revision: http://reviews.llvm.org/D10969 llvm-svn: 247692
* Revert r247684 - Replace Triple with a new TargetTuple ...Daniel Sanders2015-09-151-2/+2
| | | | | | LLDB needs to be updated in the same commit. llvm-svn: 247686
* Replace Triple with a new TargetTuple in MCTargetDesc/* and related. NFC.Daniel Sanders2015-09-151-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This is the first patch in the series to migrate Triple's (which are ambiguous) to TargetTuple's (which aren't). For the moment, TargetTuple simply passes all requests to the Triple object it holds. Once it has replaced Triple, it will start to implement the interface in a more suitable way. This change makes some changes to the public C++ API. In particular, InitMCSubtargetInfo(), createMCRelocationInfo(), and createMCSymbolizer() now take TargetTuples instead of Triples. The other public C++ API's have been left as-is for the moment to reduce patch size. This commit also contains a trivial patch to clang to account for the C++ API change. Reviewers: rengolin Subscribers: jyknight, dschuff, arsenm, rampitec, danalbert, srhines, javed.absar, dsanders, echristo, emaste, jholewinski, tberghammer, ted, jfb, llvm-commits, rengolin Differential Revision: http://reviews.llvm.org/D10969 llvm-svn: 247683
* Re-commit r247216: "Fix Clang-tidy misc-use-override warnings, other minor ↵Hans Wennborg2015-09-101-45/+45
| | | | | | | | | fixes" Except the changes that defined virtual destructors as =default, because that ran into problems with GCC 4.7 and overriding methods that weren't noexcept. llvm-svn: 247298
* Revert r247216: "Fix Clang-tidy misc-use-override warnings, other minor fixes"Hans Wennborg2015-09-101-45/+45
| | | | | | | This caused build breakges, e.g. http://lab.llvm.org:8011/builders/clang-x86_64-ubuntu-gdb-75/builds/24926 llvm-svn: 247226
* Fix Clang-tidy misc-use-override warnings, other minor fixesHans Wennborg2015-09-101-45/+45
| | | | | | | | Patch by Eugene Zelenko! Differential Revision: http://reviews.llvm.org/D12740 llvm-svn: 247216
* [ms-inline-asm] Relax assertion around funky identifiers slightlyReid Kleckner2015-08-261-6/+8
| | | | | | | | | A corresponding clang change will make it so that clang can consume part of an assembler token. The assembler treats '.' as an identifier character while clang does not, so it's view of the token stream is a little different. llvm-svn: 246089
* [X86] Add support for mmword memory operand size for Intel-syntax x86 assemblyMichael Zuckerman2015-08-241-1/+1
| | | | | | Differential Revision: http://reviews.llvm.org/D12151 llvm-svn: 245835
* first commit to llvmMichael Zuckerman2015-08-241-0/+1
| | | | llvm-svn: 245825
* Test commit to verify commit accessMarina Yatsina2015-08-101-0/+1
| | | | llvm-svn: 244438
* [X86] Recognize "flags" as an identifier, not a register in Intel-syntax ↵Michael Kuperstein2015-07-301-0/+5
| | | | | | | | | inline asm Patch by: marina.yatsina@intel.com Differential Revision: http://reviews.llvm.org/D11512 llvm-svn: 243630
* [llvm-mc] Pushing plumbing through for --fatal-warnings flag.Colin LeMahieu2015-07-271-1/+1
| | | | llvm-svn: 243334
* X86: Use dyn_cast instead of isa+cast, NFCDuncan P. N. Exon Smith2015-07-231-5/+6
| | | | llvm-svn: 243034
* [X86] Fix order of operands for ins and outs instructions when parsing intel ↵Michael Kuperstein2015-07-231-28/+28
| | | | | | | | | syntax Patch by: marina.yatsina@intel.com Differential Revision: http://reviews.llvm.org/D11337 llvm-svn: 243001
* [X86] Add support for tbyte memory operand size for Intel-syntax x86 assemblyMichael Kuperstein2015-07-191-0/+1
| | | | | | | Differential Revision: http://reviews.llvm.org/D11257 Patch by: marina.yatsina@intel.com llvm-svn: 242639
* Reverting r241058 because it's causing buildbot failures.Ranjeet Singh2015-06-301-32/+25
| | | | llvm-svn: 241061
* There are a few places where subtarget features are stillRanjeet Singh2015-06-301-25/+32
| | | | | | | | | represented by uint64_t, this patch replaces these usages with the FeatureBitset (std::bitset) type. Differential Revision: http://reviews.llvm.org/D10542 llvm-svn: 241058
* AVX-512: Added all SKX forms of GATHER instructions.Elena Demikhovsky2015-06-281-0/+16
| | | | | | | Added intrinsics. Added encoding and tests. llvm-svn: 240905
* Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)Alexander Kornienko2015-06-232-2/+2
| | | | | | Apparently, the style needs to be agreed upon first. llvm-svn: 240390
* Fixed/added namespace ending comments using clang-tidy. NFCAlexander Kornienko2015-06-192-2/+2
| | | | | | | | | | | | | The patch is generated using this command: tools/clang/tools/extra/clang-tidy/tool/run-clang-tidy.py -fix \ -checks=-*,llvm-namespace-comment -header-filter='llvm/.*|clang/.*' \ llvm/lib/ Thanks to Eugene Kosov for the original patch! llvm-svn: 240137
* Add support for parsing the XOR operator in Intel syntax inline assembly.Michael Kuperstein2015-06-141-12/+39
| | | | | | | Differential Revision: http://reviews.llvm.org/D10385 Patch by marina.yatsina@intel.com llvm-svn: 239695
* MC: Clean up MCExpr naming. NFC.Jim Grosbach2015-05-302-38/+38
| | | | llvm-svn: 238634
* Use std::bitset for SubtargetFeatures.Michael Kuperstein2015-05-262-17/+18
| | | | | | | | | | | | Previously, subtarget features were a bitfield with the underlying type being uint64_t. Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset. No functional change. The first several times this was committed (e.g. r229831, r233055), it caused several buildbot failures. Apparently the reason for most failures was both clang and gcc's inability to deal with large numbers (> 10K) of bitset constructor calls in tablegen-generated initializers of instruction info tables. This should now be fixed. llvm-svn: 238192
* MC: Clean up method names in MCContext.Jim Grosbach2015-05-182-10/+10
| | | | | | | The naming was a mish-mash of old and new style. Update to be consistent with the new. NFC. llvm-svn: 237594
* Remove 3 includes from MCInstrDesc.h and explicitly include them where neededPete Cooper2015-05-151-0/+3
| | | | llvm-svn: 237481
* MC: Modernize MCOperand API naming. NFC.Jim Grosbach2015-05-133-23/+23
| | | | | | MCOperand::Create*() methods renamed to MCOperand::create*(). llvm-svn: 237275
* Reverting r237234, "Use std::bitset for SubtargetFeatures"Michael Kuperstein2015-05-132-18/+17
| | | | | | | The buildbots are still not satisfied. MIPS and ARM are failing (even though at least MIPS was expected to pass). llvm-svn: 237245
* Use std::bitset for SubtargetFeaturesMichael Kuperstein2015-05-132-17/+18
| | | | | | | | | | | Previously, subtarget features were a bitfield with the underlying type being uint64_t. Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset. No functional change. The first two times this was committed (r229831, r233055), it caused several buildbot failures. At least some of the ARM and MIPS ones were due to gcc/binutils issues, and should now be fixed. llvm-svn: 237234
* AVX-512: Added all forms of FP compare instructions for KNL and SKX.Elena Demikhovsky2015-05-071-1/+9
| | | | | | | | Added intrinsics for the instructions. CC parameter of the intrinsics was changed from i8 to i32 according to the spec. By Igor Breger (igor.breger@intel.com) llvm-svn: 236714
* Remove unnecessary include and probably a layering violation.Craig Topper2015-04-191-1/+0
| | | | llvm-svn: 235262
* Remove more superfluous .str() and replace std::string concatenation with Twine.Yaron Keren2015-03-301-1/+1
| | | | | | Following r233392, http://llvm.org/viewvc/llvm-project?rev=233392&view=rev. llvm-svn: 233555
* Revert "Use std::bitset for SubtargetFeatures"Michael Kuperstein2015-03-242-18/+17
| | | | | | | | This reverts commit r233055. It still causes buildbot failures (gcc running out of memory on several platforms, and a self-host failure on arm), although less than the previous time. llvm-svn: 233068
* Use std::bitset for SubtargetFeaturesMichael Kuperstein2015-03-242-17/+18
| | | | | | | | | | | | | Previously, subtarget features were a bitfield with the underlying type being uint64_t. Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset. No functional change. The first time this was committed (r229831), it caused several buildbot failures. At least some of the ARM ones were due to gcc/binutils issues, and should now be fixed. Differential Revision: http://reviews.llvm.org/D8542 llvm-svn: 233055
* AVX-512: Add assembly parser support for Rounding modeElena Demikhovsky2015-03-022-1/+49
| | | | | | By Asaf Badouh <asaf.badouh@intel.com> llvm-svn: 230962
* [X86] Remove the AbsMem32 type from the assembly parser. Only really need ↵Craig Topper2015-02-241-4/+0
| | | | | | the 16-bit version which will automatically get prioritized over AbsMem. llvm-svn: 230313
* Reverting r229831 due to multiple ARM/PPC/MIPS build-bot failures.Michael Kuperstein2015-02-192-16/+15
| | | | llvm-svn: 229841
* Use std::bitset for SubtargetFeaturesMichael Kuperstein2015-02-192-15/+16
| | | | | | | | | | | Previously, subtarget features were a bitfield with the underlying type being uint64_t. Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset. No functional change. Differential Revision: http://reviews.llvm.org/D7065 llvm-svn: 229831
* [X86] Add assembly parser support for mnemonic aliases for AVX-512 vpcmp ↵Craig Topper2015-02-151-12/+39
| | | | | | instructions. llvm-svn: 229287
* [X86] Improve parsing support AVX/SSE floating point compare instruction ↵Craig Topper2015-02-141-19/+9
| | | | | | mnemonic aliases. They'll now print with the alias the parser received instead of converting to the explicit immediate form. llvm-svn: 229266
* [X86] Add support for parsing and printing the mnemonic aliases for the XOP ↵Craig Topper2015-02-131-0/+27
| | | | | | VPCOM instructions. llvm-svn: 229078
* [x86] Add assembly parser bounds checking to the immediate value for ↵Craig Topper2015-01-212-0/+12
| | | | | | cmpss/cmpsd/cmpps/cmppd. llvm-svn: 226642
* X86: fix comment typo in AsmParserSaleem Abdulrasool2015-01-161-1/+1
| | | | | | Fix a typo. NFC. llvm-svn: 226313
* Use the operand vector instead so inline assembly can be validated tooDavid Majnemer2015-01-141-5/+5
| | | | | | The buildbots got upset after r225941, this should hopefully fix things. llvm-svn: 225954
* X86: only access operands if they are presentSaleem Abdulrasool2015-01-141-0/+2
| | | | | | | | If there is no associated immediate (MS style inline asm), do not try to access the operand, assume that it is valid. This should fix the buildbots after SVN r225941. llvm-svn: 225950
* X86: validate 'int' instructionSaleem Abdulrasool2015-01-141-0/+21
| | | | | | | The int instruction takes as an operand an 8-bit immediate value. Validate that the input is valid rather than silently truncating the value. llvm-svn: 225941
* [X86] Add OpSize32 to XBEGIN_4. Add XBEGIN_2 with OpSize16.Craig Topper2015-01-061-0/+8
| | | | | | Requires new AsmParserOperand types that detect 16-bit and 32/64-bit mode so that we choose the right instruction based on default sizing without predicates. This is necessary since predicates mess up the disassembler table building. llvm-svn: 225256
* [X86] Make isel select the shorter form of jump instructions instead of the ↵Craig Topper2015-01-061-8/+8
| | | | | | | | long form. The assembler backend will relax to the long form if necessary. This removes a swap from long form to short form in the MCInstLowering code. Selecting the long form used to be required by the old JIT. llvm-svn: 225242
* Replace several 'assert(false' with 'llvm_unreachable' or fold a condition ↵Craig Topper2015-01-051-12/+4
| | | | | | into the assert. llvm-svn: 225160
* Minor cleanup to all the switches after MatchInstructionImpl in all the ↵Craig Topper2015-01-031-1/+1
| | | | | | | | AsmParsers. Make sure they all have llvm_unreachable on the default path out of the switch. Remove unnecessary "default: break". Remove a 'return' after unreachable. Fix some indentation. llvm-svn: 225114
* [X86] Disassembler support for move to/from %rax with a 32-bit memory offset ↵Craig Topper2015-01-031-0/+3
| | | | | | is REX.W and AdSize prefix are both present. llvm-svn: 225099
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