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* TargetAsmParser doesn't need reference to Target.Evan Cheng2011-07-081-3/+3
| | | | llvm-svn: 134721
* Eliminate asm parser's dependency on TargetMachine:Evan Cheng2011-07-081-33/+24
| | | | | | | | | | - Each target asm parser now creates its own MCSubtatgetInfo (if needed). - Changed AssemblerPredicate to take subtarget features which tablegen uses to generate asm matcher subtarget feature queries. e.g. "ModeThumb,FeatureThumb2" is translated to "(Bits & ModeThumb) != 0 && (Bits & FeatureThumb2) != 0". llvm-svn: 134678
* Add assembler/disassembler support for non-AVX pclmulqdq. While I'm here, ↵Eli Friedman2011-07-051-17/+0
| | | | | | use proper aliases for the pclmullqlqdq and friends. PR10269. llvm-svn: 134424
* fix rdar://8735979 - "int 3" doesn't match to "int3". Unfortunately,Chris Lattner2011-04-091-0/+12
| | | | | | | InstAlias doesn't allow matching immediate operands, so we have to write C++ code to do this. llvm-svn: 129223
* Support explicit argument forms for the X86 string instructions.Joerg Sonnenberger2011-03-181-1/+126
| | | | | | For now, only the default segments are supported. llvm-svn: 127875
* Use the same (%dx) hack for in[bwl] as for out[bwl].Joerg Sonnenberger2011-02-221-0/+13
| | | | llvm-svn: 126244
* MC/AsmParser: Add support for allowing the conversion process to fail (viaDaniel Dunbar2011-02-041-0/+2
| | | | | | custom conversion functions). llvm-svn: 124872
* Introduce virtual ParseRegister method in TargetAsmParser.Roman Divacky2011-01-271-2/+1
| | | | | | Create override of this method in X86/ARM/MBlaze. llvm-svn: 124378
* Allow a slash, '/', as a prefix separator for X86. rdar://8741045Kevin Enderby2010-12-081-0/+2
| | | | llvm-svn: 121320
* fix PR8686, accepting a 'b' suffix at the end of all the setccChris Lattner2010-11-281-0/+5
| | | | | | | | | | instructions. I choose to handle this with an asmparser hack, though it could be handled by changing all the instruction definitions to allow be "setneb" instead of "setne". The asm parser hack is better in this case, because we want the disassembler to produce setne, not setneb. llvm-svn: 120260
* Implement the data16 prefix.Rafael Espindola2010-11-271-1/+1
| | | | llvm-svn: 120224
* Implement the rex64 prefix.Rafael Espindola2010-11-231-1/+2
| | | | llvm-svn: 120017
* trivial QoI improvement. On this invalid input:Chris Lattner2010-11-181-1/+2
| | | | | | | | | | | | | | | | | | sahf movl 344(%rdi),%r14d we used to produce: t.s:2:1: error: unexpected token in argument list ^ we now produce: t.s:1:11: error: unexpected token in argument list sahf movl 344(%rdi),%r14d ^ rdar://8581401 llvm-svn: 119676
* move the "sh[lr]d op,op" -> "shld $1, op,op" aliases to the .td file.Chris Lattner2010-11-061-8/+0
| | | | llvm-svn: 118361
* rework the rotate-by-1 instructions to be defined like theChris Lattner2010-11-061-9/+3
| | | | | | | | | | | | | shift-by-1 instructions, where the asmstring doesn't contain the implicit 1. It turns out that a bunch of these rotate instructions were completely broken because they used 1 instead of $1. This fixes assembly mismatches on "rclb $1, %bl" and friends, where we used to generate the 3 byte form, we now generate the proper 2-byte form. llvm-svn: 118355
* move the plethora of fp stack aliases to the .td file.Chris Lattner2010-11-061-32/+0
| | | | llvm-svn: 118353
* add (and document) the ability for alias results to haveChris Lattner2010-11-061-13/+3
| | | | | | | | fixed physical registers. Start moving fp comparison aliases to the .td file (which default to using %st1 if nothing is specified). llvm-svn: 118352
* generalize alias support to allow the result of an alias toChris Lattner2010-11-061-21/+16
| | | | | | | add fixed immediate values. Move the aad and aam aliases to use this, and document it. llvm-svn: 118350
* move fnstsw aliases to .td file, fix typoChris Lattner2010-11-061-35/+0
| | | | llvm-svn: 118349
* move in/out aliases to the .td files.Chris Lattner2010-11-061-16/+0
| | | | llvm-svn: 118348
* move sldt, imul, and movabsq aliases from c++ to .td file.Chris Lattner2010-11-061-29/+0
| | | | llvm-svn: 118347
* correct suffix matching to search for s/l/t suffixes on Chris Lattner2010-11-061-33/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | floating point stack instructions instead of looking for b/w/l/q. This fixes issues where we'd accidentally match fistp to fistpl, when it is in fact an ambiguous instruction. This changes the behavior of llvm-mc to reject fstp, which was the correct fix for rdar://8456389: t.s:1:1: error: ambiguous instructions require an explicit suffix (could be 'fstps', 'fstpl', or 'fstpt') fstp (%rax) it also causes us to correctly reject fistp and fist, which addresses PR8528: t.s:2:1: error: ambiguous instructions require an explicit suffix (could be 'fistps', or 'fistpl') fistp (%rax) ^ t.s:3:1: error: ambiguous instructions require an explicit suffix (could be 'fists', or 'fistl') fist (%rax) ^ Thanks to Ismail Donmez for tracking down the issue here! llvm-svn: 118346
* fix a bug where we had an implicit assumption that theChris Lattner2010-11-061-21/+0
| | | | | | | | result instruction operand numbering matched the result pattern. Fixing this allows us to move the xchg/test aliases to the .td file. llvm-svn: 118334
* move the lcall/ljmp aliases to the .td file.Chris Lattner2010-11-061-29/+0
| | | | llvm-svn: 118332
* move the "movsd -> movsl" alias to the .td files, Chris Lattner2010-11-061-6/+0
| | | | | | tidy up the movsx and movzx aliases. llvm-svn: 118331
* fix some bugs in the alias support, unblocking changing of "clr" aliasesChris Lattner2010-11-061-11/+0
| | | | | | from c++ hacks to proper .td InstAlias definitions. Change them! llvm-svn: 118330
* use our fancy new MnemonicAlias mechanism to remove a bunch of hacksChris Lattner2010-11-011-48/+0
| | | | | | from X86AsmParser.cpp llvm-svn: 117952
* Implement enough of the missing instalias support to getChris Lattner2010-11-011-3/+0
| | | | | | | | | | | | | | | | | | aliases installed and working. They now work when the matched pattern and the result instruction have exactly the same operand list. This is now enough for us to define proper aliases for movzx and movsx, implementing rdar://8017633 and PR7459. Note that we do not accept instructions like: movzx 0(%rsp), %rsi GAS accepts this instruction, but it doesn't make any sense because we don't know the size of the memory operand. It could be 8/16/32 bits. llvm-svn: 117901
* Implement (and document!) support for MnemonicAlias's to have Requires Chris Lattner2010-10-301-13/+7
| | | | | | | | | | | directives, allowing things like this: def : MnemonicAlias<"pop", "popl">, Requires<[In32BitMode]>; def : MnemonicAlias<"pop", "popq">, Requires<[In64BitMode]>; Move the rest of the X86 MnemonicAliases over to the .td file. llvm-svn: 117830
* really zap alias.Chris Lattner2010-10-301-1/+0
| | | | llvm-svn: 117824
* move fcompi alias to .td file and zap some useless code.Chris Lattner2010-10-301-11/+0
| | | | llvm-svn: 117823
* move rep aliases to td fileChris Lattner2010-10-301-5/+3
| | | | llvm-svn: 117822
* move sal aliases to .td file.Chris Lattner2010-10-301-5/+0
| | | | llvm-svn: 117821
* fix an encoding mismatch where "sal %eax, 1" was not using the short encodingChris Lattner2010-10-301-1/+1
| | | | | | for shl. Caught by inspection. llvm-svn: 117820
* move a bunch more aliases from .cpp -> .td file.Chris Lattner2010-10-301-20/+9
| | | | llvm-svn: 117819
* move cmov aliases to .td file.Chris Lattner2010-10-301-29/+0
| | | | llvm-svn: 117818
* move setcc and jcc aliases from .cpp to .tdChris Lattner2010-10-301-14/+0
| | | | llvm-svn: 117817
* move some code.Chris Lattner2010-10-301-33/+35
| | | | llvm-svn: 117816
* implement (and document!) the first kind of MC assembler alias, which Chris Lattner2010-10-301-15/+0
| | | | | | | just remaps one mnemonic to another. Convert a few of the X86 aliases from .cpp to .td code. llvm-svn: 117815
* stay out of the reserved namespaceChris Lattner2010-10-301-6/+6
| | | | llvm-svn: 117773
* Yet another tweak to X86 instructions to add ud2a as an alias to ud2Kevin Enderby2010-10-271-0/+1
| | | | | | (still to add ud2b). llvm-svn: 117435
* Another tweak to X86 instructions to add the missing flex instruction (withoutKevin Enderby2010-10-271-1/+2
| | | | | | the wait prefix). llvm-svn: 117434
* Tweaks to X86 instructions to allow the 'w' suffix in places it makesKevin Enderby2010-10-271-0/+6
| | | | | | | | | sense, when the instruction takes the 16-bit ax register or m16 memory location. These changes to llvm-mc matches what the darwin assembler allows for these instructions. Done differently than in r117031 that caused a valgrind error which was later reverted. llvm-svn: 117433
* Added some aliases to the fcomip and fucompi Intel instructions. So that llvm-mcKevin Enderby2010-10-271-1/+14
| | | | | | | will accept versions that the darwin assembler allows. Forms ending in "pi" and forms without all the operands. llvm-svn: 117427
* Reverting r117031 to cleanup valgrind errors.Andrew Trick2010-10-221-7/+2
| | | | | | | It doesn't look like anything is wrong with the checkin, but the new test cases expose a mem bug in AsmParser. llvm-svn: 117087
* More tweaks to X86 instructions to allow the 'w' suffix in places it makesKevin Enderby2010-10-211-2/+7
| | | | | | | | | sense, when the instruction takes the 16-bit ax register or m16 memory location. These changes to llvm-mc matches what the darwin assembler allows for these instructions. Also added the missing flex (without the wait prefix) and ud2a as an alias to ud2 (still to add ud2b). llvm-svn: 117031
* Added a few tweaks to the Intel Descriptor-table support instructions to allowKevin Enderby2010-10-191-0/+40
| | | | | | | word forms and suffixed versions to match the darwin assembler in 32-bit and 64-bit modes. This is again for use just with assembly source for llvm-mc . llvm-svn: 116773
* Added a handful of x86-32 instructions that were missing so that llvm-mc wouldKevin Enderby2010-10-181-0/+7
| | | | | | | | | | be more complete. These are only expected to be used by llvm-mc with assembly source so there is no pattern, [], in the .td files. Most are being added to X86InstrInfo.td as Chris suggested and only comments about register uses are added. Suggestions welcome on the .td changes as I'm not sure on every detail of the x86 records. More missing instructions will be coming. llvm-svn: 116716
* Fix Whitespace.Michael J. Spencer2010-10-091-46/+46
| | | | llvm-svn: 116149
* Replace a gross hack (the MOV64ri_alt instruction) with a slightly less Chris Lattner2010-10-051-1/+9
| | | | | | gross hack (having the asmmatcher handle the alias). llvm-svn: 115685
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