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* Fixing bug in rL258132: [X86] Adding support for missing variations of X86 ↵Marina Yatsina2016-01-201-2/+6
| | | | | | | | | | string related instructions There was a bug in my rL258132 because there's an overloading of the "movsd" and "cmpsd" instructions, e.g. movsd can be either "Move Data from String to String" (the case I wanted to handle) or "Move or Merge Scalar Double-Precision Floating-Point Value" (the case that causes the asserts). Added code for escaping the unfamiliar scenarios and falling back to old behviour. Also changed the asserts to llvm_unreachable. llvm-svn: 258312
* [X86] Add support for "xlat m8"Marina Yatsina2016-01-191-0/+11
| | | | | | | | According to x86 spec "xlat m8" is a legal instruction and it is equivalent to "xlatb". Differential Revision: http://reviews.llvm.org/D15150 llvm-svn: 258135
* [X86] Adding support for missing variations of X86 string related instructionsMarina Yatsina2016-01-191-75/+163
| | | | | | | | | | | | | | | The following are legal according to X86 spec: ins mem, DX outs DX, mem lods mem stos mem scas mem cmps mem, mem movs mem, mem Differential Revision: http://reviews.llvm.org/D14827 llvm-svn: 258132
* [X86] Move AVX512 STATIC_ROUNDING enum to X86BaseInfo.h to fix a layering ↵Craig Topper2015-12-251-1/+0
| | | | | | violation in AsmParser. llvm-svn: 256426
* [X86][ms-inline asm] Add support for memory operands that include structsMarina Yatsina2015-12-241-1/+5
| | | | | | | | | Add ability to reference struct symbols in memory operands. Test case will be added on the clang side (review http://reviews.llvm.org/D15749) Differential Revision: http://reviews.llvm.org/D15748 llvm-svn: 256381
* [X86][inline asm] support even directive Michael Zuckerman2015-12-131-1/+22
| | | | | | | | | | | The .even directive aligns content to an evan-numbered address. In at&t syntax .even In Microsoft syntax even (without the dot). Differential Revision: http://reviews.llvm.org/D15413 llvm-svn: 255462
* [X86] Adding support for FWORD type for MS inline asmMarina Yatsina2015-12-071-0/+1
| | | | | | | | Adding support for FWORD type for MS inline asm. Differential Revision: http://reviews.llvm.org/D15268 llvm-svn: 254904
* [X86] MS inline asm: produce error when encountering "<type> ptr <reg name>"Marina Yatsina2015-12-031-2/+11
| | | | | | | | | | | | | Currently "<type> ptr <reg name>" treated as <reg name> in MS inline asm, ignoring the "<type> ptr" completely and possibly ignoring the intention of the user. Fixed llvm to produce an error when encountering "<type> ptr <reg name>" operands. For example: andpd xmm1,xmmword ptr xmm1 --> andpd xmm1, xmm1 though andpd has 2 possible matching formats - andpd xmm, xmm/m128 Patch by: ziv.izhar@intel.com Differential Revision: http://reviews.llvm.org/D14607 llvm-svn: 254607
* Reduce the size of MCRelaxableFragment.Akira Hatanaka2015-11-141-1/+2
| | | | | | | | | | | | | | | | | | | | | | MCRelaxableFragment previously kept a copy of MCSubtargetInfo and MCInst to enable re-encoding the MCInst later during relaxation. A copy of MCSubtargetInfo (instead of a reference or pointer) was needed because the feature bits could be modified by the parser. This commit replaces the MCSubtargetInfo copy in MCRelaxableFragment with a constant reference to MCSubtargetInfo. The copies of MCSubtargetInfo are kept in MCContext, and the target parsers are now responsible for asking MCContext to provide a copy whenever the feature bits of MCSubtargetInfo have to be toggled. With this patch, I saw a 4% reduction in peak memory usage when I compiled verify-uselistorder.lto.bc using llc. rdar://problem/21736951 Differential Revision: http://reviews.llvm.org/D14346 llvm-svn: 253127
* [MCTargetAsmParser] Move the member varialbes that referenceAkira Hatanaka2015-11-141-9/+8
| | | | | | | | | | MCSubtargetInfo in the subclasses into MCTargetAsmParser and define a member function getSTI. This is done in preparation for making changes to shrink the size of MCRelaxableFragment. (see http://reviews.llvm.org/D14346). llvm-svn: 253124
* [x86] translating "fp" (floating point) instructions from ↵Michael Zuckerman2015-11-121-0/+14
| | | | | | | | | | | {fadd,fdiv,fmul,fsub,fsubr,fdivr} to {faddp,fdivp,fmulp,fsubp,fsubrp,fdivrp} LLVM Missing the following instructions: fadd\fdiv\fmul\fsub\fsubr\fdivr. GAS and MS supporting this instruction and lowering them in to a faddp\fdivp\fmulp\fsubp\fsubrp\fdivrp instructions. Differential Revision: http://reviews.llvm.org/D14217 llvm-svn: 252908
* [MC] Don't crash when .word is given bogus valuesDavid Majnemer2015-10-261-1/+10
| | | | | | | | | | We didn't validate that the .word directive was given a sane value, leading to crashes when we attempt to write out the object file. Instead, perform some validation and issue a diagnostic pointing at the start of the diagnostic. llvm-svn: 251270
* [X86] Add support to assembler and MCInst lowering to use the other vmovq ↵Craig Topper2015-10-121-12/+14
| | | | | | %xmmX, %xmmX encoding if it would be a shorter VEX encoding. llvm-svn: 250014
* [X86] Add some instruction aliases to get the assembly parser table to favor ↵Craig Topper2015-10-121-63/+0
| | | | | | | | arithmetic instructions with 8-bit immediates over the forms that implicitly use the ax/eax/rax. This allows us to remove the explicit code for working around the existing priority llvm-svn: 250011
* [X86] Remove special validation for INT immediate operand from AsmParser. ↵Craig Topper2015-10-111-23/+0
| | | | | | | | Instead mark its operand type as u8imm which will cause it to fail to match. This is more consistent with other instruction behavior. This also fixes a bug where negative immediates below -128 were not being reported as errors. llvm-svn: 249989
* Use range-based for loops. NFC.Craig Topper2015-10-101-17/+15
| | | | llvm-svn: 249941
* Use emplace_back instead of a constructor call and push_back. NFCCraig Topper2015-10-101-22/+18
| | | | llvm-svn: 249940
* Untabify.NAKAMURA Takumi2015-09-221-4/+5
| | | | llvm-svn: 248264
* Reformat blank lines.NAKAMURA Takumi2015-09-221-2/+3
| | | | llvm-svn: 248263
* Reformat.NAKAMURA Takumi2015-09-221-3/+2
| | | | llvm-svn: 248261
* [ms-inline-asm] Relax assertion around funky identifiers slightlyReid Kleckner2015-08-261-6/+8
| | | | | | | | | A corresponding clang change will make it so that clang can consume part of an assembler token. The assembler treats '.' as an identifier character while clang does not, so it's view of the token stream is a little different. llvm-svn: 246089
* [X86] Add support for mmword memory operand size for Intel-syntax x86 assemblyMichael Zuckerman2015-08-241-1/+1
| | | | | | Differential Revision: http://reviews.llvm.org/D12151 llvm-svn: 245835
* first commit to llvmMichael Zuckerman2015-08-241-0/+1
| | | | llvm-svn: 245825
* Test commit to verify commit accessMarina Yatsina2015-08-101-0/+1
| | | | llvm-svn: 244438
* [X86] Recognize "flags" as an identifier, not a register in Intel-syntax ↵Michael Kuperstein2015-07-301-0/+5
| | | | | | | | | inline asm Patch by: marina.yatsina@intel.com Differential Revision: http://reviews.llvm.org/D11512 llvm-svn: 243630
* [llvm-mc] Pushing plumbing through for --fatal-warnings flag.Colin LeMahieu2015-07-271-1/+1
| | | | llvm-svn: 243334
* X86: Use dyn_cast instead of isa+cast, NFCDuncan P. N. Exon Smith2015-07-231-5/+6
| | | | llvm-svn: 243034
* [X86] Fix order of operands for ins and outs instructions when parsing intel ↵Michael Kuperstein2015-07-231-28/+28
| | | | | | | | | syntax Patch by: marina.yatsina@intel.com Differential Revision: http://reviews.llvm.org/D11337 llvm-svn: 243001
* [X86] Add support for tbyte memory operand size for Intel-syntax x86 assemblyMichael Kuperstein2015-07-191-0/+1
| | | | | | | Differential Revision: http://reviews.llvm.org/D11257 Patch by: marina.yatsina@intel.com llvm-svn: 242639
* Reverting r241058 because it's causing buildbot failures.Ranjeet Singh2015-06-301-32/+25
| | | | llvm-svn: 241061
* There are a few places where subtarget features are stillRanjeet Singh2015-06-301-25/+32
| | | | | | | | | represented by uint64_t, this patch replaces these usages with the FeatureBitset (std::bitset) type. Differential Revision: http://reviews.llvm.org/D10542 llvm-svn: 241058
* Add support for parsing the XOR operator in Intel syntax inline assembly.Michael Kuperstein2015-06-141-12/+39
| | | | | | | Differential Revision: http://reviews.llvm.org/D10385 Patch by marina.yatsina@intel.com llvm-svn: 239695
* MC: Clean up MCExpr naming. NFC.Jim Grosbach2015-05-301-17/+17
| | | | llvm-svn: 238634
* Use std::bitset for SubtargetFeatures.Michael Kuperstein2015-05-261-12/+13
| | | | | | | | | | | | Previously, subtarget features were a bitfield with the underlying type being uint64_t. Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset. No functional change. The first several times this was committed (e.g. r229831, r233055), it caused several buildbot failures. Apparently the reason for most failures was both clang and gcc's inability to deal with large numbers (> 10K) of bitset constructor calls in tablegen-generated initializers of instruction info tables. This should now be fixed. llvm-svn: 238192
* MC: Clean up method names in MCContext.Jim Grosbach2015-05-181-2/+2
| | | | | | | The naming was a mish-mash of old and new style. Update to be consistent with the new. NFC. llvm-svn: 237594
* MC: Modernize MCOperand API naming. NFC.Jim Grosbach2015-05-131-2/+2
| | | | | | MCOperand::Create*() methods renamed to MCOperand::create*(). llvm-svn: 237275
* Reverting r237234, "Use std::bitset for SubtargetFeatures"Michael Kuperstein2015-05-131-13/+12
| | | | | | | The buildbots are still not satisfied. MIPS and ARM are failing (even though at least MIPS was expected to pass). llvm-svn: 237245
* Use std::bitset for SubtargetFeaturesMichael Kuperstein2015-05-131-12/+13
| | | | | | | | | | | Previously, subtarget features were a bitfield with the underlying type being uint64_t. Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset. No functional change. The first two times this was committed (r229831, r233055), it caused several buildbot failures. At least some of the ARM and MIPS ones were due to gcc/binutils issues, and should now be fixed. llvm-svn: 237234
* AVX-512: Added all forms of FP compare instructions for KNL and SKX.Elena Demikhovsky2015-05-071-1/+9
| | | | | | | | Added intrinsics for the instructions. CC parameter of the intrinsics was changed from i8 to i32 according to the spec. By Igor Breger (igor.breger@intel.com) llvm-svn: 236714
* Remove more superfluous .str() and replace std::string concatenation with Twine.Yaron Keren2015-03-301-1/+1
| | | | | | Following r233392, http://llvm.org/viewvc/llvm-project?rev=233392&view=rev. llvm-svn: 233555
* Revert "Use std::bitset for SubtargetFeatures"Michael Kuperstein2015-03-241-13/+12
| | | | | | | | This reverts commit r233055. It still causes buildbot failures (gcc running out of memory on several platforms, and a self-host failure on arm), although less than the previous time. llvm-svn: 233068
* Use std::bitset for SubtargetFeaturesMichael Kuperstein2015-03-241-12/+13
| | | | | | | | | | | | | Previously, subtarget features were a bitfield with the underlying type being uint64_t. Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset. No functional change. The first time this was committed (r229831), it caused several buildbot failures. At least some of the ARM ones were due to gcc/binutils issues, and should now be fixed. Differential Revision: http://reviews.llvm.org/D8542 llvm-svn: 233055
* AVX-512: Add assembly parser support for Rounding modeElena Demikhovsky2015-03-021-0/+42
| | | | | | By Asaf Badouh <asaf.badouh@intel.com> llvm-svn: 230962
* Reverting r229831 due to multiple ARM/PPC/MIPS build-bot failures.Michael Kuperstein2015-02-191-11/+10
| | | | llvm-svn: 229841
* Use std::bitset for SubtargetFeaturesMichael Kuperstein2015-02-191-10/+11
| | | | | | | | | | | Previously, subtarget features were a bitfield with the underlying type being uint64_t. Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset. No functional change. Differential Revision: http://reviews.llvm.org/D7065 llvm-svn: 229831
* [X86] Add assembly parser support for mnemonic aliases for AVX-512 vpcmp ↵Craig Topper2015-02-151-12/+39
| | | | | | instructions. llvm-svn: 229287
* [X86] Improve parsing support AVX/SSE floating point compare instruction ↵Craig Topper2015-02-141-19/+9
| | | | | | mnemonic aliases. They'll now print with the alias the parser received instead of converting to the explicit immediate form. llvm-svn: 229266
* [X86] Add support for parsing and printing the mnemonic aliases for the XOP ↵Craig Topper2015-02-131-0/+27
| | | | | | VPCOM instructions. llvm-svn: 229078
* X86: fix comment typo in AsmParserSaleem Abdulrasool2015-01-161-1/+1
| | | | | | Fix a typo. NFC. llvm-svn: 226313
* Use the operand vector instead so inline assembly can be validated tooDavid Majnemer2015-01-141-5/+5
| | | | | | The buildbots got upset after r225941, this should hopefully fix things. llvm-svn: 225954
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