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* [WebAssembly] v128.constThomas Lively2018-08-216-17/+141
| | | | | | | | | | | | | | | | Summary: This CL implements v128.const for each vector type. New operand types are added to ensure the vector contents can be serialized without LEB encoding. Tests are added for instruction selection, encoding, assembly and disassembly. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D50873 llvm-svn: 340336
* [WebAssembly] Change writeSPToMemory to writeSPToGlobal (NFC)Heejin Ahn2018-08-211-4/+4
| | | | | | | | | | | | Summary: SP is now a __stack_pointer global and not a memory address anymore. Reviewers: dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D51046 llvm-svn: 340328
* [WebAssembly] Add isEHScopeReturn instruction propertyHeejin Ahn2018-08-211-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | Summary: So far, `isReturn` property is used to mean both a return instruction from a functon and the end of an EH scope, a scope that starts with a EH scope entry BB and ends with a catchret or a cleanupret instruction. Because WinEH uses funclets, all EH-scope-ending instructions are also real return instruction from a function. But for wasm, they only serve as the end marker of an EH scope but not a return instruction that exits a function. This mismatch caused incorrect prolog and epilog generation in wasm EH scopes. This patch fixes this. This patch is in the same vein with rL333045, which splits `MachineBasicBlock::isEHFuncletEntry` into `isEHFuncletEntry` and `isEHScopeEntry`. Reviewers: dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D50653 llvm-svn: 340325
* [WebAssembly] Revert type of wake count in atomic.wake to i32Heejin Ahn2018-08-201-18/+18
| | | | | | | | | | | | | | Summary: We decided to revert this from i64 to i32 in Nov 28 CG meeting. Fixes PR38632. Reviewers: dschuff Subscribers: sbc100, jgravelle-google, sunfish, jfb, llvm-commits Differential Revision: https://reviews.llvm.org/D51010 llvm-svn: 340234
* [WebAssembly] Remove an unused argument from writeSPToMemory (NFC)Heejin Ahn2018-08-201-8/+5
| | | | | | | | | | Reviewers: dschuff Subscribers: dschuff, sbc100, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D50933 llvm-svn: 340230
* [WebAssembly] Modify LateEHPrepare one-line description (NFC)Heejin Ahn2018-08-171-1/+1
| | | | llvm-svn: 339972
* [WebAssembly] CFG stackify support for exception handlingHeejin Ahn2018-08-161-108/+542
| | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This adds support for exception handling to CFGStackify pass. This only adds TRY / END_TRY markers and DOES NOT yet fix unwind mismatches that can be created by the linearization of the CFG into the structural wasm format. The mismatch fix will be added by following patches. In detail, this patch - Added support for TRY / END_TRY markers to support EH - Changed many static functions into class member functions as they take too many arguments now - Added several more bookeeping data structures - Refactored routines that decide where to insert markers, because without refactoring this got too complicated as we added support for new kinds of markers (TRY/END_TRY). - Rewrote rethrow instructions' BB arguments to relative depths in EH pad stack. Reviewers: dschuff, sunfish Subscribers: sbc100, jgravelle-google, llvm-commits Differential Revision: https://reviews.llvm.org/D48273 llvm-svn: 339967
* [WebAssembly] Remove temporary workaround for function bitcastsJacob Gravelle2018-08-161-5/+0
| | | | | | | | | | | | | | Summary: EM_ASM no longer is lowered as varargs in C, so this workaround is obsolete. Reviewers: dschuff, sunfish Subscribers: sbc100, aheejin, llvm-commits Differential Revision: https://reviews.llvm.org/D50859 llvm-svn: 339925
* [WebAssembly][NFC] Standardize SIMD multiclass formatThomas Lively2018-08-151-36/+30
| | | | | | | | | | | | | | Summary: This CL changes the ExtractLane ISEL multiclass to more closely mirror the structure of the splat and replace_lane multiclasses. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D50794 llvm-svn: 339801
* [WebAssembly] Test commitThomas Lively2018-08-151-2/+1
| | | | | | Changes a comment and some whitespace to test commit access. llvm-svn: 339798
* [WebAssembly] SIMD replace_laneDerek Schuff2018-08-151-1/+22
| | | | | | | | | | Implement and test replace_lane instructions. Patch by Thomas Lively Differential Revision: https://reviews.llvm.org/D50750 llvm-svn: 339786
* [WebAssembly] SIMD SplatsDerek Schuff2018-08-151-0/+28
| | | | | | | | | | Implement and test SIMD splat ops. Patch by Thomas Lively Differential Revision: https://reviews.llvm.org/D50741 llvm-svn: 339744
* [WebAssembly] Fix encoding of non-SIMD vector-typed instructionsHeejin Ahn2018-08-142-29/+32
| | | | | | | | | | | | | | | | | | | Previously SIMD_I was the same as a normal instruction except for the addition of a HasSIM128 predicate. However, rL339186 changed the encoding of SIMD_I instructions to automatically contain the SIMD prefix byte. This broke the encoding of non-SIMD vector-typed instructions, which had instantiated SIMD_I. This CL corrects this error. Reviewers: aheejin Subscribers: sunfish, jgravelle-google, sbc100, llvm-commits Differential Revision: https://reviews.llvm.org/D50682 Patch by Thomas Lively (tlively) llvm-svn: 339710
* [WebAssembly] SIMD extract_laneHeejin Ahn2018-08-141-2/+62
| | | | | | | | | | | | | | | | | Implement instruction selection for all versions of the extract_lane instruction. Use explicit sext/zext to differentiate between extract_lane_s and extract_lane_u for applicable types, otherwise default to extract_lane_u. Reviewers: aheejin Subscribers: sunfish, jgravelle-google, sbc100, llvm-commits Differential Revision: https://reviews.llvm.org/D50597 Patch by Thomas Lively (tlively) llvm-svn: 339707
* Revert "[WebAssembly] Added default stack-only instruction mode for MC."Wouter van Oortmerssen2018-08-136-487/+256
| | | | | | This reverts commit 917a99b71ce21c975be7bfbf66f4040f965d9f3c. llvm-svn: 339630
* Fix WebAssembly instruction printer after r339474Richard Trieu2018-08-111-1/+5
| | | | | | | | Treat the stack variants of control instructions the same as regular instructions. Otherwise, the vector ControlFlowStack will be the wrong size and have out-of-bounds access. This was detected by MemorySanitizer. llvm-svn: 339495
* [WebAssembly] Added default stack-only instruction mode for MC.Wouter van Oortmerssen2018-08-106-256/+487
| | | | | | | | | | | | | | | | | | | | | | | Summary: Moved Explicit Locals pass to last. Made that pass obligatory. Made it convert from register to stack based instructions, and removed the registers. Fixes to related code that was expecting register based instructions. Added the correct testing flag to all tests, depending on what the format they were expecting so far. Translated one test to stack format as example: reg-stackify-stack.ll tested: llvm-lit -v `find test -name WebAssembly` unittests/MC/* Reviewers: dschuff, sunfish Subscribers: jfb, llvm-commits, aheejin, eraman, jgravelle-google, sbc100 Differential Revision: https://reviews.llvm.org/D50568 llvm-svn: 339474
* [WebAssembly] Gate i64x2 and f64x2 on -wasm-enable-unimplementedHeejin Ahn2018-08-091-2/+10
| | | | | | | | | | | | | | | | | | Summary: i64x2 and f64x2 operations are not implemented in V8, so we normally do not want to emit them. However, they are in the SIMD spec proposal, so we still want to be able to test them in the toolchain. This patch adds a flag to enable their emission. Reviewers: aheejin, dschuff Subscribers: sunfish, jgravelle-google, sbc100, llvm-commits Differential Revision: https://reviews.llvm.org/D50423 Patch by Thomas Lively (tlively) llvm-svn: 339407
* [WebAssembly] Fix wasm backend compilation on gcc 5.4: variable name cannot ↵Heejin Ahn2018-08-091-5/+5
| | | | | | | | | | | | | | | | | | | | | | | match class Summary: gcc does not like const Region *Region; It wants a different name for the variable. Is there a better convention for what name to use in such a case? Reviewers: sbc100, aheejin Subscribers: aheejin, jgravelle-google, dschuff, llvm-commits Differential Revision: https://reviews.llvm.org/D50472 Patch by Alon Zakai (kripken) llvm-svn: 339398
* [Wasm] Don't iterate over MachineBasicBlock::successors while erasing from itBenjamin Kramer2018-08-081-8/+10
| | | | | | This will read out of bounds. Found by asan. llvm-svn: 339230
* [WebAssembly] Update SIMD binary arithmeticDerek Schuff2018-08-0714-18/+110
| | | | | | | | | | | | Add missing SIMD types (v2f64) and binary ops. Also adds tablegen support for automatically prepending prefix byte to SIMD opcodes. Differential Revision: https://reviews.llvm.org/D50292 Patch by Thomas Lively llvm-svn: 339186
* [WebAssembly] CFG sort support for exception handlingHeejin Ahn2018-08-071-54/+184
| | | | | | | | | | | | | | | | | Summary: This patch extends CFGSort pass to support exception handling. Once it places a loop header, it does not place blocks that are not dominated by the loop header until all the loop blocks are sorted. This patch extends the same algorithm to exception 'catch' part, using the information calculated by WebAssemblyExceptionInfo class. Reviewers: dschuff, sunfish Subscribers: sbc100, jgravelle-google, llvm-commits Differential Revision: https://reviews.llvm.org/D46500 llvm-svn: 339172
* [WebAssembly] Enable atomic expansion for unsupported atomicrmwsHeejin Ahn2018-08-073-4/+23
| | | | | | | | | | | | | | | | Summary: Wasm does not have direct counterparts to some of LLVM IR's atomicrmw instructions (min, max, umin, umax, and nand). This enables atomic expansion using cmpxchg instruction within a loop for those atomicrmw instructions. Reviewers: dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D49440 llvm-svn: 339084
* [WebAssembly] Replace SIMD expression types with V128Derek Schuff2018-08-063-23/+13
| | | | | | | | | | | | Summary: The spec only defines a SIMD expression type of V128 and leaves interpretation of different vector types to the instructions. Differential Revision: https://reviews.llvm.org/D50367 Patch by Thomas Lively llvm-svn: 339082
* [WebAssembly] Cleanup of the way globals and global flags are handledNicholas Wilson2018-08-038-16/+35
| | | | | | Differential Revision: https://reviews.llvm.org/D44030 llvm-svn: 338894
* [WebAssembly] Support for atomic.wait / atomic.wake instructionsHeejin Ahn2018-08-025-0/+178
| | | | | | | | | | | | | | Summary: This adds support for atomic.wait / atomic.wake instructions in the wasm thread proposal. Reviewers: dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D49395 llvm-svn: 338770
* [WebAssembly] Ensure bitcasts that would result in invalid wasm are removed ↵Sam Clegg2018-08-021-25/+82
| | | | | | | | | | | | by FixFunctionBitcasts Rather than allowing invalid bitcasts to be lowered to wasm call instructions that won't validate, generate wrappers that contain unreachable thereby delaying the error until runtime. Differential Revision: https://reviews.llvm.org/D49517 llvm-svn: 338744
* [WebAssembly] Support for a ternary atomic RMW instructionHeejin Ahn2018-08-013-0/+264
| | | | | | | | | | | | Summary: This adds support for a ternary atomic RMW instruction: cmpxchg. Reviewers: dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D49195 llvm-svn: 338617
* Revert "[WebAssembly] Added default stack-only instruction mode for MC."Wouter van Oortmerssen2018-07-275-475/+252
| | | | | | | This reverts commit d3c9af4179eae7793d1487d652e2d4e23844555f. (SVN revision 338164) llvm-svn: 338176
* [WebAssembly] Added default stack-only instruction mode for MC.Wouter van Oortmerssen2018-07-275-252/+475
| | | | | | | | | | | | | | | | | | | | | | | Summary: Moved Explicit Locals pass to last. Made that pass obligatory. Made it convert from register to stack based instructions, and removed the registers. Fixes to related code that was expecting register based instructions. Added the correct testing flag to all tests, depending on what the format they were expecting so far. Translated one test to stack format as example: reg-stackify-stack.ll tested: llvm-lit -v `find test -name WebAssembly` unittests/MC/* Reviewers: dschuff, sunfish Subscribers: sbc100, jgravelle-google, eraman, aheejin, llvm-commits Differential Revision: https://reviews.llvm.org/D49160 llvm-svn: 338164
* Put "built-in" function definitions in global Used list, for LTO. (fix bug ↵Peter Collingbourne2018-07-241-1/+1
| | | | | | | | | | | | | | 34169) When building with LTO, builtin functions that are defined but whose calls have not been inserted yet, get internalized. The Global Dead Code Elimination phase in the new LTO implementation then removes these function definitions. Later optimizations add calls to those functions, and the linker then dies complaining that there are no definitions. This CL fixes the new LTO implementation to check if a function is builtin, and if so, to not internalize (and later DCE) the function. As part of this fix I needed to move the RuntimeLibcalls.{def,h} files from the CodeGen subidrectory to the IR subdirectory. I have updated all the files that accessed those two files to access their new location. Fixes PR34169 Patch by Caroline Tice! Differential Revision: https://reviews.llvm.org/D49434 llvm-svn: 337847
* [WebAssembly] Disable a test that violates DR1696Heejin Ahn2018-07-201-0/+1
| | | | | | | | | | | | | | Summary: lifetime2.C violates DR1696, which prevents reference members from being initialized to temporaries, whose lifetime would end at the end of ctor. Reviewers: sbc100 Subscribers: dschuff, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D49577 llvm-svn: 337512
* [WebAssembly] Add missing -mattr=+exception-handling guardsHeejin Ahn2018-07-181-0/+3
| | | | | | | | | | | | | | Summary: The use of exception handling instructions should only be enabled with `-mattr=+exception-handling` option. Reviewers: jgravelle-google Subscribers: dschuff, sbc100, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D49391 llvm-svn: 337425
* [WebAssembly] Update WebAssemblyLowerEmscriptenEHSjLj to handle separate ↵Sam Clegg2018-07-171-38/+17
| | | | | | | | | | | | | | | | | | | | | compilation Previously we were assuming whole program compilation. Now that separate compilation is a thing we need to update this pass. Firstly, it can no longer assert on the existence of malloc and free. This functions might not be in the current translation unit. If we need them then we will generate not imports for them. Secondly the global helper function we create should be marked as weak since we will be generating a separate copy in each translation unit. Finally the names of the symbols used must be unique and fixed since they need to agree across translation units. Differential Revision: https://reviews.llvm.org/D49263 llvm-svn: 337301
* [WebAssembly] Remove ELF file support.Sam Clegg2018-07-1620-341/+55
| | | | | | | | | This support was partial and temporary. Now that we have wasm object file support its no longer needed. Differential Revision: https://reviews.llvm.org/D48744 llvm-svn: 337222
* [WebAssembly] Only call llvm::value::dump() in debug build.Eric Liu2018-07-111-0/+2
| | | | | | | This fixes compile error in r336759. llvm::value::dump is not available in released build. llvm-svn: 336770
* [WebAssembly] Add pass to infer prototypes for prototype-less functionsSam Clegg2018-07-114-0/+149
| | | | | | | | See https://bugs.llvm.org/show_bug.cgi?id=35385 Differential Revision: https://reviews.llvm.org/D48471 llvm-svn: 336759
* [WebAssembly] Support for binary atomic RMW instructionsHeejin Ahn2018-07-093-6/+444
| | | | | | | | | | | | | | | | | | Summary: This adds support for binary atomic read-modify-write instructions: add, sub, and, or, xor, and xchg. This does not yet support translations of some of LLVM IR atomicrmw instructions (nand, max, min, umax, and umin) that do not have a direct counterpart in wasm instructions. Reviewers: dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D49088 llvm-svn: 336615
* [WebAssembly] Improve readability of load/stores and tests. NFC.Heejin Ahn2018-07-092-99/+89
| | | | | | | | | | | | | | | | | Summary: - Changed variable/function names to be more consistent - Improved comments in test files - Added more tests - Fixed a few typos - Misc. cosmetic changes Reviewers: dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D49087 llvm-svn: 336598
* [WebAssembly] Add missing _S opcodes of atomic stores to InstPrinterHeejin Ahn2018-07-051-0/+7
| | | | | | | | | | | | Summary: This was missing in D48839 (rL336145). Reviewers: aardappel Subscribers: dschuff, sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D48992 llvm-svn: 336390
* [WebAssembly] Support for atomic storesHeejin Ahn2018-07-023-1/+153
| | | | | | | | | | | | Summary: Add support for atomic store instructions. Reviewers: dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D48839 llvm-svn: 336145
* [WebAssembly] Fix fast-isel optimization of branch conditions.Dan Gohman2018-07-021-1/+1
| | | | | | | | | | | LLVM doesn't guarantee anything about the high bits of a register holding an i1 value at the IR level, so don't translate LLVM IR i1 values directly into WebAssembly conditional branch operands. WebAssembly's conditional branches do demand all 32 bits be valid. Fixes PR38019. llvm-svn: 336138
* [WebAssembly] Comment out a switch block in ISelDAGToDAGHeejin Ahn2018-06-291-5/+4
| | | | | | | | | | | | Summary: Fixes PR37977. Reviewers: RKSimon Subscribers: dschuff, sbc100, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D48737 llvm-svn: 336017
* [WebAssembly] Add getSetCCResultType placeholder override to handle vector ↵Simon Pilgrim2018-06-282-0/+12
| | | | | | | | compare results. Necessary to get the rL335821 bugfix (which was reverted at rL335871) un-reverted. llvm-svn: 335884
* [WebAssembly] Fix lowering of varargs functions with non-legal fixed arguments.Dan Gohman2018-06-261-2/+3
| | | | | | | | | | | CallLoweringInfo's NumFixedArgs field gives the number of fixed arguments before legalization. The ISD::OutputArg "Outs" array holds legalized arguments, so when indexing into it to find the non-fixed arguemn, we need to use the number of arguments after legalization. Fixes PR37934. llvm-svn: 335576
* [WebAssembly] Fix a typo in a comment.Dan Gohman2018-06-261-1/+1
| | | | llvm-svn: 335574
* [WebAssembly] Add WebAssemblyException information analysisHeejin Ahn2018-06-255-0/+370
| | | | | | | | | | | | | | | | | Summary: A WebAssemblyException object contains BBs that belong to a 'catch' part of the try-catch-end structure. Because CFGSort requires all the BBs within a catch part to be sorted together as it does for loops, this pass calculates the nesting structure of catch part of exceptions in a function. Now this assumes the use of Windows EH instructions. Reviewers: dschuff, majnemer Subscribers: jfb, mgorny, sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D44134 llvm-svn: 335439
* [WebAssembly] Add WebAssemblyLateEHPrepare passHeejin Ahn2018-06-255-93/+388
| | | | | | | | | | | | | | | | Summary: Add WebAssemblyLateEHPrepare pass that does several small jobs for exception handling. This runs before CFGSort, and is different from WasmEHPrepare pass that runs before ISel, even though the names are similar. Reviewers: dschuff, majnemer Subscribers: sbc100, jgravelle-google, sunfish, mgorny, llvm-commits Differential Revision: https://reviews.llvm.org/D46803 llvm-svn: 335438
* [WebAssembly] Update know failures for the wasm waterfallSam Clegg2018-06-201-7/+2
| | | | | | | | | | | | Summary: The waterfall no longer builds .s files and no longers uses the wasm-o when it builds object files. Subscribers: dschuff, jgravelle-google, aheejin, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D48371 llvm-svn: 335135
* [WebAssembly] Fix liveness tracking info after drop insertionHeejin Ahn2018-06-191-2/+8
| | | | | | | | | | | | | | | | | | | | Summary: This fixes liveness tracking information after `drop` instruction insertion in ExplicitLocals pass. When a drop instruction is inserted to drop a dead register operand, the original operand should be marked not dead anymore because it is now used by the new drop instruction. And the operand to the new drop instruction should be marked killed instead. This bug caused some programs to fail when `llc` is run with `-verify-machineinstrs` option. Reviewers: dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D48253 llvm-svn: 335074
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