summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/WebAssembly
Commit message (Collapse)AuthorAgeFilesLines
* [WebAssembly] Rename memory_size intrinsic to current_memoryDerek Schuff2016-05-021-9/+9
| | | | | | This follows the recent renaming in the wasm spec. llvm-svn: 268255
* [CodeGen] Default CTTZ_ZERO_UNDEF/CTLZ_ZERO_UNDEF to Expand in ↵Craig Topper2016-04-281-1/+1
| | | | | | TargetLoweringBase. This is what the majority of the targets want and removes a bunch of code. Set it to Legal explicitly in the few cases where that's the desired behavior. llvm-svn: 267853
* [WebAssembly] Account for implicit operands when computing operand indices.Dan Gohman2016-04-261-1/+1
| | | | llvm-svn: 267511
* [WebAssembly] Set ctlz_zero_undef/cttz_zero_undef to Expand so LegalizeDAG ↵Craig Topper2016-04-232-7/+1
| | | | | | will convert them to ctlz/cttz. Remove the now unneccessary isel patterns. NFC llvm-svn: 267264
* [WebAssembly] Limit alignment hints to natural alignment.Dan Gohman2016-04-211-3/+9
| | | | | | This follows the current binary format rules. llvm-svn: 267082
* Disable the PatchableFunction pass for NVPTX & WasmSanjoy Das2016-04-191-0/+1
| | | | | | | PatchableFunction requires AllVRegsAllocated that these targets don't provide. llvm-svn: 266720
* Include SmallVector.h header in ↵Eric Liu2016-04-181-0/+1
| | | | | | lib/Target/WebAssembly/InstPrinter/WebAssemblyInstPrinter.h llvm-svn: 266606
* [NFC] Header cleanupMehdi Amini2016-04-185-6/+0
| | | | | | | | | | | | | | Removed some unused headers, replaced some headers with forward class declarations. Found using simple scripts like this one: clear && ack --cpp -l '#include "llvm/ADT/IndexedMap.h"' | xargs grep -L 'IndexedMap[<]' | xargs grep -n --color=auto 'IndexedMap' Patch by Eugene Kosov <claprix@yandex.ru> Differential Revision: http://reviews.llvm.org/D19219 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 266595
* RegisterScavenger: Take a reference as enterBasicBlock() argument.Matthias Braun2016-04-061-2/+2
| | | | | | | Make it obvious that the argument cannot be nullptr. Remove an unnecessary nullptr check in initRegState. llvm-svn: 265511
* Change eliminateCallFramePseudoInstr() to return an iteratorHans Wennborg2016-03-313-13/+5
| | | | | | | | | | | | | | | | | | | | | This will become necessary in a subsequent change to make this method merge adjacent stack adjustments, i.e. it might erase the previous and/or next instruction. It also greatly simplifies the calls to this function from Prolog- EpilogInserter. Previously, that had a bunch of logic to resume iteration after the call; now it just continues with the returned iterator. Note that this changes the behaviour of PEI a little. Previously, it attempted to re-visit the new instruction created by eliminateCallFramePseudoInstr(). That code was added in r36625, but I can't see any reason for it: the new instructions will obviously not be pseudo instructions, they will not have FrameIndex operands, and we have already accounted for the stack adjustment. Differential Revision: http://reviews.llvm.org/D18627 llvm-svn: 265036
* [WebAssembly] Remove duplicate disabling of passesDerek Schuff2016-03-281-12/+6
| | | | | | Also put all the disabled passes together llvm-svn: 264684
* Introduce MachineFunctionProperties and the AllVRegsAllocated propertyDerek Schuff2016-03-281-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | MachineFunctionProperties represents a set of properties that a MachineFunction can have at particular points in time. Existing examples of this idea are MachineRegisterInfo::isSSA() and MachineRegisterInfo::tracksLiveness() which will eventually be switched to use this mechanism. This change introduces the AllVRegsAllocated property; i.e. the property that all virtual registers have been allocated and there are no VReg operands left. With this mechanism, passes can declare that they require a particular property to be set, or that they set or clear properties by implementing e.g. MachineFunctionPass::getRequiredProperties(). The MachineFunctionPass base class verifies that the requirements are met, and handles the setting and clearing based on the delcarations. Passes can also directly query and update the current properties of the MF if they want to have conditional behavior. This change annotates the target-independent post-regalloc passes; future changes will also annotate target-specific ones. Reviewers: qcolombet, hfinkel Differential Revision: http://reviews.llvm.org/D18421 llvm-svn: 264593
* [WebAssembly] Implement the rotate instructions.Dan Gohman2016-03-222-1/+9
| | | | llvm-svn: 264076
* [WebAssembly] Implement the eqz instructions.Dan Gohman2016-03-211-0/+7
| | | | llvm-svn: 263976
* [WebAssembly] Stackify code emitted by eliminateFrameIndex and SP writebackDerek Schuff2016-03-172-19/+85
| | | | | | | | | | | | | | | | | Summary: MRI::eliminateFrameIndex can emit several instructions to do address calculations; these can usually be stackified. Because instructions with FI operands can have subsequent operands which may be expression trees, find the top of the leftmost tree and insert the code before it, to keep the LIFO property. Also use stackified registers when writing back the SP value to memory in the epilog; it's unnecessary because SP will not be used after the epilog, and it results in better code. Differential Revision: http://reviews.llvm.org/D18234 llvm-svn: 263725
* Try to fix build of WebAssemblyRegStackify.cpp on WindowsHans Wennborg2016-03-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | It's failing to build on VS2015 with: C:\b\build\slave\ClangToTWin\build\src\third_party\llvm\lib\Target\WebAssembly\WebAssemblyRegStackify.cpp(520): error C2668: 'llvm::make_reverse_iterator': ambiguous call to overloaded function C:\b\build\slave\ClangToTWin\build\src\third_party\llvm\include\llvm/ADT/STLExtras.h(217): note: could be 'std::reverse_iterator<llvm::MachineBasicBlock::iterator> llvm::make_reverse_iterator<llvm::MachineInstrBundleIterator<llvm::MachineInstr>>(IteratorTy)' with [ IteratorTy=llvm::MachineInstrBundleIterator<llvm::MachineInstr> ] C:\b\depot_tools\win_toolchain\vs_files\391bbf1220d3edcd3cc3fccdb56224181e3b13a7\win_sdk\bin\..\..\VC\include\xutility(1217): note: or 'std::reverse_iterator<llvm::MachineBasicBlock::iterator> std::make_reverse_iterator<llvm::MachineInstrBundleIterator<llvm::MachineInstr>>(_RanIt)' [found using argument-dependent lookup] with [ _RanIt=llvm::MachineInstrBundleIterator<llvm::MachineInstr> ] I don't have VS2015 locally at the moment, but hopefully this will help. llvm-svn: 263418
* [WebAssembly] Add `final` keywords to a few more subclasses, for consistency.Dan Gohman2016-03-112-2/+2
| | | | llvm-svn: 263287
* [WebAssembly] Update known gcc test failuresDerek Schuff2016-03-091-3/+0
| | | | llvm-svn: 263068
* [WebAssembly] Update comments about irreducible control flow.Dan Gohman2016-03-092-8/+13
| | | | llvm-svn: 262995
* [WebAssembly] Implement irreducible control flow.Dan Gohman2016-03-095-35/+297
| | | | | | | | This implements a very simple conservative transformation that doesn't require more than linear code size growth. There's room for much more optimization in this space. llvm-svn: 262982
* [WebAssembly] Update for spec change from tableswitch to br_table.Dan Gohman2016-03-085-18/+18
| | | | | | | Also note that the operand order changed; the default label is now listed after the regular labels. llvm-svn: 262903
* [WebAssembly] Add another possible code-size optimization to README.txtDan Gohman2016-03-041-0/+6
| | | | llvm-svn: 262740
* WebAssembly: fix buildJF Bastien2016-02-282-3/+3
| | | | | | More API churn, experimental target got sad. llvm-svn: 262179
* WebAssembly: fix buildJF Bastien2016-02-271-8/+8
| | | | | | It was broken by the work for PR26753. llvm-svn: 262140
* Revert "[WebAssembly] Stackify code emitted by eliminateFrameIndex"Derek Schuff2016-02-231-7/+3
| | | | | | This reverts r261685 due to wasm test breakage. llvm-svn: 261702
* [WebAssembly] Stackify code emitted by eliminateFrameIndexDerek Schuff2016-02-231-3/+7
| | | | llvm-svn: 261685
* [WebAssembly] Add TODO comment to revisit red zone sizeDerek Schuff2016-02-231-0/+3
| | | | llvm-svn: 261664
* [WebAssembly] Implement red zone for user stackDerek Schuff2016-02-232-5/+31
| | | | | | | | | | | Implements a mostly-conventional redzone for the userspace stack. Because we have unsigned load/store offsets we continue to use a local SP subtracted from the incoming SP but do not write it back to memory. Differential Revision: http://reviews.llvm.org/D17525 llvm-svn: 261662
* [WebAssembly] Fix writeback of stack pointer with dynamic allocaDerek Schuff2016-02-221-32/+35
| | | | | | | | | | | Previously the stack pointer was only written back to memory in the prolog. But this is wrong for dynamic allocas, for which target-independent codegen handles SP updates after the prolog (and possibly even in another BB). Instead update the SP global in ADJCALLSTACKDOWN which is generated after the SP update sequence. This will have further refinements when we add red zone support. llvm-svn: 261579
* [WebAssembly] Re-enable the TailDuplicate pass.Dan Gohman2016-02-221-1/+0
| | | | llvm-svn: 261566
* WebAssembly: update expected failuresJF Bastien2016-02-221-20/+0
| | | | | | clang r261557 lowers va_arg in clang. llvm-svn: 261564
* [WebAssembly] Teach address folding to fold bitwise-or nodes.Dan Gohman2016-02-221-0/+68
| | | | | | | | | LLVM converts adds into ors when it can prove that the operands don't share any non-zero bits. Teach address folding to recognize or instructions with constant operands with this property that can be folded into addresses as if they were adds. llvm-svn: 261562
* [WebAssembly] Properly ignore llvm.dbg.value instructions.Dan Gohman2016-02-221-1/+5
| | | | llvm-svn: 261538
* WebAssembly: update expected torture test failuresJF Bastien2016-02-211-4/+0
| | | | | | r261457 handles CopyToReg nodes with flag results in LowerCopyToReg, which was causing the SelectionDAGNodes assert. llvm-svn: 261479
* [WebAssembly] Support physical registers in the rewrite-to-discard optimization.Dan Gohman2016-02-211-6/+10
| | | | llvm-svn: 261465
* [WebAssembly] Refine a README.txt entry.Dan Gohman2016-02-201-2/+2
| | | | | | | The register coloring pass may also need to be involved in order to optimally sort registers. llvm-svn: 261458
* [WebAssembly] Handle CopyToReg nodes with flag results in LowerCopyToReg.Dan Gohman2016-02-201-3/+7
| | | | llvm-svn: 261457
* [WebAssembly] Write stack pointer back to memory when FP is usedDerek Schuff2016-02-201-1/+1
| | | | | | | | The stack pointer is bumped when there is a frame pointer or when there are static-size objects, but was only getting written back when there were static-size objects. llvm-svn: 261453
* [WebAssembly] Stackify function prologs and epilogsDerek Schuff2016-02-201-15/+21
| | | | | | | | The instructions are the same, but fewer locals are used. Differential Revision: http://reviews.llvm.org/D17428 llvm-svn: 261452
* [WebAssembly] Add another optimization idea to README.txt.Dan Gohman2016-02-191-0/+6
| | | | llvm-svn: 261354
* [WebAssembly] Don't use setRequiresStructuredCFG(true).Dan Gohman2016-02-181-3/+4
| | | | | | | | | | | | While we still do want reducible control flow, the RequiresStructuredCFG flag imposes more strict structure constraints than WebAssembly wants. Unsetting this flag enables critical edge splitting and tail merging. Also, disable TailDuplication explicitly, as it doesn't support virtual registers, and was previously only disabled by the RequiresStructuredCFG flag. llvm-svn: 261190
* [WebAssembly] Disable register stackification and coloring when not optimizingDerek Schuff2016-02-173-11/+23
| | | | | | | | | | | | | | These passes are optimizations, and should be disabled when not optimizing. Also create an MCCodeGenInfo so the opt level is correctly plumbed to the backend pass manager. Also remove the command line flag for disabling register coloring; running llc with -O0 should now be useful for debugging, so it's not necessary. Differential Revision: http://reviews.llvm.org/D17327 llvm-svn: 261176
* WebAssembly: update expected failuresJF Bastien2016-02-171-3/+0
| | | | | | r261050 seems to inadvertently fix the assertion failure. llvm-svn: 261051
* [WebAssembly] Call memcpy for large byval copies.Dan Gohman2016-02-171-1/+1
| | | | | | | | | | This fixes very slow compilation on test/CodeGen/Generic/2010-11-04-BigByval.ll . Note that MaxStoresPerMemcpy and friends are not yet carefully tuned so the cutoff point is currently somewhat arbitrary. However, it's important that there be a cutoff point so that we don't emit unbounded quantities of loads and stores. llvm-svn: 261050
* WebAssembly: update expected test failuresJF Bastien2016-02-171-3/+0
| | | | | | r261032 adds frame address support. llvm-svn: 261044
* [WebAssembly] Use SDValue::getConstantOperandVal. NFC.Dan Gohman2016-02-171-1/+1
| | | | llvm-svn: 261037
* [WebAssembly] Implement __builtin_frame_address.Dan Gohman2016-02-164-8/+23
| | | | | | Differential Revision: http://reviews.llvm.org/D17307 llvm-svn: 261032
* [WebAssembly] Update torture test expectationsDerek Schuff2016-02-161-7/+0
| | | | | | These were fixed with r260978 llvm-svn: 261017
* [WebAssemly] Don't move calls or stores past intervening loadsDerek Schuff2016-02-161-0/+1
| | | | | | | | | | The register stackifier currently checks for intervening stores (and loads that may alias them) but doesn't account for the fact that the instruction being moved may affect intervening loads. Differential Revision: http://reviews.llvm.org/D17298 llvm-svn: 261014
* [WebAssembly] Insert COPY_LOCAL between CopyToReg and FrameIndex DAG nodesDerek Schuff2016-02-163-24/+34
| | | | | | | | | | | | | | CopyToReg nodes don't support FrameIndex operands. Other targets select the FI to some LEA-like instruction, but since we don't have that, we need to insert some kind of instruction that can take an FI operand and produces a value usable by CopyToReg (i.e. in a vreg). So insert a dummy copy_local between Op and its FI operand. This results in a redundant copy which we should optimize away later (maybe in the post-FI-lowering peephole pass). Differential Revision: http://reviews.llvm.org/D17213 llvm-svn: 260987
OpenPOWER on IntegriCloud