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* [WebAssembly] Fix handling of COPY instructions in WebAssemblyRegStackify.Dan Gohman2015-12-251-48/+52
| | | | | | | | | | | | | Move RegStackify after coalescing and teach it to use LiveIntervals instead of depending on SSA form. This avoids a problem where a register in a COPY instruction is stackified and then subsequently coalesced with a register that is not stackified. This also puts it after the scheduler, which allows us to simplify the EXPR_STACK constraint, as we no longer have instructions being reordered after stackification and before coloring. llvm-svn: 256402
* [WebAssembly] Implement eliminateCallFramePseudoDerek Schuff2015-12-161-1/+0
| | | | | | | | | | | | | | | | | | Summary: Implement eliminateCallFramePsuedo to handle ADJCALLSTACKUP/DOWN pseudo-instructions. Add a test calling a vararg function which causes non-0 adjustments. This revealed an issue with RegisterCoalescer wherein it eliminates a COPY from SP32 to a vreg but failes to update the live ranges of EXPR_STACK, causing a machineinstr verifier failure (so this test is commented out). Also add a dynamic alloca test, which causes a callseq_end dag node with a 0 (instead of undef) second argument to be generated. We currently fail to select that, so adjust the ADJCALLSTACKUP tablegen code to handle it. Differential Revision: http://reviews.llvm.org/D15587 llvm-svn: 255844
* [WebAssembly] Avoid adding redundant EXPR_STACK uses.Dan Gohman2015-12-141-3/+4
| | | | llvm-svn: 255563
* [WebAssembly] Fix a typo in a comment.Dan Gohman2015-12-081-1/+1
| | | | llvm-svn: 254999
* [WebAssembly] Assert MRI.isSSA() in passes that depend on SSA form.Dan Gohman2015-12-081-0/+2
| | | | llvm-svn: 254995
* [WebAssembly] Fix scheduling dependencies in register-stackified codeDan Gohman2015-12-051-9/+42
| | | | | | | | | | | Add physical register defs to instructions used from stackified instructions to prevent them from being scheduled into the middle of a stack sequence. This is a conservative measure which may be loosened in the future. Differential Revision: http://reviews.llvm.org/D15252 llvm-svn: 254811
* [WebAssembly] Initial varargs support.Dan Gohman2015-12-041-0/+4
| | | | | | | | | Full varargs support will depend on prologue/epilogue support, but this patch gets us started with most of the basic infrastructure. Differential Revision: http://reviews.llvm.org/D15231 llvm-svn: 254799
* [WebAssembly] Fix dominance check for PHIs in the StoreResult passDan Gohman2015-12-031-5/+4
| | | | | | | | | | | | | | When a block has no terminator instructions, getFirstTerminator() returns end(), which can't be used in dominance checks. Check dominance for phi operands separately. Also, remove some bits from WebAssemblyRegStackify.cpp that were causing trouble on the same testcase; they were left behind from an earlier experiment. Differential Revision: http://reviews.llvm.org/D15210 llvm-svn: 254662
* [WebAssembly] Fix comments to say "LIFO" instead of "FIFO" when describing a ↵Dan Gohman2015-12-021-1/+1
| | | | | | stack. llvm-svn: 254523
* [WebAssembly] Minor clang-format and selected clang-tidy cleanups. NFC.Dan Gohman2015-11-291-2/+3
| | | | llvm-svn: 254267
* [WebAssembly] Support for register stackifying with load and store instructions.Dan Gohman2015-11-251-28/+46
| | | | llvm-svn: 254076
* [WebAssembly] Add asserts that the expression stack is used in stack order.Dan Gohman2015-11-201-0/+23
| | | | llvm-svn: 253638
* [WebAssemby] Enforce FIFO ordering for instructions using stackified registers.Dan Gohman2015-11-201-0/+26
| | | | llvm-svn: 253634
* [WebAssembly] Enable register coloring and register stackifying.Dan Gohman2015-11-181-0/+9
| | | | | | | | | | | | | | | | This also takes the push/pop syntax another step forward, introducing stack slot numbers to make it easier to see how expressions are connected. For example, the value pushed in $push7 is popped in $pop7. And, this begins an experiment with making get_local and set_local implicit when an operation directly uses or defines a register. This greatly reduces clutter. If this experiment succeeds, it may make sense to do this for const instructions as well. And, this introduces more special code for ARGUMENTS; hopefully this code will soon be obviated by proper support for live-in virtual registers. llvm-svn: 253465
* [WebAssembly] Prototype passes for register coloring and register stackifying.Dan Gohman2015-11-161-0/+146
These passes are not yet enabled by default. llvm-svn: 253217
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