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path: root/llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
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* [WebAssembly] Add support for using a wasm global for the stack pointer.Dan Gohman2017-02-241-10/+24
| | | | | | | This replaces the __stack_pointer variable which was allocated in linear memory. llvm-svn: 296201
* [WebAssembly] Convert stackified IMPLICIT_DEF into constant 0.Dan Gohman2016-11-081-0/+37
| | | | | | | | | | Since IMPLIFIT_DEF instructions are omitted in the output, when the output of an IMPLICIT_DEF instruction is stackified, the resulting register lacks an explicit push, leading to a push/pop mismatch. Fix this by converting such IMPLICIT_DEFs into CONST_I32 0 instructions so that they have explicit pushes. llvm-svn: 286274
* [WebAssembly] Add an option to make get_local/set_local explicit.Dan Gohman2016-10-241-20/+14
| | | | | | | | | | This patch adds a pass, controlled by an option and off by default for now, for making implicit get_local/set_local explicit. This simplifies emitting wasm with MC. Differential Revision: https://reviews.llvm.org/D25836 llvm-svn: 285009
* [WebAssembly] Update to more stack-machine-oriented terminology.Dan Gohman2016-10-031-11/+11
| | | | | | | | WebAssembly has officially switched from being an AST to being a stack machine. Update various bits of terminology and README.md entries accordingly. llvm-svn: 283154
* [WebAssemby] Clean up an obsolete comment.Dan Gohman2016-10-031-2/+1
| | | | | | The comment is present inside the body of GetVRegDef. llvm-svn: 283153
* Use StringRef in Pass/PassManager APIs (NFC)Mehdi Amini2016-10-011-1/+1
| | | | llvm-svn: 283004
* [WebAssembly] Make register stackification more conservativeDerek Schuff2016-09-301-19/+15
| | | | | | | | | | | | Register stackification currently checks VNInfo for changes. Make that more accurate by testing each intervening instruction for any other defs to the same virtual register. Patch by Jacob Gravelle Differential Revision: https://reviews.llvm.org/D24942 llvm-svn: 282886
* Fix WebAssembly broken build related to interface change in r281172.Eric Liu2016-09-121-2/+1
| | | | | | | | | | Reviewers: bkramer Subscribers: jfb, llvm-commits, dschuff Differential Revision: https://reviews.llvm.org/D24449 llvm-svn: 281201
* [CodeGen] Rename MachineInstr::isInvariantLoad to ↵Justin Lebar2016-09-101-1/+1
| | | | | | | | | | | | | | | | | | | | isDereferenceableInvariantLoad. NFC Summary: I want to separate out the notions of invariance and dereferenceability at the MI level, so that they correspond to the equivalent concepts at the IR level. (Currently an MI load is MI-invariant iff it's IR-invariant and IR-dereferenceable.) First step is renaming this function. Reviewers: chandlerc Subscribers: MatzeB, jfb, llvm-commits Differential Revision: https://reviews.llvm.org/D23370 llvm-svn: 281125
* [WebAssembly] Handle debug information and virtual registers without ↵Dominic Chen2016-08-171-2/+2
| | | | | | | | | | | | | | crashing (reland r278967) Summary: Currently, enabling debug information when compiling for WebAssembly crashes the backend. This commit fixes these by skipping debug values in backend passes. Reviewers: jfb, aprantl, dschuff, echristo Subscribers: llvm-commits, dschuff, jfb, MatzeB, dexonsmith, yurydelendik, mehdi_amini Differential Revision: https://reviews.llvm.org/D23635 llvm-svn: 279011
* Revert "[WebAssembly] Handle debug information and virtual registers without ↵Duncan P. N. Exon Smith2016-08-171-2/+2
| | | | | | | | | | crashing" This reverts commit r278967, since the new test is failing when you don't build the WebAssembly target (most people, since it's off-by-default). llvm-svn: 278973
* [WebAssembly] Handle debug information and virtual registers without crashingDominic Chen2016-08-171-2/+2
| | | | | | | | | | | | Summary: Currently, enabling debug information when compiling for WebAssembly crashes the backend. This commit fixes these by skipping debug values in backend passes. Reviewers: jfb, aprantl, dschuff, echristo Subscribers: mehdi_amini, yurydelendik, dexonsmith, MatzeB, jfb, dschuff, llvm-commits Differential Revision: https://reviews.llvm.org/D21808 llvm-svn: 278967
* [WebAssembly] Cleanup trailing whitespaceDominic Chen2016-08-111-2/+2
| | | | | | | | | | Summary: Test for commit access. Subscribers: jfb, dschuff Differential Revision: https://reviews.llvm.org/D23392 llvm-svn: 278313
* [WebAssembly] Initial SIMD128 support.Derek Schuff2016-08-021-1/+7
| | | | | | | | | | | | | | Kicks off the implementation of wasm SIMD128 support (spec: https://github.com/stoklund/portable-simd/blob/master/portable-simd.md), adding support for add, sub, mul for i8x16, i16x8, i32x4, and f32x4. The spec is WIP, and might change in the near future. Patch by João Porto Differential Revision: https://reviews.llvm.org/D22686 llvm-svn: 277543
* WebAssembly: Avoid implicit iterator conversions, NFCDuncan P. N. Exon Smith2016-07-081-21/+20
| | | | | | | | Avoid implicit conversions from MachineInstrBundleIterator to MachineInstr* in the WebAssembly backend by preferring MachineInstr& over MachineInstr*. llvm-svn: 274912
* CodeGen: Use MachineInstr& in TargetInstrInfo, NFCDuncan P. N. Exon Smith2016-06-301-21/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is mostly a mechanical change to make TargetInstrInfo API take MachineInstr& (instead of MachineInstr* or MachineBasicBlock::iterator) when the argument is expected to be a valid MachineInstr. This is a general API improvement. Although it would be possible to do this one function at a time, that would demand a quadratic amount of churn since many of these functions call each other. Instead I've done everything as a block and just updated what was necessary. This is mostly mechanical fixes: adding and removing `*` and `&` operators. The only non-mechanical change is to split ARMBaseInstrInfo::getOperandLatencyImpl out from ARMBaseInstrInfo::getOperandLatency. Previously, the latter took a `MachineInstr*` which it updated to the instruction bundle leader; now, the latter calls the former either with the same `MachineInstr&` or the bundle leader. As a side effect, this removes a bunch of MachineInstr* to MachineBasicBlock::iterator implicit conversions, a necessary step toward fixing PR26753. Note: I updated WebAssembly, Lanai, and AVR (despite being off-by-default) since it turned out to be easy. I couldn't run tests for AVR since llc doesn't link with it turned on. llvm-svn: 274189
* [WebAssembly] Speed up LiveIntervals updating.Dan Gohman2016-05-231-6/+9
| | | | | | | | Use the more specific LiveInterval::removeSegment instead of LiveInterval::shrinkToUses when we know the specific range that's being removed. llvm-svn: 270463
* [WebAssembly] Model the stack evaluation order more precisely.Dan Gohman2016-05-171-20/+40
| | | | | | | | | | | We currently don't represent get_local and set_local explicitly; they are just implied by virtual register use and def. This avoids a lot of clutter, but it does complicate stackifying: get_locals read their operands at their position in the stack evaluation order, rather than at their parent instruction. This patch adds code to walk the stack to determine the precise ordering, when needed. llvm-svn: 269854
* [WebAssembly] Don't stackify calls past stack pointer modifications.Dan Gohman2016-05-171-12/+33
| | | | llvm-svn: 269843
* [WebAssembly] Stackify induction variable increment instructions.Dan Gohman2016-05-171-28/+65
| | | | | | | This handles instructions where the defined register is also used, as in "x = x + 1". llvm-svn: 269830
* [WebAssembly] Improve the precision of memory and side effect dependence ↵Dan Gohman2016-05-171-23/+192
| | | | | | | | | | tracking. MachineInstr::isSafeToMove is more conservative than is needed here; use a more explicit check, and incorporate knowledge of some WebAssembly-specific opcodes. llvm-svn: 269736
* [WebAssembly] Fast-isel support for calls, arguments, and selects.Dan Gohman2016-05-121-2/+3
| | | | llvm-svn: 269273
* [WebAssembly] Move register stackification and coloring to a late phase.Dan Gohman2016-05-101-16/+55
| | | | | | | | | | | | | | | | | | | Move the register stackification and coloring passes to run very late, after PEI, tail duplication, and most other passes. This means that all code emitted and expanded by those passes is now exposed to these passes. This also eliminates the need for prologue/epilogue code to be manually stackified, which significantly simplifies the code. This does require running LiveIntervals a second time. It's useful to think of these late passes not as late optimization passes, but as a domain-specific compression algorithm based on knowledge of liveness information. It's used to compress the code after all conventional optimizations are complete, which is why it uses LiveIntervals at a phase when actual optimization passes don't typically need it. Differential Revision: http://reviews.llvm.org/D20075 llvm-svn: 269012
* Try to fix build of WebAssemblyRegStackify.cpp on WindowsHans Wennborg2016-03-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | It's failing to build on VS2015 with: C:\b\build\slave\ClangToTWin\build\src\third_party\llvm\lib\Target\WebAssembly\WebAssemblyRegStackify.cpp(520): error C2668: 'llvm::make_reverse_iterator': ambiguous call to overloaded function C:\b\build\slave\ClangToTWin\build\src\third_party\llvm\include\llvm/ADT/STLExtras.h(217): note: could be 'std::reverse_iterator<llvm::MachineBasicBlock::iterator> llvm::make_reverse_iterator<llvm::MachineInstrBundleIterator<llvm::MachineInstr>>(IteratorTy)' with [ IteratorTy=llvm::MachineInstrBundleIterator<llvm::MachineInstr> ] C:\b\depot_tools\win_toolchain\vs_files\391bbf1220d3edcd3cc3fccdb56224181e3b13a7\win_sdk\bin\..\..\VC\include\xutility(1217): note: or 'std::reverse_iterator<llvm::MachineBasicBlock::iterator> std::make_reverse_iterator<llvm::MachineInstrBundleIterator<llvm::MachineInstr>>(_RanIt)' [found using argument-dependent lookup] with [ _RanIt=llvm::MachineInstrBundleIterator<llvm::MachineInstr> ] I don't have VS2015 locally at the moment, but hopefully this will help. llvm-svn: 263418
* WebAssembly: fix buildJF Bastien2016-02-281-2/+2
| | | | | | More API churn, experimental target got sad. llvm-svn: 262179
* WebAssembly: fix buildJF Bastien2016-02-271-8/+8
| | | | | | It was broken by the work for PR26753. llvm-svn: 262140
* [WebAssembly] Properly ignore llvm.dbg.value instructions.Dan Gohman2016-02-221-1/+5
| | | | llvm-svn: 261538
* [WebAssemly] Don't move calls or stores past intervening loadsDerek Schuff2016-02-161-0/+1
| | | | | | | | | | The register stackifier currently checks for intervening stores (and loads that may alias them) but doesn't account for the fact that the instruction being moved may affect intervening loads. Differential Revision: http://reviews.llvm.org/D17298 llvm-svn: 261014
* [WebAssembly] Create new registers instead of reusing old ones in RegStackify.Dan Gohman2016-02-161-7/+9
| | | | | | | | This avoids some complications updating LiveIntervals to be aware of the new register lifetimes, because we can just compute new intervals from scratch rather than describe how the old ones have been changed. llvm-svn: 260971
* [WebAssembly] Don't stackify a register def past a get_local use in the same ↵Dan Gohman2016-01-281-1/+13
| | | | | | tree. llvm-svn: 259013
* [WebAssembly] Enhanced register stackificationDan Gohman2016-01-281-61/+320
| | | | | | | | | | | This patch revamps the RegStackifier pass with a new tree traversal mechanism, enabling three major new features: - Stackification of values with multiple uses, using the result value of set_local - More aggressive stackification of instructions with side effects - Reordering operands in commutative instructions to enable more stackification. llvm-svn: 259009
* [WebAssembly] Don't stackify stores across instructions with side effects.Dan Gohman2016-01-201-1/+1
| | | | llvm-svn: 258285
* [WebAssembly] Rematerialize constants rather than hold them live in registers.Dan Gohman2016-01-191-32/+52
| | | | | | | | | Teach the register stackifier to rematerialize constants that have multiple uses instead of leaving them in registers. In the WebAssembly encoding, it's the same code size to materialize most constants as it is to read a value from a register. llvm-svn: 258142
* [WebAssembly] Don't use range-based loop for a list that's being modifiedDan Gohman2016-01-061-3/+5
| | | | | | | | The first instruction in a block is what the rend() iterator points to, so if it moves, we need to re-evaluate rend() so that we continue to iterate through the rest of the instructions. llvm-svn: 256953
* [WebAssembly] Fix handling of COPY instructions in WebAssemblyRegStackify.Dan Gohman2015-12-251-48/+52
| | | | | | | | | | | | | Move RegStackify after coalescing and teach it to use LiveIntervals instead of depending on SSA form. This avoids a problem where a register in a COPY instruction is stackified and then subsequently coalesced with a register that is not stackified. This also puts it after the scheduler, which allows us to simplify the EXPR_STACK constraint, as we no longer have instructions being reordered after stackification and before coloring. llvm-svn: 256402
* [WebAssembly] Implement eliminateCallFramePseudoDerek Schuff2015-12-161-1/+0
| | | | | | | | | | | | | | | | | | Summary: Implement eliminateCallFramePsuedo to handle ADJCALLSTACKUP/DOWN pseudo-instructions. Add a test calling a vararg function which causes non-0 adjustments. This revealed an issue with RegisterCoalescer wherein it eliminates a COPY from SP32 to a vreg but failes to update the live ranges of EXPR_STACK, causing a machineinstr verifier failure (so this test is commented out). Also add a dynamic alloca test, which causes a callseq_end dag node with a 0 (instead of undef) second argument to be generated. We currently fail to select that, so adjust the ADJCALLSTACKUP tablegen code to handle it. Differential Revision: http://reviews.llvm.org/D15587 llvm-svn: 255844
* [WebAssembly] Avoid adding redundant EXPR_STACK uses.Dan Gohman2015-12-141-3/+4
| | | | llvm-svn: 255563
* [WebAssembly] Fix a typo in a comment.Dan Gohman2015-12-081-1/+1
| | | | llvm-svn: 254999
* [WebAssembly] Assert MRI.isSSA() in passes that depend on SSA form.Dan Gohman2015-12-081-0/+2
| | | | llvm-svn: 254995
* [WebAssembly] Fix scheduling dependencies in register-stackified codeDan Gohman2015-12-051-9/+42
| | | | | | | | | | | Add physical register defs to instructions used from stackified instructions to prevent them from being scheduled into the middle of a stack sequence. This is a conservative measure which may be loosened in the future. Differential Revision: http://reviews.llvm.org/D15252 llvm-svn: 254811
* [WebAssembly] Initial varargs support.Dan Gohman2015-12-041-0/+4
| | | | | | | | | Full varargs support will depend on prologue/epilogue support, but this patch gets us started with most of the basic infrastructure. Differential Revision: http://reviews.llvm.org/D15231 llvm-svn: 254799
* [WebAssembly] Fix dominance check for PHIs in the StoreResult passDan Gohman2015-12-031-5/+4
| | | | | | | | | | | | | | When a block has no terminator instructions, getFirstTerminator() returns end(), which can't be used in dominance checks. Check dominance for phi operands separately. Also, remove some bits from WebAssemblyRegStackify.cpp that were causing trouble on the same testcase; they were left behind from an earlier experiment. Differential Revision: http://reviews.llvm.org/D15210 llvm-svn: 254662
* [WebAssembly] Fix comments to say "LIFO" instead of "FIFO" when describing a ↵Dan Gohman2015-12-021-1/+1
| | | | | | stack. llvm-svn: 254523
* [WebAssembly] Minor clang-format and selected clang-tidy cleanups. NFC.Dan Gohman2015-11-291-2/+3
| | | | llvm-svn: 254267
* [WebAssembly] Support for register stackifying with load and store instructions.Dan Gohman2015-11-251-28/+46
| | | | llvm-svn: 254076
* [WebAssembly] Add asserts that the expression stack is used in stack order.Dan Gohman2015-11-201-0/+23
| | | | llvm-svn: 253638
* [WebAssemby] Enforce FIFO ordering for instructions using stackified registers.Dan Gohman2015-11-201-0/+26
| | | | llvm-svn: 253634
* [WebAssembly] Enable register coloring and register stackifying.Dan Gohman2015-11-181-0/+9
| | | | | | | | | | | | | | | | This also takes the push/pop syntax another step forward, introducing stack slot numbers to make it easier to see how expressions are connected. For example, the value pushed in $push7 is popped in $pop7. And, this begins an experiment with making get_local and set_local implicit when an operation directly uses or defines a register. This greatly reduces clutter. If this experiment succeeds, it may make sense to do this for const instructions as well. And, this introduces more special code for ARGUMENTS; hopefully this code will soon be obviated by proper support for live-in virtual registers. llvm-svn: 253465
* [WebAssembly] Prototype passes for register coloring and register stackifying.Dan Gohman2015-11-161-0/+146
These passes are not yet enabled by default. llvm-svn: 253217
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