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* [WebAssembly] Bitselect intrinsic and instructionThomas Lively2018-10-031-0/+6
| | | | | | | | | | | | Summary: Depends on D52755. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52805 llvm-svn: 343739
* [WebAssembly] Refactor WasmSignature and use it for MCSymbolWasmDerek Schuff2018-10-031-2/+8
| | | | | | | | | | | | MCContext does not destroy MCSymbols on shutdown. So, rather than putting SmallVectors (which may heap-allocate) inside MCSymbolWasm, use unowned pointer to a WasmSignature instead. The signatures are now owned by the AsmPrinter. Also uses WasmSignature instead of param and result vectors in TargetStreamer, and leaves some TODOs for further simplification. Differential Revision: https://reviews.llvm.org/D52580 llvm-svn: 343733
* [WebAssembly] any_true and all_true intrinsics and instructionsThomas Lively2018-10-031-1/+7
| | | | | | | | | | Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52755 llvm-svn: 343649
* [WebAssembly] SIMD comparisonsThomas Lively2018-09-121-1/+1
| | | | | | | | | | | | | | | | Summary: Match the ordering semantics of non-vector comparisons. For floating point comparisons that do not correspond to instructions, the tests check that some vector comparison instruction was emitted but do not care about the full implementation. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D51765 llvm-svn: 342064
* [WebAssembly] v8x16.shuffleThomas Lively2018-09-071-0/+39
| | | | | | | | | | | | | | | | | | Summary: Since the shuffle mask is not exposed as an operand in the native ISel DAG, create a new WebAssembly ISD node exposing the mask. The mask is lowered as sixteen immediate byte indices no matter what type the original vector shuffle was operating on. This CL depends on D51656 Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D51659 llvm-svn: 341718
* [WebAssembly] clang-format (NFC)Heejin Ahn2018-09-051-129/+113
| | | | | | | | | | | | Summary: This patch runs clang-format on all wasm-only files. Reviewers: aardappel, dschuff, sunfish, tlively Subscribers: MatzeB, sbc100, jgravelle-google, llvm-commits Differential Revision: https://reviews.llvm.org/D51447 llvm-svn: 341439
* [WebAssembly] Arbitrary BUILD_VECTOR and remove i64x2.mulThomas Lively2018-08-221-0/+3
| | | | | | | | | | | | | | | | | | Summary: This CL adds support for arbitrary BUILD_VECTORS, i.e. not splats and not consts. This is the last feature needed to properly lower v2i64 multiplies without a i64x2.mul instruction (which is not in the spec), so i64x2.mul is removed as well. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D51082 Remove unnecessary condition and fix whitespace llvm-svn: 340472
* [WebAssembly] Gate i64x2 and f64x2 on -wasm-enable-unimplementedHeejin Ahn2018-08-091-2/+10
| | | | | | | | | | | | | | | | | | Summary: i64x2 and f64x2 operations are not implemented in V8, so we normally do not want to emit them. However, they are in the SIMD spec proposal, so we still want to be able to test them in the toolchain. This patch adds a flag to enable their emission. Reviewers: aheejin, dschuff Subscribers: sunfish, jgravelle-google, sbc100, llvm-commits Differential Revision: https://reviews.llvm.org/D50423 Patch by Thomas Lively (tlively) llvm-svn: 339407
* [WebAssembly] Update SIMD binary arithmeticDerek Schuff2018-08-071-0/+2
| | | | | | | | | | | | Add missing SIMD types (v2f64) and binary ops. Also adds tablegen support for automatically prepending prefix byte to SIMD opcodes. Differential Revision: https://reviews.llvm.org/D50292 Patch by Thomas Lively llvm-svn: 339186
* [WebAssembly] Enable atomic expansion for unsupported atomicrmwsHeejin Ahn2018-08-071-0/+17
| | | | | | | | | | | | | | | | Summary: Wasm does not have direct counterparts to some of LLVM IR's atomicrmw instructions (min, max, umin, umax, and nand). This enables atomic expansion using cmpxchg instruction within a loop for those atomicrmw instructions. Reviewers: dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D49440 llvm-svn: 339084
* [WebAssembly] Cleanup of the way globals and global flags are handledNicholas Wilson2018-08-031-1/+1
| | | | | | Differential Revision: https://reviews.llvm.org/D44030 llvm-svn: 338894
* [WebAssembly] Support for atomic.wait / atomic.wake instructionsHeejin Ahn2018-08-021-0/+40
| | | | | | | | | | | | | | Summary: This adds support for atomic.wait / atomic.wake instructions in the wasm thread proposal. Reviewers: dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D49395 llvm-svn: 338770
* [WebAssembly] Add getSetCCResultType placeholder override to handle vector ↵Simon Pilgrim2018-06-281-0/+9
| | | | | | | | compare results. Necessary to get the rL335821 bugfix (which was reverted at rL335871) un-reverted. llvm-svn: 335884
* [WebAssembly] Fix lowering of varargs functions with non-legal fixed arguments.Dan Gohman2018-06-261-2/+3
| | | | | | | | | | | CallLoweringInfo's NumFixedArgs field gives the number of fixed arguments before legalization. The ISD::OutputArg "Outs" array holds legalized arguments, so when indexing into it to find the non-fixed arguemn, we need to use the number of arguments after legalization. Fixes PR37934. llvm-svn: 335576
* [WebAssembly] Support instruction selection for catching exceptionsHeejin Ahn2018-05-311-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This lowers exception catching-related instructions: 1. Lowers `wasm.catch` intrinsic to `catch` instruction 2. Removes `catchpad` and `cleanuppad` instructions; they are not necessary after isel phase. (`MachineBasicBlock::isEHFuncletEntry()` or `MachineBasicBlock::isEHPad()` can be used instead.) 3. Lowers `catchret` and `cleanupret` instructions to pseudo `catchret` and `cleanupret` instructions in isel, which will be replaced with other instructions in `WebAssemblyExceptionPrepare` pass. 4. Adds 'WebAssemblyExceptionPrepare` pass, which is for running various transformation for EH. Currently this pass only replaces `catchret` and `cleanupret` instructions into appropriate wasm instructions to make this patch successfully run until the end. Currently this does not handle lowering of intrinsics related to LSDA info generation (`wasm.landingpad.index` and `wasm.lsda`), because they cannot be tested without implementing `EHStreamer`'s wasm-specific handlers. They are marked as TODO, which is needed to make isel pass. Also this does not generate `try` and `end_try` markers yet, which will be handled in later patches. This patch is based on the first wasm EH proposal. (https://github.com/WebAssembly/exception-handling/blob/master/proposals/Exceptions.md) Reviewers: dschuff, majnemer Subscribers: jfb, sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D44090 llvm-svn: 333705
* Remove \brief commands from doxygen comments.Adrian Prantl2018-05-011-1/+1
| | | | | | | | | | | | | | | | We've been running doxygen with the autobrief option for a couple of years now. This makes the \brief markers into our comments redundant. Since they are a visual distraction and we don't want to encourage more \brief markers in new code either, this patch removes them all. Patch produced by for i in $(git grep -l '\\brief'); do perl -pi -e 's/\\brief //g' $i & done Differential Revision: https://reviews.llvm.org/D46290 llvm-svn: 331272
* [WebAssembly] Make sign-extension opcodes a distinct feature.Dan Gohman2018-01-191-2/+1
| | | | | | | | | | Sign-extension opcodes have been split into a separate proposal from the main threads proposal, so switch them to their own target feature. See: https://github.com/WebAssembly/sign-extension-ops llvm-svn: 322966
* Fix WebAssembly backend for some LLVM API changesDavid Blaikie2017-12-151-3/+3
| | | | llvm-svn: 320893
* [WebAssembly] Fix fptoui lowering boundsDan Gohman2017-11-291-14/+40
| | | | | | | To fully avoid trapping on wasm, fptoui needs a second check to ensure that the operand isn't below the supported range. llvm-svn: 319354
* [WebAssembly] Fix trapping behavior in fptosi/fptoui.Dan Gohman2017-11-281-0/+129
| | | | | | | | | | | | This adds code to protect WebAssembly's `trunc_s` family of opcodes from values outside their domain. Even though such conversions have full undefined behavior in C/C++, LLVM IR's `fptosi` and `fptoui` do not, and only return undef. This also implements the proposed non-trapping float-to-int conversion feature and uses that instead when available. llvm-svn: 319128
* [WebAssembly] Add sign extend instructions from atomics proposalDerek Schuff2017-09-131-2/+6
| | | | | | | | | | Select them from ISD::SIGN_EXTEND_INREG Differential Revision: https://reviews.llvm.org/D37603 remove spurious change llvm-svn: 313101
* [WebAssembly] Add target feature for atomicsDerek Schuff2017-08-301-0/+2
| | | | | | | | | | Summary: This tracks the WebAssembly threads feature proposal at https://github.com/WebAssembly/threads/blob/master/proposals/threads/Overview.md Differential Revision: https://reviews.llvm.org/D37300 llvm-svn: 312145
* Change CallLoweringInfo::CS to be an ImmutableCallSite instead of a pointer. ↵Peter Collingbourne2017-07-261-1/+1
| | | | | | | | NFCI. This was a use-after-free waiting to happen. llvm-svn: 309159
* [SystemZ, LoopStrengthReduce]Jonas Paulsson2017-07-211-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes LSR generate better code for SystemZ in the cases of memory intrinsics, Load->Store pairs or comparison of immediate with memory. In order to achieve this, the following common code changes were made: * New TTI hook: LSRWithInstrQueries(), which defaults to false. Controls if LSR should do instruction-based addressing evaluations by calling isLegalAddressingMode() with the Instruction pointers. * In LoopStrengthReduce: handle address operands of memset, memmove and memcpy as address uses, and call isFoldableMemAccessOffset() for any LSRUse::Address, not just loads or stores. SystemZ changes: * isLSRCostLess() implemented with Insns first, and without ImmCost. * New function supportedAddressingMode() that is a helper for TTI methods looking at Instructions passed via pointers. Review: Ulrich Weigand, Quentin Colombet https://reviews.llvm.org/D35262 https://reviews.llvm.org/D35049 llvm-svn: 308729
* [SelectionDAG] Set ISD::FPOWI to Expand by defaultCraig Topper2017-05-301-2/+2
| | | | | | | | | | | | | | | | | Summary: Currently FPOWI defaults to Legal and LegalizeDAG.cpp turns Legal into Expand for this opcode because Legal is a "lie". This patch changes the default for this opcode to Expand and removes the hack from LegalizeDAG.cpp. It also removes all the code in the targets that set this opcode to Expand themselves since they can just rely on the default. Reviewers: spatel, RKSimon, efriedma Reviewed By: RKSimon Subscribers: jfb, dschuff, sbc100, jgravelle-google, nemanjai, javed.absar, andrew.w.kaylor, llvm-commits Differential Revision: https://reviews.llvm.org/D33530 llvm-svn: 304215
* Rename AttributeSet to AttributeListReid Kleckner2017-03-211-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | Summary: This class is a list of AttributeSetNodes corresponding the function prototype of a call or function declaration. This class used to be called ParamAttrListPtr, then AttrListPtr, then AttributeSet. It is typically accessed by parameter and return value index, so "AttributeList" seems like a more intuitive name. Rename AttributeSetImpl to AttributeListImpl to follow suit. It's useful to rename this class so that we can rename AttributeSetNode to AttributeSet later. AttributeSet is the set of attributes that apply to a single function, argument, or return value. Reviewers: sanjoy, javed.absar, chandlerc, pete Reviewed By: pete Subscribers: pete, jholewinski, arsenm, dschuff, mehdi_amini, jfb, nhaehnle, sbc100, void, llvm-commits Differential Revision: https://reviews.llvm.org/D31102 llvm-svn: 298393
* [WebAssembly] Configure codegen to legalize f16 values.Dan Gohman2017-02-221-0/+5
| | | | llvm-svn: 295850
* [WebAssembly] Add an option to make get_local/set_local explicit.Dan Gohman2016-10-241-2/+2
| | | | | | | | | | This patch adds a pass, controlled by an option and off by default for now, for making implicit get_local/set_local explicit. This simplifies emitting wasm with MC. Differential Revision: https://reviews.llvm.org/D25836 llvm-svn: 285009
* [WebAssemby] Implement block signatures.Dan Gohman2016-10-061-3/+10
| | | | | | | | | Per spec changes, this implements block signatures, and adds just enough logic to produce correct block signatures at the ends of functions. Differential Revision: https://reviews.llvm.org/D25144 llvm-svn: 283503
* [WebAssembly] Initial SIMD128 support.Derek Schuff2016-08-021-0/+10
| | | | | | | | | | | | | | Kicks off the implementation of wasm SIMD128 support (spec: https://github.com/stoklund/portable-simd/blob/master/portable-simd.md), adding support for add, sub, mul for i8x16, i16x8, i32x4, and f32x4. The spec is WIP, and might change in the near future. Patch by João Porto Differential Revision: https://reviews.llvm.org/D22686 llvm-svn: 277543
* MachineFunction: Return reference for getFrameInfo(); NFCMatthias Braun2016-07-281-8/+8
| | | | | | | getFrameInfo() never returns nullptr so we should use a reference instead of a pointer. llvm-svn: 277017
* Fix calls to SelectionDAG::getStoreDerek Schuff2016-07-151-2/+2
| | | | | | It was refactored in r275592. NFC llvm-svn: 275601
* Pass DebugLoc and SDLoc by const ref.Benjamin Kramer2016-06-121-4/+4
| | | | | | | | This used to be free, copying and moving DebugLocs became expensive after the metadata rewrite. Passing by reference eliminates a ton of track/untrack operations. No functionality change intended. llvm-svn: 272512
* [WebAssembly] Don't expand divisions by constants.Dan Gohman2016-05-181-0/+6
| | | | | | | Don't expand divisions by constants if it would require multiple instructions. The current assumption is that engines will perform the desired optimizations. llvm-svn: 269930
* [WebAssembly] Fix legalization of i128 shifts.Dan Gohman2016-05-141-9/+4
| | | | | | | | compiler-rt/libgcc shift routines expect the shift count to be an i32, so use i32 as the shift count for shifts that are legalized to libcalls. This also reverts r268991, now that the signatures are correct. llvm-svn: 269531
* [WebAssembly] Disable 128-bit shift libcallsDerek Schuff2016-05-101-0/+7
| | | | | | | | Currently the signature of the functions i128(i128, i32) aka void(i32, i64, i64, i32) doesn't match the signature of the call emitted by the default lowering, void(i32, i64, i64). llvm-svn: 268991
* [CodeGen] Default CTTZ_ZERO_UNDEF/CTLZ_ZERO_UNDEF to Expand in ↵Craig Topper2016-04-281-1/+1
| | | | | | TargetLoweringBase. This is what the majority of the targets want and removes a bunch of code. Set it to Legal explicitly in the few cases where that's the desired behavior. llvm-svn: 267853
* [WebAssembly] Set ctlz_zero_undef/cttz_zero_undef to Expand so LegalizeDAG ↵Craig Topper2016-04-231-1/+1
| | | | | | will convert them to ctlz/cttz. Remove the now unneccessary isel patterns. NFC llvm-svn: 267264
* [NFC] Header cleanupMehdi Amini2016-04-181-1/+0
| | | | | | | | | | | | | | Removed some unused headers, replaced some headers with forward class declarations. Found using simple scripts like this one: clear && ack --cpp -l '#include "llvm/ADT/IndexedMap.h"' | xargs grep -L 'IndexedMap[<]' | xargs grep -n --color=auto 'IndexedMap' Patch by Eugene Kosov <claprix@yandex.ru> Differential Revision: http://reviews.llvm.org/D19219 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 266595
* [WebAssembly] Implement the rotate instructions.Dan Gohman2016-03-221-1/+1
| | | | llvm-svn: 264076
* [WebAssembly] Update for spec change from tableswitch to br_table.Dan Gohman2016-03-081-5/+5
| | | | | | | Also note that the operand order changed; the default label is now listed after the regular labels. llvm-svn: 262903
* [WebAssembly] Handle CopyToReg nodes with flag results in LowerCopyToReg.Dan Gohman2016-02-201-3/+7
| | | | llvm-svn: 261457
* [WebAssembly] Call memcpy for large byval copies.Dan Gohman2016-02-171-1/+1
| | | | | | | | | | This fixes very slow compilation on test/CodeGen/Generic/2010-11-04-BigByval.ll . Note that MaxStoresPerMemcpy and friends are not yet carefully tuned so the cutoff point is currently somewhat arbitrary. However, it's important that there be a cutoff point so that we don't emit unbounded quantities of loads and stores. llvm-svn: 261050
* [WebAssembly] Use SDValue::getConstantOperandVal. NFC.Dan Gohman2016-02-171-1/+1
| | | | llvm-svn: 261037
* [WebAssembly] Implement __builtin_frame_address.Dan Gohman2016-02-161-3/+17
| | | | | | Differential Revision: http://reviews.llvm.org/D17307 llvm-svn: 261032
* [WebAssembly] Insert COPY_LOCAL between CopyToReg and FrameIndex DAG nodesDerek Schuff2016-02-161-0/+26
| | | | | | | | | | | | | | CopyToReg nodes don't support FrameIndex operands. Other targets select the FI to some LEA-like instruction, but since we don't have that, we need to insert some kind of instruction that can take an FI operand and produces a value usable by CopyToReg (i.e. in a vreg). So insert a dummy copy_local between Op and its FI operand. This results in a redundant copy which we should optimize away later (maybe in the post-FI-lowering peephole pass). Differential Revision: http://reviews.llvm.org/D17213 llvm-svn: 260987
* [WebAssembly] Report more meaningful error messages for some unsupportedDerek Schuff2016-02-121-0/+13
| | | | | | | | | ops. Computed gotos and RETURNADDR may never be supported; we can do FRAMEADDR in the future. llvm-svn: 260759
* [WebAssembly] Fix byval for empty types.Dan Gohman2016-02-121-2/+1
| | | | llvm-svn: 260740
* [WebAssembly] Reformat WebAssemblyFrameLowering and WebAssemblyISelLoweringDerek Schuff2016-02-111-50/+42
| | | | | | | | | | Reviewers: sunfish, jfb Subscribers: jfb, dschuff Differential Revision: http://reviews.llvm.org/D17156 llvm-svn: 260585
* [WebAssembly] Address comments left over from r260421Derek Schuff2016-02-101-7/+9
| | | | llvm-svn: 260429
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