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* [WebAssembly] Replace SIMD int min/max builtins with patternsThomas Lively2019-12-161-0/+7
| | | | | | | | | | | | | | | | | | Summary: The instructions were originally implemented via builtins and intrinsics so users would have to explicitly opt-in to using them. This was useful while were validating whether these instructions should have been merged into the spec proposal. Now that they have been, we can use normal codegen patterns, so the intrinsics and builtins are no longer useful. Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D71500
* [IR] Split out target specific intrinsic enums into separate headersReid Kleckner2019-12-111-0/+1
| | | | | | | | | | | | | | | | | | | | This has two main effects: - Optimizes debug info size by saving 221.86 MB of obj file size in a Windows optimized+debug build of 'all'. This is 3.03% of 7,332.7MB of object file size. - Incremental step towards decoupling target intrinsics. The enums are still compact, so adding and removing a single target-specific intrinsic will trigger a rebuild of all of LLVM. Assigning distinct target id spaces is potential future work. Part of PR34259 Reviewers: efriedma, echristo, MaskRay Reviewed By: echristo, MaskRay Differential Revision: https://reviews.llvm.org/D71320
* Reland "[WebAssembly] Expand setcc of v2i64"Thomas Lively2019-11-011-0/+30
| | | | | | | | This reverts commit e5cae5692b5899631b5bfe5c23234deb5efda10c, which reverted 11850a6305c5778b180243eb06aefe86762dd4ce. The original revert was done because of breakage that was actually in a separate commit, 2ab1b8c1ec452fb743f6cc5051e75a01039cabfe, which was also reverted and has since been fixed and relanded.
* Reland "[WebAssembly] Handle multiple loads of splatted loads"Thomas Lively2019-10-311-1/+8
| | | | | This reverts commit 92a25fbf11da51c8e3573b81a877d3b226990c07 and fixes the ambiguous method call that was causing build failures.
* Revert "[WebAssembly] Handle multiple loads of splatted loads"Vlad Tsyrklevich2019-10-311-8/+1
| | | | | | | This reverts commit 2ab1b8c1ec452fb743f6cc5051e75a01039cabfe, it is causing build failures on numerous bots, including sanitizer-x86_64-linux-bootstrap-ubsan. My previous revert was for the wrong commit.
* Revert "[WebAssembly] Expand setcc of v2i64"Vlad Tsyrklevich2019-10-311-30/+0
| | | | | | This reverts commit 11850a6305c5778b180243eb06aefe86762dd4ce, it was causing build failures on numerous bots, including sanitizer-x86_64-linux-bootstrap-ubsan.
* [WebAssembly] Handle multiple loads of splatted loadsThomas Lively2019-10-311-1/+8
| | | | | | | | | | | | | | | | | Summary: Fixes an ISel failure when a splatted load is used more than once. The failure was due to the hacks we were doing in ISel lowering to preserve the original load as the operand of a LOAD_SPLAT node. The fix is to properly lower the splatted use of the load to a separate LOAD_SPLAT node. Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69640
* [WebAssembly] Expand setcc of v2i64Thomas Lively2019-10-311-0/+30
| | | | | | | | | | | | | | | | | | | Summary: The SIMD spec does not include i64x2 comparisons, so they need to be expanded. Using setOperationAction to expand them also causes f64x2 comparisons to be expanded, so setCondCodeAction needs to be used instead. But since there are no legal condition codes, the legalizer does not know how to expand the comparisons. We therefore manually unroll the operation, taking care to fill each lane with -1 or 0 rather than 1 or 0 for consistency with the other vector comparisons. Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69604
* Fix -Wparentheses warning. NFCI.Simon Pilgrim2019-10-101-2/+2
| | | | llvm-svn: 374326
* [WebAssembly] Make returns variadicThomas Lively2019-10-091-3/+4
| | | | | | | | | | | | | | | | | | Summary: This is necessary and sufficient to get simple cases of multiple return working with multivalue enabled. More complex cases will require block and loop signatures to be generalized to potentially be type indices as well. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D68684 llvm-svn: 374235
* [WebAssembly] v8x16.swizzle and rewrite BUILD_VECTOR loweringThomas Lively2019-10-091-74/+122
| | | | | | | | | | | | | | | | | | | | | | | | | Summary: Adds the new v8x16.swizzle SIMD instruction as specified at https://github.com/WebAssembly/simd/blob/master/proposals/simd/SIMD.md#swizzling-using-variable-indices. In addition to adding swizzles as a candidate lowering in LowerBUILD_VECTOR, also rewrites and simplifies the lowering to minimize the number of replace_lanes necessary rather than trying to minimize code size. This leads to more uses of v128.const instead of splats, which is expected to increase performance. The new code will be easier to tune once V8 implements all the vector construction operations, and it will also be easier to add new candidate instructions in the future if necessary. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D68527 llvm-svn: 374188
* [WebAssembly] SIMD Load and extend operationsThomas Lively2019-09-271-1/+19
| | | | | | | | | | | | | | | | | | Summary: As specified at https://github.com/webassembly/simd/blob/master/proposals/simd/SIMD.md#load-and-extend. These instructions are behind the unimplemented-simd128 target feature for now because they have not been implemented in V8 yet. Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D68058 llvm-svn: 373040
* [WebAssembly] vNxM.load_splat instructionsThomas Lively2019-09-231-1/+10
| | | | | | | | | | | | | | | | | | | | | | Summary: Adds the new load_splat instructions as specified at https://github.com/WebAssembly/simd/blob/master/proposals/simd/SIMD.md#load-and-splat. DAGISel does not allow matching multiple copies of the same load in a single pattern, so we use a new node in WebAssemblyISD to wrap loads that should be splatted. Depends on D67783. Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D67784 llvm-svn: 372655
* [WebAssembly] Restore defaults for stores per memopThomas Lively2019-09-181-10/+0
| | | | | | | | | | | | | | | | | | | | Summary: Large slowdowns were observed in Rust due to many small, constant sized copies in conjunction with poorly-optimized memory.copy implementations. Since memory.copy cannot be expected to be inlined efficiently by engines at this time, stop using it for the smallest copies. We continue to lower all memcpy intrinsics to memory.copy, though. Reviewers: aheejin, alexcrichton Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, JDevlieghere, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D67639 llvm-svn: 372275
* [SVE][MVT] Fixed-length vector MVT rangesGraham Hunter2019-09-171-2/+2
| | | | | | | | | | | | | | | | | * Reordered MVT simple types to group scalable vector types together. * New range functions in MachineValueType.h to only iterate over the fixed-length int/fp vector types. * Stopped backends which don't support scalable vector types from iterating over scalable types. Reviewers: sdesmalen, greened Reviewed By: greened Differential Revision: https://reviews.llvm.org/D66339 llvm-svn: 372099
* [TargetLowering] Remove optional arguments passing to makeLibCallShiva Chen2019-08-221-1/+2
| | | | | | | | | | The patch introduces MakeLibCallOptions struct as suggested by @efriedma on D65497. The struct contain argument flags which will pass to makeLibCall function. The patch should not has any functionality changes. Differential Revision: https://reviews.llvm.org/D65795 llvm-svn: 369622
* [WebAssembly] Stop unrolling SIMD shifts since they are fixed in V8Thomas Lively2019-08-141-5/+0
| | | | | | | | | | | | | | | | | Summary: Fixes PR42973. Tests don't change because simd-arith.ll tests behavior on unimplemented-simd128, which does not include any temporary workarounds such as the one removed in this revision. Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, dmgreen, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D66166 llvm-svn: 368868
* [webassembly] Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVMDaniel Sanders2019-08-121-6/+6
| | | | | | | | | | | | | | | | | Summary: This clang-tidy check is looking for unsigned integer variables whose initializer starts with an implicit cast from llvm::Register and changes the type of the variable to llvm::Register (dropping the llvm:: where possible). Reviewers: aheejin Subscribers: jholewinski, MatzeB, qcolombet, dschuff, jyknight, dylanmckay, sdardis, nemanjai, jvesely, wdng, nhaehnle, sbc100, jgravelle-google, kristof.beyls, hiraditya, aheejin, kbarton, fedor.sergeev, javed.absar, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, tpr, PkmX, jocewei, jsji, Petar.Avramovic, asbirlea, Jim, s.egerton, llvm-commits Tags: #llvm Differential Revision for whole review: https://reviews.llvm.org/D65962 llvm-svn: 368627
* [WebAssembly] Fix conflict between ret legalization and sjljKeno Fischer2019-08-051-1/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: When the WebAssembly backend encounters a return type that doesn't fit within i32, SelectionDAG performs sret demotion, adding an additional argument to the start of the function that contains a pointer to an sret buffer to use instead. However, this conflicts with the emscripten sjlj lowering pass. There we translate calls like: ``` call {i32, i32} @foo() ``` into (in pseudo-llvm) ``` %addr = @foo call {i32, i32} @__invoke_{i32,i32}(%addr) ``` i.e. we perform an indirect call through an extra function. However, the sret transform now transforms this into the equivalent of ``` %addr = @foo %sret = alloca {i32, i32} call {i32, i32} @__invoke_{i32,i32}(%sret, %addr) ``` (while simultaneously translation the implementation of @foo as well). Unfortunately, this doesn't work out. The __invoke_ ABI expected the function address to be the first argument, causing crashes. There is several possible ways to fix this: 1. Implementing the sret rewrite at the IR level as well and performing it as part of lowering to __invoke 2. Fixing the wasm backend to recognize that __invoke has a special ABI 3. A change to the binaryen/emscripten ABI to recognize this situation This revision implements the middle option, teaching the backend to treat __invoke_ functions specially in sret lowering. This is achieved by 1) Introducing a new CallingConv ID for invoke functions 2) When this CallingConv ID is seen in the backend and the first argument is marked as sret (a function pointer would never be marked as sret), swapping the first two arguments. Reviewed By: tlively, aheejin Differential Revision: https://reviews.llvm.org/D65463 llvm-svn: 367935
* [LLVM][Alignment] Introduce Alignment TypeGuillaume Chatelet2019-08-051-3/+3
| | | | | | | | | | | | | | | | | | | Summary: This is patch is part of a serie to introduce an Alignment type. See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this patch for the introduction of the type: https://reviews.llvm.org/D64790 Reviewers: courbet, jfb, jakehehrlich Reviewed By: jfb Subscribers: wuzish, jholewinski, arsenm, dschuff, nemanjai, jvesely, nhaehnle, javed.absar, sbc100, jgravelle-google, hiraditya, aheejin, kbarton, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, dexonsmith, PkmX, jocewei, jsji, s.egerton, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D65514 llvm-svn: 367828
* [WebAssembly] Do not emit tail calls with return type mismatchThomas Lively2019-07-301-7/+30
| | | | | | | | | | | | | | | | | Summary: return_call and return_call_indirect are only valid if the return types of the callee and caller match. We were previously not enforcing that, which was producing invalid modules. Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D65246 llvm-svn: 367339
* [WebAssembly] Implement tail calls and unify tablegen call classesThomas Lively2019-06-261-7/+15
| | | | | | | | | | | | | | | | | Summary: Implements direct and indirect tail calls enabled by the 'tail-call' feature in both DAG ISel and FastISel. Updates existing call tests and adds new tests including a binary encoding test. Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D62877 llvm-svn: 364445
* [TargetLowering] Add MachineMemOperand::Flags to allowsMemoryAccess tests ↵Simon Pilgrim2019-06-121-1/+2
| | | | | | | | | | | | | | (PR42123) As discussed on D62910, we need to check whether particular types of memory access are allowed, not just their alignment/address-space. This NFC patch adds a MachineMemOperand::Flags argument to allowsMemoryAccess and allowsMisalignedMemoryAccesses, and wires up calls to pass the relevant flags to them. If people are happy with this approach I can then update X86TargetLowering::allowsMisalignedMemoryAccesses to handle misaligned NT load/stores. Differential Revision: https://reviews.llvm.org/D63075 llvm-svn: 363179
* [WebAssembly] Fix ISel crash on sext_inreg/extract type mismatchThomas Lively2019-06-041-2/+26
| | | | | | | | | | | | | | | | | | Summary: Adjusts the index and adds a bitcast around the vector operand of EXTRACT_VECTOR_ELT so that its lane type matches the source type of its parent sext_inreg. Without this bitcast the ISel patterns do not match and ISel fails. Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D62646 llvm-svn: 362547
* [WebAssembly] Expand more SIMD float opsThomas Lively2019-05-241-1/+2
| | | | | | | | | | | | | | Summary: These were previously causing ISel failures. Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D62354 llvm-svn: 361577
* [WebAssembly] Implement ReplaceNodeResults to fix a SIMD crashThomas Lively2019-05-231-0/+15
| | | | | | | | | | | | Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D61037 llvm-svn: 361526
* [WebAssembly] Implement __builtin_return_address for emscriptenThomas Lively2019-05-231-3/+27
| | | | | | | | | | | | | | | | | | | | | Summary: In this patch, `ISD::RETURNADDR` is lowered on the emscripten target to the new Emscripten runtime function `emscripten_return_address`, which implements the functionality. Patch by Guanzhong Chen Reviewers: tlively, aheejin Reviewed By: tlively Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D62210 llvm-svn: 361454
* [SelectionDAG] remove constant folding limitations based on FP exceptionsSanjay Patel2019-05-021-3/+0
| | | | | | | | | | | | | | | | | We don't have FP exception limits in the IR constant folder for the binops (apart from strict ops), so it does not make sense to have them here in the DAG either. Nothing else in the backend tries to preserve exceptions (again outside of strict ops), so I don't see how this could have ever worked for real code that cares about FP exceptions. There are still cases (examples: unary opcodes in SDAG, FMA in IR) where we are trying (at least partially) to preserve exceptions without even asking if the target supports FP exceptions. Those should be corrected in subsequent patches. Real support for FP exceptions requires several changes to handle the constrained/strict FP ops. Differential Revision: https://reviews.llvm.org/D61331 llvm-svn: 359791
* [WebAssembly] Support f16 libcallsDan Gohman2019-04-301-0/+5
| | | | | | | | | | | | Add support for f16 libcalls in WebAssembly. This entails adding signatures for the remaining F16 libcalls, and renaming gnu_f2h_ieee/gnu_h2f_ieee to truncsfhf2/extendhfsf2 for consistency between f32 and f64/f128 (compiler-rt already supports this). Differential Revision: https://reviews.llvm.org/D61287 Reviewer: dschuff llvm-svn: 359600
* [WebAssembly] Emit br_table for most switch instructionsHeejin Ahn2019-04-231-0/+5
| | | | | | | | | | | | | | | | | | Summary: Always convert switches to br_tables unless there is only one case, which is equivalent to a simple branch. This reduces code size for wasm, and we defer possible jump table optimizations to the VM. Addresses PR41502. Reviewers: kripken, sunfish Subscribers: dschuff, sbc100, jgravelle-google, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D60966 llvm-svn: 359038
* [WebAssembly] Add new explicit relocation types for PIC relocationsSam Clegg2019-04-041-3/+8
| | | | | | | | See https://github.com/WebAssembly/tool-conventions/pull/106 Differential Revision: https://reviews.llvm.org/D59907 llvm-svn: 357710
* [WebAssembly] Remove unneeded target operand flagsSam Clegg2019-04-031-16/+7
| | | | | | | | | | | This change is in preparation for the addition of new target operand flags for new relocation types. Have a symbol type as part of the flag set makes it harder to use and AFAICT these are serving no purpose. Differential Revision: https://reviews.llvm.org/D60014 llvm-svn: 357548
* [WebAssembly] Initial implementation of PIC code generationSam Clegg2019-03-261-3/+41
| | | | | | | | | | | | | | | | | | | | | | | | This change implements lowering of references global symbols in PIC mode. This change implements lowering of global references in PIC mode using a new @GOT reference type. @GOT references can be used with function or data symbol names combined with the get_global instruction. In this case the linker will insert the wasm global that stores the address of the symbol (either in memory for data symbols or in the wasm table for function symbols). For now I'm continuing to use the R_WASM_GLOBAL_INDEX_LEB relocation type for this type of reference which means that this relocation type can refer to either a global or a function or data symbol. We could choose to introduce specific relocation types for GOT entries in the future. See the current dynamic linking proposal: https://github.com/WebAssembly/tool-conventions/blob/master/DynamicLinking.md Differential Revision: https://reviews.llvm.org/D54647 llvm-svn: 357022
* [WebAssembly] Don't override default implementation of isOffsetFoldingLegal. ↵Sam Clegg2019-03-181-6/+0
| | | | | | | | | | | | | | | NFC. The default implementation does we want and is going to more compatible with dynamic linking (-fPIC) support that is planned. This is NFC because currently we only build wasm with `-relocation-model=static` which in turn means that the default `isOffsetFoldingLegal` always returns true today. Differential Revision: https://reviews.llvm.org/D54661 llvm-svn: 356410
* [WebAssembly] Remove unused load/store patterns that use texternalsymSam Clegg2019-03-151-5/+5
| | | | | | Differential Revision: https://reviews.llvm.org/D59395 llvm-svn: 356221
* [WebAssembly] Simplify iterator navigations (NFC)Heejin Ahn2019-03-051-2/+1
| | | | | | | | | | | | | | | | | | | | Summary: - Replaces some uses of `MachineFunction::iterator(MBB)` with `MBB->getIterator()` and `MachineBasicBlock::iterator(MI)` with `MI->getIterator()`, which are simpler. - Replaces some uses of `std::prev` of `std::next` that takes a MachineFunction or MachineBasicBlock iterator with `getPrevNode` and `getNextNode`, which are also simpler. Reviewers: sbc100 Subscribers: dschuff, sunfish, jgravelle-google, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D58913 llvm-svn: 355444
* [WebAssembly] Expand operations not supported by SIMDThomas Lively2019-03-021-0/+17
| | | | | | | | | | | | | | | | | | Summary: This prevents crashes in instruction selection when these operations are used. The tests check that the scalar version of the instruction is used where applicable, although some expansions do not use the scalar version. Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D58859 llvm-svn: 355261
* Revert "[WebAssembly][WIP] Expand operations not supported by SIMD"Thomas Lively2019-03-021-17/+0
| | | | | | This was accidentally committed without tests or review. llvm-svn: 355254
* [WebAssembly][WIP] Expand operations not supported by SIMDThomas Lively2019-03-021-0/+17
| | | | llvm-svn: 355247
* Revert "[WebAssembly] Lower SIMD shifts since they are fixed in V8"Thomas Lively2019-03-011-0/+5
| | | | | | They weren't fixed in V8. Oops. llvm-svn: 355208
* [WebAssembly] Lower SIMD shifts since they are fixed in V8Thomas Lively2019-03-011-5/+0
| | | | | | | | | | | | Reviewers: sbc100 Subscribers: dschuff, jgravelle-google, hiraditya, aheejin, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D58800 llvm-svn: 355163
* [WebAssembly] Properly align fp128 arguments in outgoing varargs argumentsDan Gohman2019-02-261-3/+6
| | | | | | | | | | | | | | For outgoing varargs arguments, it's necessary to check the OrigAlign field of the corresponding OutputArg entry to determine argument alignment, rather than just computing an alignment from the argument value type. This is because types like fp128 are split into multiple argument values, with narrower types that don't reflect the ABI alignment of the full fp128. This fixes the printf("printfL: %4.*Lf\n", 2, lval); testcase. Differential Revision: https://reviews.llvm.org/D58656 llvm-svn: 354846
* [WebAssembly] memory.fillThomas Lively2019-02-131-1/+3
| | | | | | | | | | | | | | | | Summary: memset lowering, fix argument types in memcpy lowering, and test encodings. Depends on D57736. Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57791 llvm-svn: 353986
* [WebAssembly] Lower memmove to memory.copyThomas Lively2019-02-051-0/+2
| | | | | | | | | | | | | | Summary: The lowering is identical to the memcpy lowering. Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57727 llvm-svn: 353216
* [WebAssembly] memory.copyThomas Lively2019-02-051-0/+6
| | | | | | | | | | | | Summary: Depends on D57495. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, hiraditya, sunfish Differential Revision: https://reviews.llvm.org/D57498 llvm-svn: 353127
* [WebAssembly] clang-tidy (NFC)Heejin Ahn2019-02-041-22/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This patch fixes clang-tidy warnings on wasm-only files. The list of checks used is: `-*,clang-diagnostic-*,llvm-*,misc-*,-misc-unused-parameters,readability-identifier-naming,modernize-*` (LLVM's default .clang-tidy list is the same except it does not have `modernize-*`. But I've seen in multiple CLs in LLVM the modernize style was recommended and code was fixed based on the style, so I added it as well.) The common fixes are: - Variable names start with an uppercase letter - Function names start with a lowercase letter - Use `auto` when you use casts so the type is evident - Use inline initialization for class member variables - Use `= default` for empty constructors / destructors - Use `using` in place of `typedef` Reviewers: sbc100, tlively, aardappel Subscribers: dschuff, sunfish, jgravelle-google, yurydelendik, kripken, MatzeB, mgorny, rupprecht, llvm-commits Differential Revision: https://reviews.llvm.org/D57500 llvm-svn: 353075
* [WebAssembly] Exception handling: Switch to the new proposalHeejin Ahn2019-01-301-41/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This switches the EH implementation to the new proposal: https://github.com/WebAssembly/exception-handling/blob/master/proposals/Exceptions.md (The previous proposal was https://github.com/WebAssembly/exception-handling/blob/master/proposals/old/Exceptions.md) - Instruction changes - Now we have one single `catch` instruction that returns a except_ref value - `throw` now can take variable number of operations - `rethrow` does not have 'depth' argument anymore - `br_on_exn` queries an except_ref to see if it matches the tag and branches to the given label if true. - `extract_exception` is a pseudo instruction that simulates popping values from wasm stack. This is to make `br_on_exn`, a very special instruction, work: `br_on_exn` puts values onto the stack only if it is taken, and the # of values can vay depending on the tag. - Now there's only one `catch` per `try`, this patch removes all special handling for terminate pad with a call to `__clang_call_terminate`. Before it was the only case there are two catch clauses (a normal `catch` and `catch_all` per `try`). - Make `rethrow` act as a terminator like `throw`. This splits BB after `rethrow` in WasmEHPrepare, and deletes an unnecessary `unreachable` after `rethrow` in LateEHPrepare. - Now we stop at all catchpads (because we add wasm `catch` instruction that catches all exceptions), this creates new `findWasmUnwindDestinations` function in SelectionDAGBuilder. - Now we use `br_on_exn` instrution to figure out if an except_ref matches the current tag or not, LateEHPrepare generates this sequence for catch pads: ``` catch block i32 br_on_exn $__cpp_exception end_block extract_exception ``` - Branch analysis for `br_on_exn` in WebAssemblyInstrInfo - Other various misc. changes to switch to the new proposal. Reviewers: dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D57134 llvm-svn: 352598
* [WebAssembly] Optimize BUILD_VECTOR lowering for sizeThomas Lively2019-01-301-0/+110
| | | | | | | | | | | | | | | | | | Summary: Implements custom lowering logic that finds the optimal value for the initial splat of the vector and either uses it or uses v128.const if it is available and if it would produce smaller code. This logic replaces large TableGen ISEL patterns that would lower all non-splat BUILD_VECTORs into a splat followed by a fixed number of replace_lane instructions. This CL fixes PR39685. Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D56633 llvm-svn: 352592
* [WebAssembly] Expand BUILD_PAIR nodesThomas Lively2019-01-281-0/+3
| | | | | | | | | | Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish Differential Revision: https://reviews.llvm.org/D57276 llvm-svn: 352442
* [WebAssembly][NFC] Group SIMD-related ISel configurationThomas Lively2019-01-261-59/+45
| | | | | | | | | | Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish Differential Revision: https://reviews.llvm.org/D57263 llvm-svn: 352262
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