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path: root/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
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* Remove the use and initialization of the target machine and subtargetEric Christopher2014-07-011-10/+8
| | | | | | from SystemZFrameLowering. llvm-svn: 212123
* Remove target machine caching from SystemZInstrInfo andEric Christopher2014-06-271-1/+1
| | | | | | | | SystemZRegisterInfo and replace it with the subtarget as that's all they needed in the first place. Update all uses and calls accordingly. llvm-svn: 211877
* Have SystemZSelectionDAGInfo constructor take a DataLayout ratherEric Christopher2014-06-271-1/+1
| | | | | | | than a target machine since it doesn't need anything past the DataLayout. llvm-svn: 211870
* [SystemZ] Do not install IfConverter pass at -O0Ulrich Weigand2014-06-051-1/+2
| | | | | | | | When not optimizing, do not run the IfConverter pass, this makes debugging more difficult (and causes a testsuite failure in DebugInfo/unconditional-branch.ll). llvm-svn: 210263
* [SystemZ] Remove "virtual" from override methodsRichard Sandiford2014-03-061-4/+4
| | | | | | | Also fix a couple of cases where "override" was missing. No behavioural change intended. llvm-svn: 203110
* Switch all uses of LLVM_OVERRIDE to just use 'override' directly.Craig Topper2014-03-021-4/+4
| | | | llvm-svn: 202621
* Make the llvm mangler depend only on DataLayout.Rafael Espindola2014-01-031-1/+1
| | | | | | | | | | | | | | Before this patch any program that wanted to know the final symbol name of a GlobalValue had to link with Target. This patch implements a compromise solution where the mangler uses DataLayout. This way, any tool that already links with Target (llc, clang) gets the exact behavior as before and new IR files can be mangled without linking with Target. With this patch the mangler is constructed with just a DataLayout and DataLayout is extended to include the information the Mangler needs. llvm-svn: 198438
* On DataLayout, omit the default of p:64:64:64.Rafael Espindola2013-12-161-1/+1
| | | | llvm-svn: 197397
* Simplify the SystemZ datalayout string.Rafael Espindola2013-12-121-2/+1
| | | | | | Reviewed by Richard Sandiford. llvm-svn: 197170
* Use "a" instead of "a0" in DataLayout.Rafael Espindola2013-12-121-1/+1
| | | | | | It means exactly the same and is just a bit shorter. llvm-svn: 197169
* [SystemZ] Add instruction-shortening passRichard Sandiford2013-09-251-0/+2
| | | | | | | | | | | | | | | | | | | | | When loading immediates into a GR32, the port prefered LHI, followed by LLILH or LLILL, followed by IILF. LHI and IILF are natural 32-bit operations, but LLILH and LLILL also clear the upper 32 bits of the register. This was represented as taking a 32-bit subreg of a 64-bit assignment. Using subregs for something as simple as a move immediate was probably a bad idea. Also, I have patches to add support for the high-word facility, and we don't want something like LLILH and LLILL to stop the high word of the same GPR from being used. This patch therefore uses LHI and IILF to begin with and adds a late machine-specific pass to use LLILH and LLILL if the other half of the register is not live. The high-word patches extend this behavior to IIHF, LLIHL and LLIHH. No behavioral change intended. llvm-svn: 191363
* Turn MipsOptimizeMathLibCalls into a target-independent scalar transformRichard Sandiford2013-08-231-0/+7
| | | | | | | | | | ...so that it can be used for z too. Most of the code is the same. The only real change is to use TargetTransformInfo to test when a sqrt instruction is available. The pass is opt-in because at the moment it only handles sqrt. llvm-svn: 189097
* [SystemZ] Use BRCT and BRCTG to eliminate add-&-compare sequencesRichard Sandiford2013-08-051-0/+3
| | | | | | | | | | | | | | | | This patch just uses a peephole test for "add; compare; branch" sequences within a single block. The IR optimizers already convert loops to decrement-and-branch-on-nonzero form in some cases, so even this simplistic test triggers many times during a clang bootstrap and projects/test-suite run. It looks like there are still cases where we need to more strongly prefer branches on nonzero though. E.g. I saw a case where a loop that started out with a check for 0 ended up with a check for -1. I'll try to look at that sometime. I ended up adding the Reference class because MachineInstr::readsRegister() doesn't check for subregisters (by design, as far as I could tell). llvm-svn: 187723
* [SystemZ] Split out comparison elimination into a separate passRichard Sandiford2013-08-051-0/+22
| | | | | | | | | | | Perhaps predictably, doing comparison elimination on the fly during SystemZLongBranch turned out to be a bad idea. The next patches make use of LOAD AND TEST and BRANCH ON COUNT, both of which require changes to earlier instructions. No functionality change intended. llvm-svn: 187718
* [SystemZ] Add LOCR and LOCGRRichard Sandiford2013-07-251-0/+7
| | | | llvm-svn: 187113
* [SystemZ] Add long branch passRichard Sandiford2013-05-201-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before this change, the SystemZ backend would use BRCL for all branches and only consider shortening them to BRC when generating an object file. E.g. a branch on equal would use the JGE alias of BRCL in assembly output, but might be shortened to the JE alias of BRC in ELF output. This was a useful first step, but it had two problems: (1) The z assembler isn't traditionally supposed to perform branch shortening or branch relaxation. We followed this rule by not relaxing branches in assembler input, but that meant that generating assembly code and then assembling it would not produce the same result as going directly to object code; the former would give long branches everywhere, whereas the latter would use short branches where possible. (2) Other useful branches, like COMPARE AND BRANCH, do not have long forms. We would need to do something else before supporting them. (Although COMPARE AND BRANCH does not change the condition codes, the plan is to model COMPARE AND BRANCH as a CC-clobbering instruction during codegen, so that we can safely lower it to a separate compare and long branch where necessary. This is not a valid transformation for the assembler proper to make.) This patch therefore moves branch relaxation to a pre-emit pass. For now, calls are still shortened from BRASL to BRAS by the assembler, although this too is not really the traditional behaviour. The first test takes about 1.5s to run, and there are likely to be more tests in this vein once further branch types are added. The feeling on IRC was that 1.5s is a bit much for a single test, so I've restricted it to SystemZ hosts for now. The patch exposes (and fixes) some typos in the main CodeGen/SystemZ tests. A later patch will remove the {{g}}s from that directory. llvm-svn: 182274
* Remove the MachineMove class.Rafael Espindola2013-05-131-0/+1
| | | | | | | | | | | | It was just a less powerful and more confusing version of MCCFIInstruction. A side effect is that, since MCCFIInstruction uses dwarf register numbers, calls to getDwarfRegNum are pushed out, which should allow further simplifications. I left the MachineModuleInfo::addFrameMove interface unchanged since this patch was already fairly big. llvm-svn: 181680
* [SystemZ] Add back endUlrich Weigand2013-05-061-0/+60
| | | | | | | | | | | | | | This adds the actual lib/Target/SystemZ target files necessary to implement the SystemZ target. Note that at this point, the target cannot yet be built since the configure bits are missing. Those will be provided shortly by a follow-on patch. This version of the patch incorporates feedback from reviews by Chris Lattner and Anton Korobeynikov. Thanks to all reviewers! Patch by Richard Sandiford. llvm-svn: 181203
* Remove the SystemZ backend.Dan Gohman2011-10-241-40/+0
| | | | llvm-svn: 142878
* Move TargetRegistry and TargetSelect from Target to Support where they belong.Evan Cheng2011-08-241-1/+1
| | | | | | These are strictly utilities for registering targets and components. llvm-svn: 138450
* - Move CodeModel from a TargetMachine global option to MCCodeGenInfo.Evan Cheng2011-07-201-4/+4
| | | | | | | | - Introduce JITDefault code model. This tells targets to set different default code model for JIT. This eliminates the ugly hack in TargetMachine where code model is changed after construction. llvm-svn: 135580
* Introduce MCCodeGenInfo, which keeps information that can affect codegenEvan Cheng2011-07-191-7/+4
| | | | | | | (including compilation, assembly). Move relocation model Reloc::Model from TargetMachine to MCCodeGenInfo so it's accessible even without TargetMachine. llvm-svn: 135468
* Rename createAsmInfo to createMCAsmInfo and move registration code to ↵Evan Cheng2011-07-141-2/+0
| | | | | | MCTargetDesc to prepare for next round of changes. llvm-svn: 135219
* Eliminate asm parser's dependency on TargetMachine:Evan Cheng2011-07-081-1/+1
| | | | | | | | | | - Each target asm parser now creates its own MCSubtatgetInfo (if needed). - Changed AssemblerPredicate to take subtarget features which tablegen uses to generate asm matcher subtarget feature queries. e.g. "ModeThumb,FeatureThumb2" is translated to "(Bits & ModeThumb) != 0 && (Bits & FeatureThumb2) != 0". llvm-svn: 134678
* Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name toEvan Cheng2011-06-301-1/+2
| | | | | | | | | | be the first encoded as the first feature. It then uses the CPU name to look up features / scheduling itineray even though clients know full well the CPU name being used to query these properties. The fix is to just have the clients explictly pass the CPU name! llvm-svn: 134127
* Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs ↵Anton Korobeynikov2011-01-101-1/+1
| | | | | | and fixes here and there. llvm-svn: 123170
* First step of huge frame-related refactoring: move emit{Prologue,Epilogue} ↵Anton Korobeynikov2010-11-151-1/+1
| | | | | | out of TargetRegisterInfo to TargetFrameInfo, which is definitely much better suitable place llvm-svn: 119097
* Implement a bunch more TargetSelectionDAGInfo infrastructure.Dan Gohman2010-05-111-1/+1
| | | | | | | | Move EmitTargetCodeForMemcpy, EmitTargetCodeForMemset, and EmitTargetCodeForMemmove out of TargetLowering and into SelectionDAGInfo to exercise this. llvm-svn: 103481
* indicate what the native integer types for the target are.Chris Lattner2009-11-071-1/+1
| | | | | | Please verify. llvm-svn: 86397
* Rename TargetAsmInfo (and its subclasses) to MCAsmInfo.Chris Lattner2009-08-221-2/+2
| | | | llvm-svn: 79763
* Change TargetAsmInfo to be constructed via TargetRegistry from a Target+TripleChris Lattner2009-08-121-7/+1
| | | | | | | | pair instead of from a virtual method on TargetMachine. This cuts the final ties of TargetAsmInfo to TargetMachine, meaning that MC can now use TargetAsmInfo. llvm-svn: 78802
* pass the TargetTriple down from each target ctor to theChris Lattner2009-08-111-1/+1
| | | | | | LLVMTargetMachine ctor. It is currently unused. llvm-svn: 78711
* Move most targets TargetMachine constructor to only taking a target triple.Daniel Dunbar2009-08-021-14/+2
| | | | | | - The C, C++, MSIL, and Mips backends still need the module. llvm-svn: 77927
* Normalize Subtarget constructors to take a target triple string instead ofDaniel Dunbar2009-08-021-1/+1
| | | | | | | | | | Module*. Also, dropped uses of TargetMachine where unnecessary. The only target which still takes a TargetMachine& is Mips, I would appreciate it if someone would normalize this to match other targets. llvm-svn: 77918
* eliminate the TM argument to the TAI class, remove comment about supportingChris Lattner2009-08-021-2/+1
| | | | | | solaris :) llvm-svn: 77865
* Add new helpers for registering targets.Daniel Dunbar2009-07-251-11/+4
| | | | | | - Less boilerplate == good. llvm-svn: 77052
* Put Target definitions inside Target specific header, and llvm namespace.Daniel Dunbar2009-07-181-1/+0
| | | | llvm-svn: 76344
* UnbreakAnton Korobeynikov2009-07-161-22/+18
| | | | llvm-svn: 76064
* Implement 'large' PIC modelAnton Korobeynikov2009-07-161-0/+3
| | | | llvm-svn: 76006
* Preliminary asmprinting of globalsAnton Korobeynikov2009-07-161-1/+1
| | | | llvm-svn: 75975
* Add simple frame index eliminationAnton Korobeynikov2009-07-161-1/+1
| | | | llvm-svn: 75939
* Let's start another backend :)Anton Korobeynikov2009-07-161-0/+72
llvm-svn: 75909
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