summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
Commit message (Expand)AuthorAgeFilesLines
* [SystemZ] Propagate MachineMemOperandsJonas Paulsson2017-06-071-6/+19
* [SystemZ] Improve buildVector() in SystemZISelLowering.cpp.Jonas Paulsson2017-05-291-19/+41
* [SystemZ] Implement getRepRegClassFor()Jonas Paulsson2017-05-101-0/+9
* Add extra operand to CALLSEQ_START to keep frame part set up previouslySerge Pavlov2017-05-091-3/+1
* [SelectionDAG] Use KnownBits struct in DAG's computeKnownBits and simplifyDem...Craig Topper2017-04-281-9/+10
* DAG: Make mayBeEmittedAsTailCall parameter constMatt Arsenault2017-04-181-1/+1
* [SystemZ] TargetTransformInfo cost functions implemented.Jonas Paulsson2017-04-121-0/+4
* [SystemZ] Check for presence of vector support in SystemZISelLoweringJonas Paulsson2017-04-071-2/+5
* [SystemZ] Remove confusing comment in combineEXTRACT_VECTOR_ELT()Jonas Paulsson2017-04-071-2/+0
* [SystemZ] Prevent Merging Bitcast with non-normal loadsNirav Dave2017-04-051-2/+3
* [SystemZ] Skip DAGCombining of vector node for older subtargets.Jonas Paulsson2017-03-311-0/+6
* [SystemZ] Add check VT.isSimple() in canTreateAsByteVector()Jonas Paulsson2017-03-071-1/+1
* [SystemZ] Add comment for ISD::FP_TO_UINT expansion.Jonas Paulsson2017-02-021-0/+3
* [SystemZ] Gracefully fail in GeneralShuffle::add() instead of assertion.Jonas Paulsson2017-01-241-12/+22
* [CodeGen] Rename MachineInstrBuilder::addOperand. NFCDiana Picus2017-01-131-19/+37
* [SystemZ] Improve isFoldableMemAccessOffset().Jonas Paulsson2017-01-111-2/+20
* [SystemZ] Improve use of conditional instructionsUlrich Weigand2016-11-281-3/+21
* [SystemZ] Model access registers as LLVM registersUlrich Weigand2016-11-081-5/+3
* [MachineMemOperand] Move synchronization scope and atomic orderings from SDNo...Konstantin Zhuravlyov2016-10-151-2/+1
* getVectorElementType().getSizeInBits() -> getScalarSizeInBits() ; NFCISanjay Patel2016-09-141-6/+6
* getValueType().getSizeInBits() -> getValueSizeInBits() ; NFCISanjay Patel2016-09-141-7/+5
* Fix SystemZ hang caused by r279105Elliot Colp2016-08-231-29/+24
* [SelectionDAG] Rename fextend -> fpextend, fround -> fpround, frnd -> froundMichael Kuperstein2016-08-181-2/+2
* Fix SystemZ compilation abort caused by negative AND maskElliot Colp2016-08-181-3/+34
* [LoopStrenghtReduce] Refactoring and addition of a new target cost function.Jonas Paulsson2016-08-171-0/+23
* MachineFunction: Return reference for getFrameInfo(); NFCMatthias Braun2016-07-281-11/+11
* [SelectionDAG] Get rid of bool parameters in SelectionDAG::getLoad, getStore,...Justin Lebar2016-07-151-47/+31
* [SystemZ] Utilize Test Data Class instructions.Marcin Koscielnicki2016-07-101-0/+5
* [SystemZ] Remove AND mask of bottom 6 bits when result is used for shift/rotateElliot Colp2016-07-061-1/+54
* [SystemZ] Move misplaced SystemZ::TDC to non-memory opcode range.Marcin Koscielnicki2016-07-021-1/+1
* CodeGen: Use MachineInstr& in TargetLowering, NFCDuncan P. N. Exon Smith2016-06-301-125/+117
* [SystemZ] Split up PerformDAGCombine. [NFC]Marcin Koscielnicki2016-06-301-142/+176
* [SystemZ] Add floating-point test data class instructions.Marcin Koscielnicki2016-06-291-0/+1
* Move shouldAssumeDSOLocal to Target.Rafael Espindola2016-06-271-2/+1
* Pass DebugLoc and SDLoc by const ref.Benjamin Kramer2016-06-121-45/+48
* [SystemZ] Support Compare and TrapsZhan Jun Liau2016-06-101-0/+3
* [SystemZ] Support LRVH and STRVH opcodesBryan Chan2016-05-161-0/+71
* [SystemZ] Implement backchain attribute (recommit with fix).Marcin Koscielnicki2016-05-051-4/+33
* Revert "[SystemZ] Implement backchain attribute."Marcin Koscielnicki2016-05-041-33/+4
* [SystemZ] Implement llvm.get.dynamic.area.offsetMarcin Koscielnicki2016-05-041-0/+10
* [SystemZ] Implement backchain attribute.Marcin Koscielnicki2016-05-041-4/+33
* [CodeGen] Default CTTZ_ZERO_UNDEF/CTLZ_ZERO_UNDEF to Expand in TargetLowering...Craig Topper2016-04-281-4/+0
* [SystemZ] Support Swift Calling ConventionBryan Chan2016-04-281-3/+7
* [CodeGen] Add getBuildVector and getSplatBuildVector helpers. NFCI.Ahmed Bougacha2016-04-261-6/+5
* [SystemZ] Mark CTTZ_ZERO_UNDEF/CTLZ_ZERO_UNDEF as Expand instead of Custom si...Craig Topper2016-04-221-8/+2
* [SystemZ] Add support for llvm.thread.pointer intrinsic.Marcin Koscielnicki2016-04-201-8/+18
* NFC: make AtomicOrdering an enum classJF Bastien2016-04-061-2/+4
* [SystemZ] Support ATOMIC_FENCEUlrich Weigand2016-04-041-0/+25
* [SystemZ] Support llvm.frameaddress/llvm.returnaddress intrinsicsUlrich Weigand2016-04-041-0/+55
* [DAG] use !isUndef() ; NFCISanjay Patel2016-03-141-6/+6
OpenPOWER on IntegriCloud