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* [DAG] use isUndef() ; NFCISanjay Patel2016-03-141-2/+2
| | | | llvm-svn: 263448
* This change adds co-processor condition branching and conditional traps to ↵Chris Dewhurst2016-03-097-42/+223
| | | | | | | | | | | | | | | | the Sparc back-end. This will allow inline assembler code to utilize these features, but no automatic lowering is provided, except for the previously provided @llvm.trap, which lowers to "ta 5". The change also separates out the different assembly language syntaxes for V8 and V9 Sparc. Previously, only V9 Sparc assembly syntax was provided. The change also corrects the selection order of trap disassembly, allowing, e.g. "ta %g0 + 15" to be rendered, more readably, as "ta 15", ignoring the %g0 register. This is per the sparc v8 and v9 manuals. Check-in includes many extra unit tests to check this works correctly on both V8 and V9 Sparc processors. Code Reviewed at http://reviews.llvm.org/D17960. llvm-svn: 263044
* The patch adds missing registers and instructions to complete all the ↵Chris Dewhurst2016-02-274-18/+310
| | | | | | | | | | | | | registers supported by the Sparc v8 manual. These are all co-processor registers, with the exception of the floating-point deferred-trap queue register. Although these will not be lowered automatically by any instructions, it allows the use of co-processor instructions implemented by inline-assembly. Code Reviewed at http://reviews.llvm.org/D17133, with the exception of a very small change in brace placement in SparcInstrInfo.td, which was formerly causing a problem in the disassembly of the %fq register. llvm-svn: 262133
* Fix Sparc 32bit Lowering to rebundle up v2i32 values.Nirav Dave2016-02-261-4/+23
| | | | | | | | | | | | Summary: Fix LowerCall to rebundle v2i32 values after lowering and add testcase Reviewers: jyknight Subscribers: llvm-commits, jyknight Differential Revision: http://reviews.llvm.org/D17615 llvm-svn: 262048
* Reverting breaking change. Sorry.Chris Dewhurst2016-02-264-303/+10
| | | | llvm-svn: 262007
* Reviewed at reviews.llvm.org/D17133Chris Dewhurst2016-02-264-10/+303
| | | | llvm-svn: 262005
* Initial test commit onlyChris Dewhurst2016-02-261-1/+0
| | | | llvm-svn: 262003
* CodeGen: TII: Take MachineInstr& in predicate API, NFCDuncan P. N. Exon Smith2016-02-231-4/+4
| | | | | | | | | | | | | Change TargetInstrInfo API to take `MachineInstr&` instead of `MachineInstr*` in the functions related to predicated instructions (I'll try to come back later and get some of the rest). All of these functions require non-null parameters already, so references are more clear. As a bonus, this happens to factor away a host of implicit iterator => pointer conversions. No functionality change intended. llvm-svn: 261605
* Revert "CodeGen: MachineInstr::getIterator() => getInstrIterator(), NFC"Duncan P. N. Exon Smith2016-02-221-2/+2
| | | | | | | | | | This reverts commit r261504, since it's not obvious the new name is better: http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20160222/334298.html I'll recommit if we get consensus that it's the right direction. llvm-svn: 261567
* CodeGen: MachineInstr::getIterator() => getInstrIterator(), NFCDuncan P. N. Exon Smith2016-02-211-2/+2
| | | | | | | | | | | | | | | | | | | | | | | Delete MachineInstr::getIterator(), since the term "iterator" is overloaded when talking about MachineInstr. - Downcast to ilist_node in iplist::getNextNode() and getPrevNode() so that ilist_node::getIterator() is still available. - Add it back as MachineInstr::getInstrIterator(). This matches the naming in MachineBasicBlock. - Add MachineInstr::getBundleIterator(). This is explicitly called "bundle" (not matching MachineBasicBlock) to disintinguish it clearly from ilist_node::getIterator(). - Update all calls. Some of these I switched to `auto` to remove boiler-plate, since the new name is clear about the type. There was one call I updated that looked fishy, but it wasn't clear what the right answer was. This was in X86FrameLowering::inlineStackProbe(), added in r252578 in lib/Target/X86/X86FrameLowering.cpp. I opted to leave the behaviour unchanged, but I'll reply to the original commit on the list in a moment. llvm-svn: 261504
* [SPARC] Repair floating-point condition encodings in assembly parser.James Y Knight2016-02-101-3/+3
| | | | | | | | | | | | | | | The encodings for floating point conditions A(lways) and N(ever) were incorrectly specified for the assembly parser, per Sparc manual v8 page 121. This change corrects that mistake. Also, strangely, all of the branch instructions already had MC test cases, except for the broken ones. Added the tests. Patch by Chris Dewhurst Differential Revision: http://reviews.llvm.org/D17074 llvm-svn: 260390
* Rename TargetSelectionDAGInfo into SelectionDAGTargetInfo and move it to ↵Benjamin Kramer2016-01-271-4/+4
| | | | | | | | CodeGen/ It's a SelectionDAG thing, not a Target thing. llvm-svn: 258939
* Move MCTargetAsmParser.h to llvm/MC/MCParser where it belongs.Benjamin Kramer2016-01-271-2/+2
| | | | llvm-svn: 258917
* Remove autoconf supportChris Bieneman2016-01-266-102/+0
| | | | | | | | | | | | | | | | Summary: This patch is provided in preparation for removing autoconf on 1/26. The proposal to remove autoconf on 1/26 was discussed on the llvm-dev thread here: http://lists.llvm.org/pipermail/llvm-dev/2016-January/093875.html "I felt a great disturbance in the [build system], as if millions of [makefiles] suddenly cried out in terror and were suddenly silenced. I fear something [amazing] has happened." - Obi Wan Kenobi Reviewers: chandlerc, grosbach, bob.wilson, tstellarAMD, echristo, whitequark Subscribers: chfast, simoncook, emaste, jholewinski, tberghammer, jfb, danalbert, srhines, arsenm, dschuff, jyknight, dsanders, joker.eph, llvm-commits Differential Revision: http://reviews.llvm.org/D16471 llvm-svn: 258861
* Reflect the MC/MCDisassembler split on the include/ level.Benjamin Kramer2016-01-261-1/+1
| | | | | | No functional change, just moving code around. llvm-svn: 258818
* Update to use new name alignTo().Rui Ueyama2016-01-143-4/+4
| | | | llvm-svn: 257804
* Convert a few assert failures into proper errors.Rafael Espindola2016-01-131-3/+4
| | | | | | Fixes PR25944. llvm-svn: 257697
* [SPARC] Revamp AnalyzeBranch and add ReverseBranchCondition.James Y Knight2016-01-132-89/+96
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | AnalyzeBranch on X86 (and, previously, SPARC, which implementation was copied from X86) tries to modify the branches based on block layout (e.g. checking isLayoutSuccessor), when AllowModify is true. The rest of the architectures leave that up to the caller, which can call InsertBranch, RemoveBranch, and ReverseBranchCondition as appropriate. That appears to be the preferred way to do it nowadays. This commit makes SPARC like the rest: replaces AnalyzeBranch with an implementation cribbed from AArch64, and adds a ReverseBranchCondition implementation. Additionally, a test-case has been added (also cribbed from AArch64) demonstrating that redundant branch sequences no longer get emitted. E.g., it used to emit code like this: bne .LBB1_2 nop ba .LBB1_1 nop .LBB1_2: And now emits: cmp %i0, 42 be .LBB1_1 nop llvm-svn: 257572
* Remove extra forward declarations and scrub includes for all in tree ↵Craig Topper2015-12-251-3/+0
| | | | | | InstPrinters. NFC llvm-svn: 256427
* [Sparc] Tweak r255668: Use llvm_unreachable.James Y Knight2015-12-151-1/+1
| | | | llvm-svn: 255698
* [Sparc] Fix handling of double incoming arguments on sparc little-endian.James Y Knight2015-12-151-9/+13
| | | | | | | | | | | | | | On SparcV8, doubles get passed in two 32-bit integer registers. The call code was already handling endianness correctly, but the incoming argument code was not -- it got the two halves in opposite order. Also remove some dead code in LowerFormalArguments_32 to handle less-than-32bit values, which can't actually happen. Finally, add some test cases for the 32-bit calling convention, cribbed from the 64abi.ll test, and run for both big and little-endian. llvm-svn: 255668
* Start replacing vector_extract/vector_insert with extractelt/inserteltMatt Arsenault2015-12-111-2/+2
| | | | | | | | | | | | | | | | | | | | These are redundant pairs of nodes defined for INSERT_VECTOR_ELEMENT/EXTRACT_VECTOR_ELEMENT. insertelement/extractelement are slightly closer to the corresponding C++ node name, and has stricter type checking so prefer it. Update targets to only use these nodes where it is trivial to do so. AArch64, ARM, and Mips all have various type errors on simple replacement, so they will need work to fix. Example from AArch64: def : Pat<(sext_inreg (vector_extract (v16i8 V128:$Rn), VectorIndexB:$idx), i8), (i32 (SMOVvi8to32 V128:$Rn, VectorIndexB:$idx))>; Which is trying to do sext_inreg i8, i8. llvm-svn: 255359
* Add a TODO item that the nop handling before FP conditional branches isJoerg Sonnenberger2015-12-031-0/+2
| | | | | | not enough for SPARCv7. llvm-svn: 254580
* Expose isXxxConstant() functions from SelectionDAGNodes.h (NFC)Artyom Skrobov2015-11-251-6/+3
| | | | | | | | | | | | | | Summary: Many target lowerings copy-paste the code to test SDValues for known constants. This code can instead be shared in SelectionDAG.cpp, and reused in the targets. Reviewers: MatzeB, andreadb, tstellarAMD Subscribers: arsenm, jyknight, llvm-commits Differential Revision: http://reviews.llvm.org/D14945 llvm-svn: 254085
* Reduce the size of MCRelaxableFragment.Akira Hatanaka2015-11-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | MCRelaxableFragment previously kept a copy of MCSubtargetInfo and MCInst to enable re-encoding the MCInst later during relaxation. A copy of MCSubtargetInfo (instead of a reference or pointer) was needed because the feature bits could be modified by the parser. This commit replaces the MCSubtargetInfo copy in MCRelaxableFragment with a constant reference to MCSubtargetInfo. The copies of MCSubtargetInfo are kept in MCContext, and the target parsers are now responsible for asking MCContext to provide a copy whenever the feature bits of MCSubtargetInfo have to be toggled. With this patch, I saw a 4% reduction in peak memory usage when I compiled verify-uselistorder.lto.bc using llc. rdar://problem/21736951 Differential Revision: http://reviews.llvm.org/D14346 llvm-svn: 253127
* [MCTargetAsmParser] Move the member varialbes that referenceAkira Hatanaka2015-11-141-5/+4
| | | | | | | | | | MCSubtargetInfo in the subclasses into MCTargetAsmParser and define a member function getSTI. This is done in preparation for making changes to shrink the size of MCRelaxableFragment. (see http://reviews.llvm.org/D14346). llvm-svn: 253124
* [WinEH] Update exception pointer registersJoseph Tremoulet2015-11-072-3/+14
| | | | | | | | | | | | | | | | | | | | Summary: The CLR's personality routine passes these in rdx/edx, not rax/eax. Make getExceptionPointerRegister a virtual method parameterized by personality function to allow making this distinction. Similarly make getExceptionSelectorRegister a virtual method parameterized by personality function, for symmetry. Reviewers: pgavlin, majnemer, rnk Subscribers: jyknight, dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D14344 llvm-svn: 252383
* Remove windows line endings introduced by r252177. NFC.Tim Northover2015-11-051-7/+7
| | | | llvm-svn: 252217
* [DebugInfo] Fix ARM/AArch64 prologue_end position. Related to D11268.Oleg Ranevskyy2015-11-051-8/+10
| | | | | | | | | | | | | | | | | | | Summary: This review is related to another review request http://reviews.llvm.org/D11268, does the same and merely fixes a couple of issues with it. D11268 is quite old and has merge conflicts against the current trunk. This request - rebases D11268 onto the new trunk; - resolves the merge conflicts; - fixes the prologue_end tests, which do not pass due to the subprogram definitions not marked as distinct. Reviewers: echristo, rengolin, kubabrecka Subscribers: aemerson, rengolin, jyknight, dsanders, llvm-commits, asl Differential Revision: http://reviews.llvm.org/D14338 llvm-svn: 252177
* Change makeLibCall to take an ArrayRef<SDValue> instead of pointer and size. ↵Craig Topper2015-10-221-1/+1
| | | | | | This removes the need to pass a hardcoded size in many places. NFC llvm-svn: 251032
* Drop assert that a call with struct return goes to a function with sretJoerg Sonnenberger2015-10-211-2/+2
| | | | | | | attribute. Clang incorrectly misses it on __muldc3 and friends and the type system doesn't include it properly either. llvm-svn: 250938
* Sparc: Remove implicit ilist iterator conversions, NFCDuncan P. N. Exon Smith2015-10-202-5/+4
| | | | llvm-svn: 250781
* [Sparc] Use MCPhysReg instead of unsigned to size static arrays of ↵Craig Topper2015-10-181-6/+7
| | | | | | registers. Should reduce the table size. llvm-svn: 250644
* Make a bunch of static arrays const.Craig Topper2015-10-181-6/+6
| | | | llvm-svn: 250642
* Fix assert when emitting llvm.pow.f86.James Y Knight2015-10-091-5/+4
| | | | | | | | | | | | | This occurred due to introducing the invalid i64 type after type legalization had already finished, in an attempt to workaround bitcast f64 -> v2i32 not doing constant folding. The *right* thing is to actually fix bitcast, but that has other complications. So, for now, just get rid of the broken workaround, and check in a test-case showing that it doesn't crash, with TODOs for emitting proper code. llvm-svn: 249908
* Fix pr24486.Rafael Espindola2015-10-051-2/+2
| | | | | | | | | | | | | | | | | | This extends the work done in r233995 so that now getFragment (in addition to getSection) also works for variable symbols. With that the existing logic to decide if a-b can be computed works even if a or b are variables. Given that, the expression evaluation can avoid expanding variables as aggressively and that in turn lets the relocation code see the original variable. In order for this to work with the asm streamer, there is now a dummy fragment per section. It is used to assign a section to a symbol when no other fragment exists. This patch is a joint work by Maxim Ostapenko andy myself. llvm-svn: 249303
* [SPARCv9] Add support for the rdpr/wrpr instructions.Joerg Sonnenberger2015-10-044-0/+131
| | | | llvm-svn: 249262
* Fix relocation used for GOT references in non-PIC mode. Fix relocationsJoerg Sonnenberger2015-10-011-28/+33
| | | | | | | | for "set" pseudo op in PIC mode. Differential Revision: http://reviews.llvm.org/D13173 llvm-svn: 249086
* [SPARC] Add mulscc.Joerg Sonnenberger2015-09-171-0/+4
| | | | llvm-svn: 247940
* [SPARC] Both GNU and Solaris as support eq as condition code for integer ops.Joerg Sonnenberger2015-09-161-0/+1
| | | | llvm-svn: 247804
* [SPARC] Recognize st/stx operations with %fsr argument too.Joerg Sonnenberger2015-09-161-0/+16
| | | | llvm-svn: 247794
* Revert r247692: Replace Triple with a new TargetTuple in MCTargetDesc/* and ↵Daniel Sanders2015-09-157-24/+22
| | | | | | | | related. NFC. Eric has replied and has demanded the patch be reverted. llvm-svn: 247702
* Re-commit r247683: Replace Triple with a new TargetTuple in MCTargetDesc/* ↵Daniel Sanders2015-09-157-22/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | and related. NFC. Summary: This is the first patch in the series to migrate Triple's (which are ambiguous) to TargetTuple's (which aren't). For the moment, TargetTuple simply passes all requests to the Triple object it holds. Once it has replaced Triple, it will start to implement the interface in a more suitable way. This change makes some changes to the public C++ API. In particular, InitMCSubtargetInfo(), createMCRelocationInfo(), and createMCSymbolizer() now take TargetTuples instead of Triples. The other public C++ API's have been left as-is for the moment to reduce patch size. This commit also contains a trivial patch to clang to account for the C++ API change. Thanks go to Pavel Labath for fixing LLDB for me. Reviewers: rengolin Subscribers: jyknight, dschuff, arsenm, rampitec, danalbert, srhines, javed.absar, dsanders, echristo, emaste, jholewinski, tberghammer, ted, jfb, llvm-commits, rengolin Differential Revision: http://reviews.llvm.org/D10969 llvm-svn: 247692
* Revert r247684 - Replace Triple with a new TargetTuple ...Daniel Sanders2015-09-157-24/+22
| | | | | | LLDB needs to be updated in the same commit. llvm-svn: 247686
* Replace Triple with a new TargetTuple in MCTargetDesc/* and related. NFC.Daniel Sanders2015-09-157-22/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This is the first patch in the series to migrate Triple's (which are ambiguous) to TargetTuple's (which aren't). For the moment, TargetTuple simply passes all requests to the Triple object it holds. Once it has replaced Triple, it will start to implement the interface in a more suitable way. This change makes some changes to the public C++ API. In particular, InitMCSubtargetInfo(), createMCRelocationInfo(), and createMCSymbolizer() now take TargetTuples instead of Triples. The other public C++ API's have been left as-is for the moment to reduce patch size. This commit also contains a trivial patch to clang to account for the C++ API change. Reviewers: rengolin Subscribers: jyknight, dschuff, arsenm, rampitec, danalbert, srhines, javed.absar, dsanders, echristo, emaste, jholewinski, tberghammer, ted, jfb, llvm-commits, rengolin Differential Revision: http://reviews.llvm.org/D10969 llvm-svn: 247683
* Fix namespace indentation and missing blank lines before 'public:' in ↵Daniel Sanders2015-09-151-0/+1
| | | | | | | | | | *MCAsmInfo.h. NFC. This is to reduce noise in a following commit. Also fixes a couple missing spaces before the reference operator. llvm-svn: 247679
* [SPARC] Switch to the Machine Scheduler.James Y Knight2015-09-102-1/+6
| | | | | | | | | | | | | The (mostly-deprecated) SelectionDAG-based ILPListDAGScheduler scheduler was making poor scheduling decisions, causing high register pressure and extraneous register spills. Switching to the newer machine scheduler generates better code -- even without there being a machine model defined for SPARC yet. (Actually committing the test changes too, this time, unlike r247315) llvm-svn: 247343
* Revert "[SPARC] Switch to the Machine Scheduler."James Y Knight2015-09-102-6/+1
| | | | | | | | This reverts commit r247315. Accidentally omitted test changes; will resubmit full change shortly. llvm-svn: 247328
* [SPARC] Switch to the Machine Scheduler.James Y Knight2015-09-102-1/+6
| | | | | | | | | | | The (mostly-deprecated) SelectionDAG-based ILPListDAGScheduler scheduler was making poor scheduling decisions, causing high register pressure and extraneous register spills. Switching to the newer machine scheduler generates better code -- even without there being a machine model defined for SPARC yet. llvm-svn: 247315
* [SPARC] Fix stupid oversight in stack realignment support.James Y Knight2015-08-263-2/+37
| | | | | | | | | | | | | | | | | | | | If you're going to realign %sp to get object alignment properly (which the code does), and stack offsets and alignments are calculated going down from %fp (which they are), then the total stack size had better be a multiple of the alignment. LLVM did indeed ensure that. And then, after aligning, the sparc frame code added 96 (for sparcv8) to the frame size, making any requested alignment of 64-bytes or higher *guaranteed* to be misaligned. The test case added with r245668 even tests this exact scenario, and asserted the incorrect behavior, which I somehow failed to notice. D'oh. This change fixes the frame lowering code to align the stack size *after* adding the spill area, instead. Differential Revision: http://reviews.llvm.org/D12349 llvm-svn: 246042
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