| Commit message (Collapse) | Author | Age | Files | Lines |
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slots. The AsmPrinter will use this information to determine whether to
print a spill/reload comment.
Remove default argument values. It's too easy to pass a wrong argument
value when multiple arguments have default values. Make everything
explicit to trap bugs early.
Update all targets to adhere to the new interfaces..
llvm-svn: 87022
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llvm-svn: 86851
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Please verify.
llvm-svn: 86397
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llvm-svn: 86149
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bunch of associated comments, because it doesn't have anything to do
with DAGs or scheduling. This is another step in decoupling MachineInstr
emitting from scheduling.
llvm-svn: 85517
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Chris claims we should never have visibility_hidden inside any .cpp file but
that's still not true even after this commit.
llvm-svn: 85042
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a virtual register to eliminate a frame index, it can return that register
and the constant stored there to PEI to track. When scavenging to allocate
for those registers, PEI then tracks the last-used register and value, and
if it is still available and matches the value for the next index, reuses
the existing value rather and removes the re-materialization instructions.
Fancier tracking and adjustment of scavenger allocations to keep more
values live for longer is possible, but not yet implemented and would likely
be better done via a different, less special-purpose, approach to the
problem.
eliminateFrameIndex() is modified so the target implementations can return
the registers they wish to be tracked for reuse.
ARM Thumb1 implements and utilizes the new mechanism. All other targets are
simply modified to adjust for the changed eliminateFrameIndex() prototype.
llvm-svn: 83467
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verbose-asm mode, print comments instead. This eliminates a non-comment
difference between verbose-asm mode and non-verbose-asm mode.
Also, factor out the relevant code out of all the targets and into
target-independent code.
llvm-svn: 83392
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and after printing an instruction.
llvm-svn: 83363
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This will allow processDebugLoc() to handle scopes for DWARF debug info.
llvm-svn: 83183
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naming scheme used in SelectionDAG, where there are multiple kinds
of "target" nodes, but "machine" nodes are nodes which represent
a MachineInstr.
llvm-svn: 82790
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blocks and update CFG, it should also inform sdisel of the changes so the phi source operands will come from the right basic blocks.
llvm-svn: 82311
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sdisel will use to properly complete phi nodes.
Not functionality change yet.
llvm-svn: 82273
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llvm-svn: 81881
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and PIC codegen. Patch by Venkatraman Govindaraju!
llvm-svn: 81877
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llvm-svn: 81718
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llvm-svn: 81714
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the object, make it static instead of const.
llvm-svn: 81711
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Nothing is using this info yet.
llvm-svn: 81707
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now that printBasicBlockLabel is only used for starting
a MBB. This allows elimination of a bunch of arguments.
llvm-svn: 81684
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instead.
llvm-svn: 81677
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the MCInst path of the asmprinter. Instead, pull comment printing
out of the autogenerated asmprinter into each target that uses the
autogenerated asmprinter. This causes code duplication into each
target, but in a way that will be easier to clean up later when more
asmprinter stuff is commonized into the base AsmPrinter class.
This also fixes an xcore strangeness where it inserted two tabs
before every instruction.
llvm-svn: 81396
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asm printer into the "printInstruction" routine. This
fixes a problem where the experimental asmprinter would
drop debug labels in some cases, and fixes issues on ppc/xcore
where pseudo instructions like "mr" didn't get debug locs properly.
It is annoying that this moves the call from one place into each
target, but a future set of more invasive refactorings will fix
that problem.
llvm-svn: 81377
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llvm-svn: 81215
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llvm-svn: 80773
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llvm-svn: 80584
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llvm-svn: 80121
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llvm-svn: 80070
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MachineInstr and MachineOperand. This required eliminating a
bunch of stuff that was using DOUT, I hope that bill doesn't
mind me stealing his fun. ;-)
llvm-svn: 79813
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llvm-svn: 79780
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llvm-svn: 79777
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llvm-svn: 79763
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llvm-svn: 79742
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talk to the MCStreamer directly instead.
llvm-svn: 79405
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pair instead of from a virtual method on TargetMachine. This cuts the final
ties of TargetAsmInfo to TargetMachine, meaning that MC can now use
TargetAsmInfo.
llvm-svn: 78802
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while
the latter is capable of representing either a primitive or an extended type.
llvm-svn: 78713
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LLVMTargetMachine ctor. It is currently unused.
llvm-svn: 78711
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own struct type.
llvm-svn: 78610
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A TAI hook is appropriate in this case because this is just an
asm syntax issue, not a semantic difference. TLOF should model
the semantics of the section.
llvm-svn: 78498
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error condition get trapped with an assert.
llvm-svn: 78449
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llvm-svn: 78363
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llvm-svn: 78207
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Instead of awkwardly encoding calling-convention information with ISD::CALL,
ISD::FORMAL_ARGUMENTS, ISD::RET, and ISD::ARG_FLAGS nodes, TargetLowering
provides three virtual functions for targets to override:
LowerFormalArguments, LowerCall, and LowerRet, which replace the custom
lowering done on the special nodes. They provide the same information, but
in a more immediately usable format.
This also reworks much of the target-independent tail call logic. The
decision of whether or not to perform a tail call is now cleanly split
between target-independent portions, and the target dependent portion
in IsEligibleForTailCallOptimization.
This also synchronizes all in-tree targets, to help enable future
refactoring and feature work.
llvm-svn: 78142
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- The C, C++, MSIL, and Mips backends still need the module.
llvm-svn: 77927
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Module*.
Also, dropped uses of TargetMachine where unnecessary. The only target which
still takes a TargetMachine& is Mips, I would appreciate it if someone would
normalize this to match other targets.
llvm-svn: 77918
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llvm-svn: 77864
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no longer depends on TM!
llvm-svn: 77863
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llvm-svn: 77820
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llvm-svn: 77692
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No functionality change.
llvm-svn: 77432
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