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* CodeGen still defaults to non-verbose asm, but llc now overrides it and ↵Evan Cheng2009-03-254-9/+9
| | | | | | default to verbose. llvm-svn: 67668
* It makes no sense to have a ODR version of commonDuncan Sands2009-03-111-2/+1
| | | | | | linkage, so remove it. llvm-svn: 66690
* Introduce new linkage types linkonce_odr, weak_odr, common_odrDuncan Sands2009-03-071-4/+7
| | | | | | | | | | | | | | | | | | | | | and extern_weak_odr. These are the same as the non-odr versions, except that they indicate that the global will only be overridden by an *equivalent* global. In C, a function with weak linkage can be overridden by a function which behaves completely differently. This means that IP passes have to skip weak functions, since any deductions made from the function definition might be wrong, since the definition could be replaced by something completely different at link time. This is not allowed in C++, thanks to the ODR (One-Definition-Rule): if a function is replaced by another at link-time, then the new function must be the same as the original function. If a language knows that a function or other global can only be overridden by an equivalent global, it can give it the weak_odr linkage type, and the optimizers will understand that it is alright to make deductions based on the function body. The code generators on the other hand map weak and weak_odr linkage to the same thing. llvm-svn: 66339
* Overhaul my earlier submission due to feedback. It's a large patch, but most ofBill Wendling2009-02-243-9/+13
| | | | | | | | | | | | them are generic changes. - Use the "fast" flag that's already being passed into the asm printers instead of shoving it into the DwarfWriter. - Instead of calling "MI->getParent()->getParent()" for every MI, set the machine function when calling "runOnMachineFunction" in the asm printers. llvm-svn: 65379
* Propagate debug loc info through prologue/epilogue.Bill Wendling2009-02-231-8/+10
| | | | llvm-svn: 65298
* Put code that generates debug labels into TableGen so that it can be used byBill Wendling2009-02-181-0/+1
| | | | | | everyone. llvm-svn: 64978
* Add explicit keywords.Dan Gohman2009-02-181-1/+1
| | | | llvm-svn: 64915
* Factor out the code to add a MachineOperand to a MachineInstrBuilder.Dan Gohman2009-02-181-22/+4
| | | | llvm-svn: 64891
* Remove non-DebugLoc versions of buildMI from Sparc.Dale Johannesen2009-02-135-13/+21
| | | | llvm-svn: 64435
* Eliminate a couple of non-DebugLoc BuildMI variants.Dale Johannesen2009-02-121-2/+4
| | | | | | Modify callers. llvm-svn: 64409
* Move debug loc info along when the spiller creates new instructions.Bill Wendling2009-02-121-26/+45
| | | | llvm-svn: 64342
* Use getDebugLoc forwarder instead of getNode()->getDebugLoc.Dale Johannesen2009-02-071-1/+1
| | | | | | No functional change. llvm-svn: 64026
* Constify TargetInstrInfo::EmitInstrWithCustomInserter, allowingDan Gohman2009-02-072-2/+2
| | | | | | ScheduleDAG's TLI member to use const. llvm-svn: 64018
* Get rid of the last non-DebugLoc versions of getNode!Dale Johannesen2009-02-071-4/+6
| | | | | | | | | | | | Many targets build placeholder nodes for special operands, e.g. GlobalBaseReg on X86 and PPC for the PIC base. There's no sensible way to associate debug info with these. I've left them built with getNode calls with explicit DebugLoc::getUnknownLoc operands. I'm not too happy about this but don't see a good improvement; I considered adding a getPseudoOperand or something, but it seems to me that'll just make it harder to read. llvm-svn: 63992
* Remove more non-DebugLoc getNode variants. UseDale Johannesen2009-02-061-3/+3
| | | | | | | | getCALLSEQ_{END,START} to permit passing no DebugLoc there. UNDEF doesn't logically have DebugLoc; add getUNDEF to encapsulate this. llvm-svn: 63978
* Remove more non-DebugLoc versions of getNode.Dale Johannesen2009-02-061-6/+10
| | | | llvm-svn: 63969
* Eliminate remaining non-DebugLoc version of getTargetNode.Dale Johannesen2009-02-061-3/+4
| | | | llvm-svn: 63951
* Remove a non-DebugLoc version of getNode.Dale Johannesen2009-02-051-6/+8
| | | | llvm-svn: 63889
* Remove non-DebugLoc forms of CopyToReg and CopyFromReg.Dale Johannesen2009-02-041-8/+11
| | | | | | Adjust callers. llvm-svn: 63789
* Remove non-DebugLoc versions of getLoad and getStore.Dale Johannesen2009-02-041-23/+29
| | | | | | Adjust the many callers of those versions. llvm-svn: 63767
* Remove non-DebugLoc forms of the exotic formsDale Johannesen2009-02-041-22/+22
| | | | | | of Lod and Sto; patch uses. llvm-svn: 63716
* Make LowerCallTo and LowerArguments take a DebugLocDale Johannesen2009-01-302-2/+4
| | | | | | argument. Adjust all callers and overloaded versions. llvm-svn: 63444
* Change TargetInstrInfo::isMoveInstr to return source and destination ↵Evan Cheng2009-01-202-5/+8
| | | | | | sub-register indices as well. llvm-svn: 62600
* Add the private linkage.Rafael Espindola2009-01-151-6/+8
| | | | llvm-svn: 62279
* Move a few containers out of ScheduleDAGInstrs::BuildSchedGraphDan Gohman2009-01-151-1/+1
| | | | | | | | | | | and into the ScheduleDAGInstrs class, so that they don't get destructed and re-constructed for each block. This fixes a compile-time hot spot in the post-pass scheduler. To help facilitate this, tidy and do some minor reorganization in the scheduler constructor functions. llvm-svn: 62275
* Rename getABITypeSize to getTypePaddedSize, asDuncan Sands2009-01-121-1/+1
| | | | | | suggested by Chris. llvm-svn: 62099
* Removed trailing whitespace from Makefiles.Misha Brukman2009-01-092-5/+5
| | | | llvm-svn: 61991
* Tidy up #includes, deleting a bunch of unnecessary #includes.Dan Gohman2009-01-052-1/+1
| | | | llvm-svn: 61715
* Don't make use of an illegal type (i64) whenDuncan Sands2008-12-121-5/+31
| | | | | | lowering f64 function arguments. llvm-svn: 60944
* Split foldMemoryOperand into public non-virtual and protected virtualDan Gohman2008-12-032-11/+11
| | | | | | | parts, and add target-independent code to add/preserve MachineMemOperands. llvm-svn: 60488
* There are no longer any places that require aDuncan Sands2008-12-011-2/+2
| | | | | | | | MERGE_VALUES node with only one operand, so get rid of special code that only existed to handle that possibility. llvm-svn: 60349
* Move target independent td files from lib/Target/ to include/llvm/Target so ↵Evan Cheng2008-11-241-1/+1
| | | | | | they can be distributed along with the header files. llvm-svn: 59953
* Add more const qualifiers. This fixes build breakage from r59540.Dan Gohman2008-11-182-4/+6
| | | | llvm-svn: 59542
* Adds extern "C" ints to the .cpp files that use RegisterTarget, asOscar Fuentes2008-11-151-0/+8
| | | | | | | | | | | well as 2 files that use "Registrator"s. These are to be used by the MSVC builds, as the Win32 linker does not include libs that are otherwise unreferenced, even if global constructors in the lib have side-effects. Patch by Scott Graham! llvm-svn: 59378
* CMake: corrected split of Alpha and Sparc AsmPrinters.Oscar Fuentes2008-11-111-2/+1
| | | | llvm-svn: 59050
* Separate sparc asmprinter. This should unbreak the native buildAnton Korobeynikov2008-11-114-1/+27
| | | | llvm-svn: 59047
* Eliminate the ISel priority queue, which used the topological order for aDan Gohman2008-11-051-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | priority function. Instead, just iterate over the AllNodes list, which is already in topological order. This eliminates a fair amount of bookkeeping, and speeds up the isel phase by about 15% on many testcases. The impact on most targets is that AddToISelQueue calls can be simply removed. In the x86 target, there are two additional notable changes. The rule-bending AND+SHIFT optimization in MatchAddress that creates new pre-isel nodes during isel is now a little more verbose, but more robust. Instead of either creating an invalid DAG or creating an invalid topological sort, as it has historically done, it can now just insert the new nodes into the node list at a position where they will be consistent with the topological ordering. Also, the address-matching code has logic that checked to see if a node was "already selected". However, when a node is selected, it has all its uses taken away via ReplaceAllUsesWith or equivalent, so it won't recieve any further visits from MatchAddress. This code is now removed. llvm-svn: 58748
* Have TableGen emit setSubgraphColor calls under control of a -gen-debugDavid Greene2008-10-271-1/+1
| | | | | | | | flag. Then in a debugger developers can set breakpoints at these calls to see waht is about to be selected and what the resulting subgraph looks like. This really helps when debugging instruction selection. llvm-svn: 58278
* Teach DAGCombine to fold constant offsets into GlobalAddress nodes,Dan Gohman2008-10-182-0/+8
| | | | | | | | | | | | | | | | | | | | | | and add a TargetLowering hook for it to use to determine when this is legal (i.e. not in PIC mode, etc.) This allows instruction selection to emit folded constant offsets in more cases, such as the included testcase, eliminating the need for explicit arithmetic instructions. This eliminates the need for the C++ code in X86ISelDAGToDAG.cpp that attempted to achieve the same effect, but wasn't as effective. Also, fix handling of offsets in GlobalAddressSDNodes in several places, including changing GlobalAddressSDNode's offset from int to int64_t. The Mips, Alpha, Sparc, and CellSPU targets appear to be unaware of GlobalAddress offsets currently, so set the hook to false on those targets. llvm-svn: 57748
* Const-ify several TargetInstrInfo methods.Dan Gohman2008-10-162-3/+3
| | | | llvm-svn: 57622
* Rename LoadX to LoadExt.Evan Cheng2008-10-141-2/+2
| | | | llvm-svn: 57526
* Fix command-line option printing to print two spaces where needed,Dan Gohman2008-10-141-1/+1
| | | | | | | | | instead of requiring all "short description" strings to begin with two spaces. This makes these strings less mysterious, and it fixes some cases where short description strings mistakenly did not begin with two spaces. llvm-svn: 57521
* Change CALLSEQ_BEGIN and CALLSEQ_END to take TargetConstant's asChris Lattner2008-10-112-6/+5
| | | | | | | parameters instead of raw Constants. This prevents the constants from being selected by the isel pass, fixing PR2735. llvm-svn: 57385
* Fix a thinko and unbreak sparc default CCAnton Korobeynikov2008-10-101-2/+2
| | | | llvm-svn: 57368
* Extend set of return registers on sparc until someone will implement MRV ↵Anton Korobeynikov2008-10-101-3/+3
| | | | | | support there. At least, this will allow libgcc compile, however we are not ABI-compatible with stuff compiled with native gcc. llvm-svn: 57364
* Ignore extra 'r' modifier for nowAnton Korobeynikov2008-10-101-2/+9
| | | | llvm-svn: 57363
* Use expand for smul_lohi for nowAnton Korobeynikov2008-10-101-0/+1
| | | | llvm-svn: 57362
* Add rudimentary support for 'r' register operandAnton Korobeynikov2008-10-102-11/+70
| | | | llvm-svn: 57359
* CleanupAnton Korobeynikov2008-10-101-83/+82
| | | | llvm-svn: 57358
* Add rudimentary asmprinter support for printing inline asm operands for sparc.Anton Korobeynikov2008-10-101-2/+31
| | | | llvm-svn: 57346
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