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* Refactor the setting of PrivateGlobalPrefix.Rafael Espindola2013-12-021-2/+0
| | | | | | No functionality change. llvm-svn: 196170
* Change the default of AsmWriterClassName and isMCAsmWriter.Rafael Espindola2013-12-021-0/+7
| | | | llvm-svn: 196065
* [CMake] Let add_public_tablegen_target() provide intrinsics_gen, too.NAKAMURA Takumi2013-11-281-2/+0
| | | | | | | | | | I think, in principle, intrinsics_gen may be added explicitly. That said, it can be added incidentally, since each target already has dependencies to llvm-tblgen. Almost all source files depend on both CommonTaleGen and intrinsics_gen. Explicit add_dependencies() have been pruned under lib/Target. llvm-svn: 195929
* [CMake] Let add_public_tablegen_target responsible to provide dependency to ↵NAKAMURA Takumi2013-11-283-5/+1
| | | | | | | | | CommonTableGen. add_public_tablegen_target adds *CommonTableGen to LLVM_COMMON_DEPENDS. LLVM_COMMON_DEPENDS affects add_llvm_library (and other add_target stuff) within its scope. llvm-svn: 195927
* [CMake] Prune include_directories() in llvm/lib/Target. add_llvm_target() ↵NAKAMURA Takumi2013-11-281-2/+0
| | | | | | sets them. llvm-svn: 195921
* SparcFrameLowering.cpp: Prune 'DL' [-Wunused-variable]NAKAMURA Takumi2013-11-251-1/+0
| | | | llvm-svn: 195590
* [Sparc] Emit large negative adjustments to SP/FP with sethi+xor instead of ↵Venkatraman Govindaraju2013-11-244-40/+108
| | | | | | sethi+or. This generates correct code for both sparc32 and sparc64. llvm-svn: 195576
* [Sparc]: Implement LEA pattern for sparcv9.Venkatraman Govindaraju2013-11-242-4/+11
| | | | llvm-svn: 195575
* [SparcV9]: Do not emit .register directives for global registers that are ↵Venkatraman Govindaraju2013-11-241-1/+1
| | | | | | clobbered by calls but not used in the function itself. llvm-svn: 195574
* [SparcV9] Enable custom lowering of DYNAMIC_STACKALLOC in sparc64.Venkatraman Govindaraju2013-11-241-6/+11
| | | | llvm-svn: 195573
* [weak vtables] Remove a bunch of weak vtablesJuergen Ributzka2013-11-192-1/+6
| | | | | | | | | | | | This patch removes most of the trivial cases of weak vtables by pinning them to a single object file. The memory leaks in this version have been fixed. Thanks Alexey for pointing them out. Differential Revision: http://llvm-reviews.chandlerc.com/D2068 Reviewed by Andy llvm-svn: 195064
* Revert r194865 and r194874.Alexey Samsonov2013-11-182-6/+1
| | | | | | | | | | | | This change is incorrect. If you delete virtual destructor of both a base class and a subclass, then the following code: Base *foo = new Child(); delete foo; will not cause the destructor for members of Child class. As a result, I observe plently of memory leaks. Notable examples I investigated are: ObjectBuffer and ObjectBufferStream, AttributeImpl and StringSAttributeImpl. llvm-svn: 194997
* [weak vtables] Remove a bunch of weak vtablesJuergen Ributzka2013-11-152-1/+6
| | | | | | | | | | | This patch removes most of the trivial cases of weak vtables by pinning them to a single object file. Differential Revision: http://llvm-reviews.chandlerc.com/D2068 Reviewed by Andy llvm-svn: 194865
* Expand rotate instructions on sparcv9 as well.Roman Divacky2013-11-121-0/+2
| | | | llvm-svn: 194500
* [SparcV9] Handle i64 <-> float conversions in sparcv9 mode.Venkatraman Govindaraju2013-11-034-28/+184
| | | | llvm-svn: 193957
* [Sparc] Expand FP_TO_UINT, UINT_TO_FP for fp128.Venkatraman Govindaraju2013-11-031-3/+42
| | | | llvm-svn: 193947
* [SparcV9] Add ctpop instruction for i64. Also, expand ctlz, cttz and bswap.Venkatraman Govindaraju2013-11-032-0/+9
| | | | llvm-svn: 193941
* SparcV9 doesnt have rem instruction either.Roman Divacky2013-10-311-0/+8
| | | | llvm-svn: 193789
* Add a helper getSymbol to AsmPrinter.Rafael Espindola2013-10-291-1/+1
| | | | llvm-svn: 193627
* Add a MCAsmInfoELF class and factor some code into it.Rafael Espindola2013-10-162-4/+2
| | | | | | We had a MCAsmInfoCOFF, but no common class for all the ELF MCAsmInfos before. llvm-svn: 192760
* [Sparc] Disable tail call optimization for sparc64.Venkatraman Govindaraju2013-10-091-0/+3
| | | | | | This patch fixes PR17506. llvm-svn: 192294
* SparcJITInfo.cpp: Prune "default:" label to fix a warning. ↵NAKAMURA Takumi2013-10-081-1/+0
| | | | | | [-Wcovered-switch-default] llvm-svn: 192179
* Prune trailing linefeeds.NAKAMURA Takumi2013-10-081-2/+0
| | | | llvm-svn: 192178
* [Sparc] Implement JIT for SPARC.Venkatraman Govindaraju2013-10-0812-44/+586
| | | | | | | No new testcases. However, this patch makes all supported JIT testcases in test/ExecutionEngine pass on Sparc. llvm-svn: 192176
* [Sparc] Do not hardcode nop in the delay slot of TLS_CALL. Use ↵Venkatraman Govindaraju2013-10-082-3/+4
| | | | | | DelaySlotFiller to fill the delay slot instead. llvm-svn: 192160
* Remove getEHExceptionRegister and getEHHandlerRegister.Rafael Espindola2013-10-072-11/+0
| | | | | | They haven't been used for a long time. Patch by MathOnNapkins. llvm-svn: 192099
* [Sparc] Do not emit nop after fcmp* instruction with V9.Venkatraman Govindaraju2013-10-062-7/+22
| | | | llvm-svn: 192056
* [Sparc] Custom lower addc/adde/subc/sube on i64 in sparc64.Venkatraman Govindaraju2013-10-062-7/+55
| | | | | | This is required because i64 is a legal type but addxcc/subxcc reads icc carry bit, which are 32 bit conditional codes. llvm-svn: 192054
* [Sparc] Use addxcc/subxcc for adde/sube instead of addx/subx.Venkatraman Govindaraju2013-10-061-4/+4
| | | | | | addx/subx does not modify conditional codes whereas addxcc/subxx does. llvm-svn: 192053
* [Sparc] Use correct alignment while loading/storing fp128 values.Venkatraman Govindaraju2013-10-051-4/+13
| | | | llvm-svn: 192023
* [Sparc] Respect hasHardQuad parameter correctly when lowering SINT_TO_FP ↵Venkatraman Govindaraju2013-10-051-1/+1
| | | | | | with fp128 operand. llvm-svn: 192015
* [Sparc] Correct the floating point conditional code mapping in ↵Venkatraman Govindaraju2013-10-041-8/+8
| | | | | | GetOppositeBranchCondition(). llvm-svn: 192006
* [Sparc] Implements exception handling in SPARC with DwarfCFI.Venkatraman Govindaraju2013-09-263-4/+23
| | | | llvm-svn: 191432
* [Sparc] Use correct instruction pattern for CMPri.Venkatraman Govindaraju2013-09-221-1/+1
| | | | llvm-svn: 191180
* [Sparc] Make SPARC instructions' encoding well defined such that TableGen ↵Venkatraman Govindaraju2013-09-224-39/+70
| | | | | | can automatically generate code emitter. llvm-svn: 191168
* [Sparc] Clean up MOVcc instructions so that TableGen can encode them ↵Venkatraman Govindaraju2013-09-222-29/+105
| | | | | | correctly. No functionality change intended. llvm-svn: 191167
* [Sparc] Clean up branch instructions, so that TableGen can encode branch ↵Venkatraman Govindaraju2013-09-223-23/+26
| | | | | | conditions as well. No functionality change intended. llvm-svn: 191166
* ISelDAG: spot chain cycles involving MachineNodesTim Northover2013-09-221-1/+3
| | | | | | | | | | | | | | | | | Previously, the DAGISel function WalkChainUsers was spotting that it had entered already-selected territory by whether a node was a MachineNode (amongst other things). Since it's fairly common practice to insert MachineNodes during ISelLowering, this was not the correct check. Looking around, it seems that other nodes get their NodeId set to -1 upon selection, so this makes sure the same thing happens to all MachineNodes and uses that characteristic to determine whether we should stop looking for a loop during selection. This should fix PR15840. llvm-svn: 191165
* [Sparc] Add support for TLS in sparc.Venkatraman Govindaraju2013-09-227-10/+238
| | | | llvm-svn: 191164
* [SPARC] Make functions with GLOBAL_OFFSET_TABLE access as non-leaf functions.Venkatraman Govindaraju2013-09-221-0/+4
| | | | llvm-svn: 191160
* [Sparc] Emit .register directive to declare the use of global registers %g2, ↵Venkatraman Govindaraju2013-09-221-0/+26
| | | | | | %g4, %g6 and %g7. llvm-svn: 191158
* [Sparc] Fix lowering FABS on fp128 (long double) on pre-v9 targets.Venkatraman Govindaraju2013-09-211-6/+6
| | | | llvm-svn: 191154
* [Sparc] Correctly handle call to functions with ReturnsTwice attribute.Venkatraman Govindaraju2013-09-054-4/+46
| | | | | | | | | | | | In sparc, setjmp stores only the registers %fp, %sp, %i7 and %o7. longjmp restores the stack, and the callee-saved registers (all local/in registers: %i0-%i7, %l0-%l7) using the stored %fp and register windows. However, this does not guarantee that the longjmp will restore the registers, as they were when the setjmp was called. This is because these registers may be clobbered after returning from setjmp, but before calling longjmp. This patch prevents the registers %i0-%i5, %l0-l7 to live across the setjmp call using the register mask. llvm-svn: 190033
* [Sparc] Fix an assertion failure while lowering fcmp on long double.Venkatraman Govindaraju2013-09-041-1/+1
| | | | | | | This assertion is triggered because an integer constant is created with wrong type. llvm-svn: 189948
* [Sparc] Add support for soft long double (fp128).Venkatraman Govindaraju2013-09-033-18/+422
| | | | llvm-svn: 189780
* [Sparc] Implement spill and load for long double(f128) registers.Venkatraman Govindaraju2013-09-022-36/+123
| | | | llvm-svn: 189768
* [Sparc] Add long double (f128) instructions to sparc backend. Venkatraman Govindaraju2013-08-255-1/+250
| | | | llvm-svn: 189198
* [Sparc] Added V9's extra floating point registers and their aliases.Venkatraman Govindaraju2013-08-252-1/+58
| | | | llvm-svn: 189195
* Use register masks on SPARC call instructions.Jakob Stoklund Olesen2013-08-232-4/+14
| | | | llvm-svn: 189085
* Add an OtherPreserved field to the CalleeSaved TableGen class.Jakob Stoklund Olesen2013-08-233-2/+13
| | | | | | | | | | This field specifies registers that are preserved across function calls, but that should not be included in the generates SaveList array. This can be used ot generate regmasks for architectures that save registers through other means, like SPARC's register windows. llvm-svn: 189084
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