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* Split foldMemoryOperand into public non-virtual and protected virtualDan Gohman2008-12-032-11/+11
| | | | | | | parts, and add target-independent code to add/preserve MachineMemOperands. llvm-svn: 60488
* There are no longer any places that require aDuncan Sands2008-12-011-2/+2
| | | | | | | | MERGE_VALUES node with only one operand, so get rid of special code that only existed to handle that possibility. llvm-svn: 60349
* Move target independent td files from lib/Target/ to include/llvm/Target so ↵Evan Cheng2008-11-241-1/+1
| | | | | | they can be distributed along with the header files. llvm-svn: 59953
* Add more const qualifiers. This fixes build breakage from r59540.Dan Gohman2008-11-182-4/+6
| | | | llvm-svn: 59542
* Adds extern "C" ints to the .cpp files that use RegisterTarget, asOscar Fuentes2008-11-151-0/+8
| | | | | | | | | | | well as 2 files that use "Registrator"s. These are to be used by the MSVC builds, as the Win32 linker does not include libs that are otherwise unreferenced, even if global constructors in the lib have side-effects. Patch by Scott Graham! llvm-svn: 59378
* CMake: corrected split of Alpha and Sparc AsmPrinters.Oscar Fuentes2008-11-111-2/+1
| | | | llvm-svn: 59050
* Separate sparc asmprinter. This should unbreak the native buildAnton Korobeynikov2008-11-114-1/+27
| | | | llvm-svn: 59047
* Eliminate the ISel priority queue, which used the topological order for aDan Gohman2008-11-051-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | priority function. Instead, just iterate over the AllNodes list, which is already in topological order. This eliminates a fair amount of bookkeeping, and speeds up the isel phase by about 15% on many testcases. The impact on most targets is that AddToISelQueue calls can be simply removed. In the x86 target, there are two additional notable changes. The rule-bending AND+SHIFT optimization in MatchAddress that creates new pre-isel nodes during isel is now a little more verbose, but more robust. Instead of either creating an invalid DAG or creating an invalid topological sort, as it has historically done, it can now just insert the new nodes into the node list at a position where they will be consistent with the topological ordering. Also, the address-matching code has logic that checked to see if a node was "already selected". However, when a node is selected, it has all its uses taken away via ReplaceAllUsesWith or equivalent, so it won't recieve any further visits from MatchAddress. This code is now removed. llvm-svn: 58748
* Have TableGen emit setSubgraphColor calls under control of a -gen-debugDavid Greene2008-10-271-1/+1
| | | | | | | | flag. Then in a debugger developers can set breakpoints at these calls to see waht is about to be selected and what the resulting subgraph looks like. This really helps when debugging instruction selection. llvm-svn: 58278
* Teach DAGCombine to fold constant offsets into GlobalAddress nodes,Dan Gohman2008-10-182-0/+8
| | | | | | | | | | | | | | | | | | | | | | and add a TargetLowering hook for it to use to determine when this is legal (i.e. not in PIC mode, etc.) This allows instruction selection to emit folded constant offsets in more cases, such as the included testcase, eliminating the need for explicit arithmetic instructions. This eliminates the need for the C++ code in X86ISelDAGToDAG.cpp that attempted to achieve the same effect, but wasn't as effective. Also, fix handling of offsets in GlobalAddressSDNodes in several places, including changing GlobalAddressSDNode's offset from int to int64_t. The Mips, Alpha, Sparc, and CellSPU targets appear to be unaware of GlobalAddress offsets currently, so set the hook to false on those targets. llvm-svn: 57748
* Const-ify several TargetInstrInfo methods.Dan Gohman2008-10-162-3/+3
| | | | llvm-svn: 57622
* Rename LoadX to LoadExt.Evan Cheng2008-10-141-2/+2
| | | | llvm-svn: 57526
* Fix command-line option printing to print two spaces where needed,Dan Gohman2008-10-141-1/+1
| | | | | | | | | instead of requiring all "short description" strings to begin with two spaces. This makes these strings less mysterious, and it fixes some cases where short description strings mistakenly did not begin with two spaces. llvm-svn: 57521
* Change CALLSEQ_BEGIN and CALLSEQ_END to take TargetConstant's asChris Lattner2008-10-112-6/+5
| | | | | | | parameters instead of raw Constants. This prevents the constants from being selected by the isel pass, fixing PR2735. llvm-svn: 57385
* Fix a thinko and unbreak sparc default CCAnton Korobeynikov2008-10-101-2/+2
| | | | llvm-svn: 57368
* Extend set of return registers on sparc until someone will implement MRV ↵Anton Korobeynikov2008-10-101-3/+3
| | | | | | support there. At least, this will allow libgcc compile, however we are not ABI-compatible with stuff compiled with native gcc. llvm-svn: 57364
* Ignore extra 'r' modifier for nowAnton Korobeynikov2008-10-101-2/+9
| | | | llvm-svn: 57363
* Use expand for smul_lohi for nowAnton Korobeynikov2008-10-101-0/+1
| | | | llvm-svn: 57362
* Add rudimentary support for 'r' register operandAnton Korobeynikov2008-10-102-11/+70
| | | | llvm-svn: 57359
* CleanupAnton Korobeynikov2008-10-101-83/+82
| | | | llvm-svn: 57358
* Add rudimentary asmprinter support for printing inline asm operands for sparc.Anton Korobeynikov2008-10-101-2/+31
| | | | llvm-svn: 57346
* Add dummy 'm' inline asm constraint handler for Sparc. I'm not sure, whether ↵Anton Korobeynikov2008-10-101-0/+26
| | | | | | it is correct, however :) llvm-svn: 57345
* CleanupAnton Korobeynikov2008-10-101-12/+12
| | | | llvm-svn: 57344
* Avoid creating two TargetLowering objects for each target.Dan Gohman2008-10-034-7/+11
| | | | | | | | | | | | Instead, just create one, and make sure everything that needs it can access it. Previously most of the SelectionDAGISel subclasses all had their own TargetLowering object, which was redundant with the TargetLowering object in the TargetMachine subclasses, except on Sparc, where SparcTargetMachine didn't have a TargetLowering object. Change Sparc to work more like the other targets here. llvm-svn: 57016
* Switch the MachineOperand accessors back to the short names likeDan Gohman2008-10-033-20/+20
| | | | | | isReg, etc., from isRegister, etc. llvm-svn: 57006
* Rename isWeakForLinker to mayBeOverridden. Use itDuncan Sands2008-09-291-1/+1
| | | | | | | instead of hasWeakLinkage in a bunch of optimization passes. llvm-svn: 56782
* CMake: Builds all targets.Oscar Fuentes2008-09-261-0/+24
| | | | llvm-svn: 56641
* Move actual section printing stuff to AsmPrinter from TAI reducing heap traffic.Anton Korobeynikov2008-09-241-3/+2
| | | | llvm-svn: 56573
* Drop obsolete hook and change all usage to new interfaceAnton Korobeynikov2008-09-241-7/+1
| | | | llvm-svn: 56572
* Fix these enums' starting values to reflect the way thatDan Gohman2008-09-231-1/+1
| | | | | | instruction opcodes are now numbered. No functionality change. llvm-svn: 56497
* Make log, log2, log10, exp, exp2 use Expand byDale Johannesen2008-09-221-10/+0
| | | | | | default. llvm-svn: 56471
* Reverting r56249. On further investigation, this functionality isn't needed.Bill Wendling2008-09-162-5/+5
| | | | | | Apologies for the thrashing. llvm-svn: 56251
* - Change "ExternalSymbolSDNode" to "SymbolSDNode".Bill Wendling2008-09-162-5/+5
| | | | | | | | | | - Add linkage to SymbolSDNode (default to external). - Change ISD::ExternalSymbol to ISD::Symbol. - Change ISD::TargetExternalSymbol to ISD::TargetSymbol These changes pave the way to allowing SymbolSDNodes with non-external linkage. llvm-svn: 56249
* Remove isImm(), isReg(), and friends, in favor of Dan Gohman2008-09-131-4/+4
| | | | | | | | | isImmediate(), isRegister(), and friends, to avoid confusion about having two different names with the same meaning. I'm not attached to the longer names, and would be ok with changing to the shorter names if others prefer it. llvm-svn: 56189
* Define CallSDNode, an SDNode subclass for use with ISD::CALL.Dan Gohman2008-09-131-11/+12
| | | | | | | | | | | | | Currently it just holds the calling convention and flags for isVarArgs and isTailCall. And it has several utility methods, which eliminate magic 5+2*i and similar index computations in several places. CallSDNodes are not CSE'd. Teach UpdateNodeOperands to handle nodes that are not CSE'd gracefully. llvm-svn: 56183
* Rename ConstantSDNode::getValue to getZExtValue, for consistencyDan Gohman2008-09-123-12/+17
| | | | | | | with ConstantInt. This led to fixing a bug in TargetLowering.cpp using getValue instead of getAPIntValue. llvm-svn: 56159
* Tidy up several unbeseeming casts from pointer to intptr_t.Dan Gohman2008-09-042-2/+2
| | | | llvm-svn: 55779
* Add intrinsics for log, log2, log10, exp, exp2.Dale Johannesen2008-09-041-0/+10
| | | | | | No functional change (and no FE change to generate them). llvm-svn: 55753
* erect abstraction boundaries for accessing SDValue members, rename Val -> ↵Gabor Greif2008-08-282-10/+10
| | | | | | Node to reflect semantics llvm-svn: 55504
* Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy ↵Owen Anderson2008-08-262-5/+8
| | | | | | | | | requested was inserted or not. This allows bitcast in fast isel to properly handle the case where an appropriate reg-to-reg copy is not available. llvm-svn: 55375
* Move the point at which FastISel taps into the SelectionDAGISelDan Gohman2008-08-231-3/+3
| | | | | | | | | | | | | | | | | | process up to a higher level. This allows FastISel to leverage more of SelectionDAGISel's infastructure, such as updating Machine PHI nodes. Also, implement transitioning from SDISel back to FastISel in the middle of a block, so it's now possible to go back and forth. This allows FastISel to hand individual CallInsts and other complicated things off to SDISel to handle, while handling the rest of the block itself. To help support this, reorganize the SelectionDAG class so that it is allocated once and reused throughout a function, instead of being completely reallocated for each block. llvm-svn: 55219
* Simplify SelectRoot's interface, and factor out some common codeDan Gohman2008-08-211-1/+1
| | | | | | from all targets. llvm-svn: 55124
* Use raw_ostream throughout the AsmPrinter.Owen Anderson2008-08-214-5/+7
| | | | llvm-svn: 55092
* Add interface for section override. Use this for Sparc, since it should use ↵Anton Korobeynikov2008-08-161-0/+5
| | | | | | named BSS section. llvm-svn: 54844
* Reduce heap trashing due to std::string construction / concatenation via ↵Anton Korobeynikov2008-08-162-3/+3
| | | | | | caching of section flags string representations llvm-svn: 54842
* Convert uses of std::vector in TargetInstrInfo to SmallVector. This change ↵Owen Anderson2008-08-142-2/+2
| | | | | | had to be propoagated down into all the targets and up into all clients of this API. llvm-svn: 54802
* Properly print flags on SparcAnton Korobeynikov2008-08-081-6/+5
| | | | llvm-svn: 54543
* Use mergeable strings sections on sparcAnton Korobeynikov2008-08-081-0/+1
| | | | llvm-svn: 54541
* Handle visibility printing with all generality. Remove bunch of duplicate code.Anton Korobeynikov2008-08-081-1/+5
| | | | llvm-svn: 54540
* Use EmitAlignment consistentlyAnton Korobeynikov2008-08-071-2/+1
| | | | llvm-svn: 54456
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