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* Rename XXXGenSubtarget.inc to XXXGenSubtargetInfo.inc for consistency.Evan Cheng2011-07-014-5/+5
| | | | llvm-svn: 134281
* Rename TargetSubtarget to TargetSubtargetInfo for consistency.Evan Cheng2011-07-012-3/+3
| | | | llvm-svn: 134259
* - Added MCSubtargetInfo to capture subtarget features and schedulingEvan Cheng2011-07-012-1/+10
| | | | | | | | | itineraries. - Refactor TargetSubtarget to be based on MCSubtargetInfo. - Change tablegen generated subtarget info to initialize MCSubtargetInfo and hide more details from targets. llvm-svn: 134257
* Hide the call to InitMCInstrInfo into tblgen generated ctor.Evan Cheng2011-07-012-3/+6
| | | | llvm-svn: 134244
* Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name toEvan Cheng2011-06-304-16/+23
| | | | | | | | | | be the first encoded as the first feature. It then uses the CPU name to look up features / scheduling itineray even though clients know full well the CPU name being used to query these properties. The fix is to just have the clients explictly pass the CPU name! llvm-svn: 134127
* Remove getRegClassForInlineAsmConstraint from sparc.Eric Christopher2011-06-292-24/+0
| | | | | | Part of rdar://9643582 llvm-svn: 134083
* Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo.Evan Cheng2011-06-282-3/+3
| | | | llvm-svn: 134030
* Hide more details in tablegen generated MCRegisterInfo ctor function.Evan Cheng2011-06-281-2/+1
| | | | llvm-svn: 134027
* Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.incEvan Cheng2011-06-284-6/+9
| | | | llvm-svn: 134024
* - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo andEvan Cheng2011-06-281-1/+1
| | | | | | | | sink them into MC layer. - Added MCInstrInfo, which captures the tablegen generated static data. Chang TargetInstrInfo so it's based off MCInstrInfo. llvm-svn: 134021
* Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.incEvan Cheng2011-06-275-9/+10
| | | | | | into XXXGenRegisterInfo.inc. llvm-svn: 133922
* Starting to refactor Target to separate out code that's needed to fully describeEvan Cheng2011-06-243-7/+9
| | | | | | | | | | | | target machine from those that are only needed by codegen. The goal is to sink the essential target description into MC layer so we can start building MC based tools without needing to link in the entire codegen. First step is to refactor TargetRegisterInfo. This patch added a base class MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to separate register description from the rest of the stuff. llvm-svn: 133782
* Use set operations instead of plain lists to enumerate register classes.Jakob Stoklund Olesen2011-06-151-18/+16
| | | | | | | | | | | | This simplifies many of the target description files since it is common for register classes to be related or contain sequences of numbered registers. I have verified that this doesn't change the files generated by TableGen for ARM and X86. It alters the allocation order of MBlaze GPR and Mips FGR32 registers, but I believe the change is benign. llvm-svn: 133105
* Remove custom allocation order boilerplate that is no longer needed.Jakob Stoklund Olesen2011-06-092-15/+3
| | | | | | | | | | | | | | | | | | | | The register allocators automatically filter out reserved registers and place the callee saved registers last in the allocation order, so custom methods are no longer necessary just for that. Some targets still use custom allocation orders: ARM/Thumb: The high registers are removed from GPR in thumb mode. The NEON allocation orders prefer to use non-VFP2 registers first. X86: The GR8 classes omit AH-DH in x86-64 mode to avoid REX trouble. SystemZ: Some of the allocation orders are omitting R12 aliases without explanation. I don't understand this target well enough to fix that. It looks like all the boilerplate could be removed by reserving the right registers. llvm-svn: 132781
* Add a parameter to CCState so that it can access the MachineFunction.Eric Christopher2011-06-081-9/+9
| | | | | | | | No functional change. Part of PR6965 llvm-svn: 132763
* Use the dwarf->llvm mapping to print register names in the cfiRafael Espindola2011-05-302-0/+5
| | | | | | | | directives. Fixes PR9826. llvm-svn: 132317
* Fix to match the dwarf register numbers that gdb uses.Rafael Espindola2011-05-291-16/+16
| | | | llvm-svn: 132278
* Make the logic for determining function alignment more explicit. No ↵Eli Friedman2011-05-062-8/+2
| | | | | | functionality change. llvm-svn: 131012
* Remove unused variables caught by GCC's -Wunused-but-set-variable.Benjamin Kramer2011-05-031-2/+0
| | | | llvm-svn: 130755
* Fix a ton of comment typos found by codespell. Patch byChris Lattner2011-04-151-1/+1
| | | | | | Luis Felipe Strano Moraes! llvm-svn: 129558
* Revert r124611 - "Keep track of incoming argument's location while emitting ↵Devang Patel2011-02-211-1/+1
| | | | | | | | | | | LiveIns." In other words, do not keep track of argument's location. The debugger (gdb) is not prepared to see line table entries for arguments. For the debugger, "second" line table entry marks beginning of function body. This requires some coordination with debugger to get this working. - The debugger needs to be aware of prolog_end attribute attached with line table entries. - The compiler needs to accurately mark prolog_end in line table entries (at -O0 and at -O1+) llvm-svn: 126155
* Generate correct Sparc32 ABI compliant code for functions that return a struct.Venkatraman Govindaraju2011-02-214-8/+84
| | | | llvm-svn: 126108
* Use explicit add_subdirectory's for LLVM target sublibraries insteadOscar Fuentes2011-02-201-0/+2
| | | | | | | | | of testing for its presence at cmake time. This way the build automatically regenerates the makefiles when a svn update brings in a new sublibrary. llvm-svn: 126068
* Swap VT and DebugLoc operands of getExtLoad() for consistency withStuart Hastings2011-02-161-1/+1
| | | | | | other getNode() methods. Radar 9002173. llvm-svn: 125665
* Prevent IMPLICIT_DEF/KILL to become a delay filler instruction in SPARC backend.Venkatraman Govindaraju2011-02-121-0/+3
| | | | llvm-svn: 125444
* Keep track of incoming argument's location while emitting LiveIns.Devang Patel2011-01-311-1/+1
| | | | llvm-svn: 124611
* Pass sret arguments through the stack instead of through registers in Sparc ↵Venkatraman Govindaraju2011-01-223-4/+75
| | | | | | backend. It makes the code generated more compliant with the sparc32 ABI. llvm-svn: 124030
* Added ICC, FCC as uses of movcc instruction to generate correct code when ↵Venkatraman Govindaraju2011-01-221-42/+51
| | | | | | -mattr=v9 is used. llvm-svn: 124027
* Sparc backend: Venkatraman Govindaraju2011-01-213-23/+28
| | | | | | | Rename FLUSH to FLUSHW. Output "ta 3" instead of a "flushw" instruction if v8 instruction set is used. llvm-svn: 123997
* Implement support for byval arguments in Sparc backend.Venkatraman Govindaraju2011-01-211-1/+31
| | | | llvm-svn: 123974
* Sparc backend: Implements a delay slot filler that attempt to fill delay slotsVenkatraman Govindaraju2011-01-202-8/+225
| | | | | | with useful instructions. llvm-svn: 123884
* SPARC backend: Modified LowerCall and LowerFormalArguments so that they use ↵Venkatraman Govindaraju2011-01-182-272/+221
| | | | | | CallingConv assignments. llvm-svn: 123749
* Implement AnalyzeBranch in Sparc Backend.Venkatraman Govindaraju2011-01-162-7/+199
| | | | llvm-svn: 123561
* Teach frame lowering to ignore debug values after the terminators.Jakob Stoklund Olesen2011-01-131-1/+1
| | | | llvm-svn: 123399
* Implement RETURNADDR and FRAMEADDR lowering in SPARC backend.Venkatraman Govindaraju2011-01-123-4/+85
| | | | llvm-svn: 123310
* Remove SPARC backend getpcx instruction's Uses. Also, insert an assert to Venkatraman Govindaraju2011-01-122-3/+5
| | | | | | ensure %o7 is not assigned as the destination of getpcx instruction. llvm-svn: 123304
* Fix SPARC backend call instruction so that arguments passed through registersVenkatraman Govindaraju2011-01-122-11/+24
| | | | | | | are correctly marked as used instead of passing all possible argument registers as used. llvm-svn: 123301
* SPARC backend: correct ICC/FCC uses for ADDX and SELECT_CCVenkatraman Govindaraju2011-01-111-15/+19
| | | | llvm-svn: 123281
* Update CMake stuffAnton Korobeynikov2011-01-101-1/+1
| | | | llvm-svn: 123171
* Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs ↵Anton Korobeynikov2011-01-104-15/+17
| | | | | | and fixes here and there. llvm-svn: 123170
* SPARC backend fix: correctly passing arguments through stackVenkatraman Govindaraju2010-12-291-23/+51
| | | | llvm-svn: 122626
* Multiple SPARC backend fixes: added Y register; updated select_cc, subx, ↵Venkatraman Govindaraju2010-12-283-21/+35
| | | | | | | | subxcc defs/uses; and fixed CustomInserter. llvm-svn: 122607
* Flag -> Glue, the ongoing sagaChris Lattner2010-12-231-10/+10
| | | | llvm-svn: 122513
* rename MVT::Flag to MVT::Glue. "Flag" is a terrible name forChris Lattner2010-12-212-7/+7
| | | | | | | something that just glues two nodes together, even if it is sometimes used for flags. llvm-svn: 122310
* Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept.Wesley Peck2010-11-231-19/+19
| | | | llvm-svn: 119990
* Move hasFP() and few related hooks to TargetFrameInfo.Anton Korobeynikov2010-11-183-6/+2
| | | | llvm-svn: 119740
* Attempt to unbreak cmake-based buildsAnton Korobeynikov2010-11-151-0/+1
| | | | llvm-svn: 119098
* First step of huge frame-related refactoring: move emit{Prologue,Epilogue} ↵Anton Korobeynikov2010-11-156-62/+130
| | | | | | out of TargetRegisterInfo to TargetFrameInfo, which is definitely much better suitable place llvm-svn: 119097
* move all the target's asmprinters into the main target. The piece Chris Lattner2010-11-145-22/+2
| | | | | | | that should be split out is the InstPrinter (if a target is mc'ized). This change makes all the targets be consistent. llvm-svn: 119056
* Inside the calling convention logic LocVT is always a simpleDuncan Sands2010-11-031-1/+1
| | | | | | | | | | value type, so there is no point in passing it around using an EVT. Use the simpler MVT everywhere. Rather than trying to propagate this information maximally in all the code that using the calling convention stuff, I chose to do a mainly low impact change instead. llvm-svn: 118167
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