summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/Sparc/SparcRegisterInfo.cpp
Commit message (Collapse)AuthorAgeFilesLines
* Move hasFP() and few related hooks to TargetFrameInfo.Anton Korobeynikov2010-11-181-4/+0
| | | | llvm-svn: 119740
* First step of huge frame-related refactoring: move emit{Prologue,Epilogue} ↵Anton Korobeynikov2010-11-151-49/+0
| | | | | | out of TargetRegisterInfo to TargetFrameInfo, which is definitely much better suitable place llvm-svn: 119097
* Simplify eliminateFrameIndex() interface back down now that PEI doesn't needJim Grosbach2010-08-261-4/+2
| | | | | | to try to re-use scavenged frame index reference registers. rdar://8277890 llvm-svn: 112241
* cleanupRafael Espindola2010-06-021-7/+0
| | | | llvm-svn: 105322
* use DebugLoc default ctor instead of DebugLoc::getUnknownLoc()Chris Lattner2010-04-021-2/+1
| | | | llvm-svn: 100214
* Change the Value argument to eliminateFrameIndex to a type-tagged value. ThisJim Grosbach2010-03-091-1/+1
| | | | | | | | | | is preparatory to having PEI's scavenged frame index value reuse logic properly distinguish types of frame values (e.g., whether the value is stack-pointer relative or frame-pointer relative). No functionality change. llvm-svn: 98086
* Make the MachineFunction argument of getFrameRegister const.David Greene2009-11-121-1/+1
| | | | | | This also fixes a build error. llvm-svn: 87027
* Add register-reuse to frame-index register scavenging. When a target usesJim Grosbach2009-10-071-2/+5
| | | | | | | | | | | | | | | | | | | | a virtual register to eliminate a frame index, it can return that register and the constant stored there to PEI to track. When scavenging to allocate for those registers, PEI then tracks the last-used register and value, and if it is still available and matches the value for the next index, reuses the existing value rather and removes the re-materialization instructions. Fancier tracking and adjustment of scavenger allocations to keep more values live for longer is possible, but not yet implemented and would likely be better done via a different, less special-purpose, approach to the problem. eliminateFrameIndex() is modified so the target implementations can return the registers they wish to be tracked for reuse. ARM Thumb1 implements and utilizes the new mechanism. All other targets are simply modified to adjust for the changed eliminateFrameIndex() prototype. llvm-svn: 83467
* Add source debug information to the Sparc code generator.Richard Pennington2009-09-081-6/+3
| | | | llvm-svn: 81215
* llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.Torok Edwin2009-07-141-5/+5
| | | | | | | | | This adds location info for all llvm_unreachable calls (which is a macro now) in !NDEBUG builds. In NDEBUG builds location info and the message is off (it only prints "UREACHABLE executed"). llvm-svn: 75640
* assert(0) -> LLVM_UNREACHABLE.Torok Edwin2009-07-111-5/+6
| | | | | | | | | Make llvm_unreachable take an optional string, thus moving the cerr<< out of line. LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for NDEBUG builds. llvm-svn: 75379
* Propagate debug loc info through prologue/epilogue.Bill Wendling2009-02-231-8/+10
| | | | llvm-svn: 65298
* Remove non-DebugLoc versions of buildMI from Sparc.Dale Johannesen2009-02-131-8/+12
| | | | llvm-svn: 64435
* Switch the MachineOperand accessors back to the short names likeDan Gohman2008-10-031-1/+1
| | | | | | isReg, etc., from isRegister, etc. llvm-svn: 57006
* Emit saveri with the correct operand order, patch by Richard Pennington!Chris Lattner2008-08-031-1/+1
| | | | llvm-svn: 54313
* Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo.Evan Cheng2008-03-311-9/+0
| | | | llvm-svn: 48995
* Rename MRegisterInfo to TargetRegisterInfo.Dan Gohman2008-02-101-1/+1
| | | | llvm-svn: 46930
* Move even more functionality from MRegisterInfo into TargetInstrInfo.Owen Anderson2008-01-071-38/+0
| | | | | | Some day I'll get it all moved over... llvm-svn: 45672
* Move some more instruction creation methods from RegisterInfo into InstrInfo.Owen Anderson2008-01-011-92/+0
| | | | llvm-svn: 45484
* Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of theOwen Anderson2007-12-311-21/+0
| | | | | | Machine-level API cleanup instigated by Chris. llvm-svn: 45470
* Add new shorter predicates for testing machine operands for various types: Chris Lattner2007-12-301-7/+11
| | | | | | | | | | | | e.g. MO.isMBB() instead of MO.isMachineBasicBlock(). I don't plan on switching everything over, so new clients should just start using the shorter names. Remove old long accessors, switching everything over to use the short accessor: getMachineBasicBlock() -> getMBB(), getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc. llvm-svn: 45464
* Use MachineOperand::getImm instead of MachineOperand::getImmedValue. ↵Chris Lattner2007-12-301-4/+4
| | | | | | Likewise setImmedValue -> setImm llvm-svn: 45453
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+2
| | | | llvm-svn: 45418
* Add a argument to storeRegToStackSlot and storeRegToAddr to specify whetherEvan Cheng2007-12-051-5/+6
| | | | | | the stored register is killed. llvm-svn: 44600
* Remove redundant foldMemoryOperand variants and other code clean up.Evan Cheng2007-12-021-2/+5
| | | | llvm-svn: 44517
* Add parameter to getDwarfRegNum to permit targetsDale Johannesen2007-11-131-1/+1
| | | | | | | | to use different mappings for EH and debug info; no functional change yet. Fix warning in X86CodeEmitter. llvm-svn: 44056
* Use TableGen to emit information for dwarf register numbers. Anton Korobeynikov2007-11-111-0/+5
| | | | | | | | This makes DwarfRegNum to accept list of numbers instead. Added three different "flavours", but only slightly tested on x86-32/linux. Please check another subtargets if possible, llvm-svn: 43997
* - Added getOpcodeAfterMemoryUnfold(). It doesn't unfold an instruction, but ↵Evan Cheng2007-10-181-2/+2
| | | | | | | | only returns the opcode of the instruction post unfolding. - Fix some copy+paste bugs. llvm-svn: 43153
* Use SmallVectorImpl instead of SmallVector with hardcoded size in MRegister ↵Evan Cheng2007-10-181-4/+4
| | | | | | public interface. llvm-svn: 43150
* - Added a few target hooks to generate load / store instructions from / to anyEvan Cheng2007-10-051-0/+55
| | | | | | | | address (not just from / to frameindexes). - Added target hooks to unfold load / store instructions / SDNodes into separate load, data processing, store instructions / SDNodes. llvm-svn: 42621
* Allow copyRegToReg to emit cross register classes copies.Evan Cheng2007-09-261-4/+10
| | | | | | Tested with "make check"! llvm-svn: 42346
* Long live the exception handling!Anton Korobeynikov2007-07-141-2/+3
| | | | | | | | | | | | | | | This patch fills the last necessary bits to enable exceptions handling in LLVM. Currently only on x86-32/linux. In fact, this patch adds necessary intrinsics (and their lowering) which represent really weird target-specific gcc builtins used inside unwinder. After corresponding llvm-gcc patch will land (easy) exceptions should be more or less workable. However, exceptions handling support should not be thought as 'finished': I expect many small and not so small glitches everywhere. llvm-svn: 39855
* eliminateFrameIndex() change.Evan Cheng2007-05-011-1/+3
| | | | llvm-svn: 36626
* Added MRegisterInfo hook to re-materialize an instruction.Evan Cheng2007-03-201-0/+9
| | | | llvm-svn: 35205
* PEI now passes a RegScavenger ptr to eliminateFrameIndex.Evan Cheng2007-02-281-2/+2
| | | | llvm-svn: 34707
* By default, spills kills the register being stored.Evan Cheng2007-02-231-3/+3
| | | | llvm-svn: 34515
* Support to provide exception and selector registers.Jim Laskey2007-02-211-0/+10
| | | | llvm-svn: 34482
* Re-apply my liveintervalanalysis changes. Now with PR1207 fixes.Evan Cheng2007-02-191-0/+17
| | | | llvm-svn: 34428
* For PR1207:Reid Spencer2007-02-191-17/+0
| | | | | | | Revert patches that caused the problem. Evan, please investigate and reapply when you've discovered the problem. llvm-svn: 34399
* Added getReservedRegs().Evan Cheng2007-02-171-0/+17
| | | | llvm-svn: 34376
* hasFP() is now a virtual method of MRegisterInfo.Evan Cheng2007-01-231-0/+3
| | | | llvm-svn: 33455
* Fix naming inconsistency.Evan Cheng2007-01-021-6/+6
| | | | llvm-svn: 32823
* What should be the last unnecessary <iostream>s in the library.Bill Wendling2006-12-071-1/+0
| | | | llvm-svn: 32333
* Change MachineInstr ctor's to take a TargetInstrDescriptor reference insteadEvan Cheng2006-11-271-24/+29
| | | | | | of opcode and number of operands. llvm-svn: 31947
* Properly transfer kill / dead info.Evan Cheng2006-11-151-5/+9
| | | | llvm-svn: 31765
* Matches MachineInstr changes.Evan Cheng2006-11-131-6/+7
| | | | llvm-svn: 31712
* Completely eliminate def&use operands. Now a register operand is EITHER aChris Lattner2006-09-051-2/+2
| | | | | | def operand or a use operand. llvm-svn: 30109
* getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd.Evan Cheng2006-05-181-0/+12
| | | | llvm-svn: 28378
* Move some methods out of MachineInstr into MachineOperandChris Lattner2006-05-041-5/+4
| | | | llvm-svn: 28102
* There shalt be only one "immediate" operand type!Chris Lattner2006-05-041-3/+3
| | | | llvm-svn: 28099
OpenPOWER on IntegriCloud