Commit message (Collapse) | Author | Age | Files | Lines | ||
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* | Emit saveri with the correct operand order, patch by Richard Pennington! | Chris Lattner | 2008-08-03 | 1 | -1/+1 | |
| | | | | llvm-svn: 54313 | |||||
* | Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo. | Evan Cheng | 2008-03-31 | 1 | -9/+0 | |
| | | | | llvm-svn: 48995 | |||||
* | Rename MRegisterInfo to TargetRegisterInfo. | Dan Gohman | 2008-02-10 | 1 | -1/+1 | |
| | | | | llvm-svn: 46930 | |||||
* | Move even more functionality from MRegisterInfo into TargetInstrInfo. | Owen Anderson | 2008-01-07 | 1 | -38/+0 | |
| | | | | | | Some day I'll get it all moved over... llvm-svn: 45672 | |||||
* | Move some more instruction creation methods from RegisterInfo into InstrInfo. | Owen Anderson | 2008-01-01 | 1 | -92/+0 | |
| | | | | llvm-svn: 45484 | |||||
* | Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the | Owen Anderson | 2007-12-31 | 1 | -21/+0 | |
| | | | | | | Machine-level API cleanup instigated by Chris. llvm-svn: 45470 | |||||
* | Add new shorter predicates for testing machine operands for various types: | Chris Lattner | 2007-12-30 | 1 | -7/+11 | |
| | | | | | | | | | | | | e.g. MO.isMBB() instead of MO.isMachineBasicBlock(). I don't plan on switching everything over, so new clients should just start using the shorter names. Remove old long accessors, switching everything over to use the short accessor: getMachineBasicBlock() -> getMBB(), getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc. llvm-svn: 45464 | |||||
* | Use MachineOperand::getImm instead of MachineOperand::getImmedValue. ↵ | Chris Lattner | 2007-12-30 | 1 | -4/+4 | |
| | | | | | | Likewise setImmedValue -> setImm llvm-svn: 45453 | |||||
* | Remove attribution from file headers, per discussion on llvmdev. | Chris Lattner | 2007-12-29 | 1 | -2/+2 | |
| | | | | llvm-svn: 45418 | |||||
* | Add a argument to storeRegToStackSlot and storeRegToAddr to specify whether | Evan Cheng | 2007-12-05 | 1 | -5/+6 | |
| | | | | | | the stored register is killed. llvm-svn: 44600 | |||||
* | Remove redundant foldMemoryOperand variants and other code clean up. | Evan Cheng | 2007-12-02 | 1 | -2/+5 | |
| | | | | llvm-svn: 44517 | |||||
* | Add parameter to getDwarfRegNum to permit targets | Dale Johannesen | 2007-11-13 | 1 | -1/+1 | |
| | | | | | | | | to use different mappings for EH and debug info; no functional change yet. Fix warning in X86CodeEmitter. llvm-svn: 44056 | |||||
* | Use TableGen to emit information for dwarf register numbers. | Anton Korobeynikov | 2007-11-11 | 1 | -0/+5 | |
| | | | | | | | | This makes DwarfRegNum to accept list of numbers instead. Added three different "flavours", but only slightly tested on x86-32/linux. Please check another subtargets if possible, llvm-svn: 43997 | |||||
* | - Added getOpcodeAfterMemoryUnfold(). It doesn't unfold an instruction, but ↵ | Evan Cheng | 2007-10-18 | 1 | -2/+2 | |
| | | | | | | | | only returns the opcode of the instruction post unfolding. - Fix some copy+paste bugs. llvm-svn: 43153 | |||||
* | Use SmallVectorImpl instead of SmallVector with hardcoded size in MRegister ↵ | Evan Cheng | 2007-10-18 | 1 | -4/+4 | |
| | | | | | | public interface. llvm-svn: 43150 | |||||
* | - Added a few target hooks to generate load / store instructions from / to any | Evan Cheng | 2007-10-05 | 1 | -0/+55 | |
| | | | | | | | | address (not just from / to frameindexes). - Added target hooks to unfold load / store instructions / SDNodes into separate load, data processing, store instructions / SDNodes. llvm-svn: 42621 | |||||
* | Allow copyRegToReg to emit cross register classes copies. | Evan Cheng | 2007-09-26 | 1 | -4/+10 | |
| | | | | | | Tested with "make check"! llvm-svn: 42346 | |||||
* | Long live the exception handling! | Anton Korobeynikov | 2007-07-14 | 1 | -2/+3 | |
| | | | | | | | | | | | | | | | This patch fills the last necessary bits to enable exceptions handling in LLVM. Currently only on x86-32/linux. In fact, this patch adds necessary intrinsics (and their lowering) which represent really weird target-specific gcc builtins used inside unwinder. After corresponding llvm-gcc patch will land (easy) exceptions should be more or less workable. However, exceptions handling support should not be thought as 'finished': I expect many small and not so small glitches everywhere. llvm-svn: 39855 | |||||
* | eliminateFrameIndex() change. | Evan Cheng | 2007-05-01 | 1 | -1/+3 | |
| | | | | llvm-svn: 36626 | |||||
* | Added MRegisterInfo hook to re-materialize an instruction. | Evan Cheng | 2007-03-20 | 1 | -0/+9 | |
| | | | | llvm-svn: 35205 | |||||
* | PEI now passes a RegScavenger ptr to eliminateFrameIndex. | Evan Cheng | 2007-02-28 | 1 | -2/+2 | |
| | | | | llvm-svn: 34707 | |||||
* | By default, spills kills the register being stored. | Evan Cheng | 2007-02-23 | 1 | -3/+3 | |
| | | | | llvm-svn: 34515 | |||||
* | Support to provide exception and selector registers. | Jim Laskey | 2007-02-21 | 1 | -0/+10 | |
| | | | | llvm-svn: 34482 | |||||
* | Re-apply my liveintervalanalysis changes. Now with PR1207 fixes. | Evan Cheng | 2007-02-19 | 1 | -0/+17 | |
| | | | | llvm-svn: 34428 | |||||
* | For PR1207: | Reid Spencer | 2007-02-19 | 1 | -17/+0 | |
| | | | | | | | Revert patches that caused the problem. Evan, please investigate and reapply when you've discovered the problem. llvm-svn: 34399 | |||||
* | Added getReservedRegs(). | Evan Cheng | 2007-02-17 | 1 | -0/+17 | |
| | | | | llvm-svn: 34376 | |||||
* | hasFP() is now a virtual method of MRegisterInfo. | Evan Cheng | 2007-01-23 | 1 | -0/+3 | |
| | | | | llvm-svn: 33455 | |||||
* | Fix naming inconsistency. | Evan Cheng | 2007-01-02 | 1 | -6/+6 | |
| | | | | llvm-svn: 32823 | |||||
* | What should be the last unnecessary <iostream>s in the library. | Bill Wendling | 2006-12-07 | 1 | -1/+0 | |
| | | | | llvm-svn: 32333 | |||||
* | Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead | Evan Cheng | 2006-11-27 | 1 | -24/+29 | |
| | | | | | | of opcode and number of operands. llvm-svn: 31947 | |||||
* | Properly transfer kill / dead info. | Evan Cheng | 2006-11-15 | 1 | -5/+9 | |
| | | | | llvm-svn: 31765 | |||||
* | Matches MachineInstr changes. | Evan Cheng | 2006-11-13 | 1 | -6/+7 | |
| | | | | llvm-svn: 31712 | |||||
* | Completely eliminate def&use operands. Now a register operand is EITHER a | Chris Lattner | 2006-09-05 | 1 | -2/+2 | |
| | | | | | | def operand or a use operand. llvm-svn: 30109 | |||||
* | getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd. | Evan Cheng | 2006-05-18 | 1 | -0/+12 | |
| | | | | llvm-svn: 28378 | |||||
* | Move some methods out of MachineInstr into MachineOperand | Chris Lattner | 2006-05-04 | 1 | -5/+4 | |
| | | | | llvm-svn: 28102 | |||||
* | There shalt be only one "immediate" operand type! | Chris Lattner | 2006-05-04 | 1 | -3/+3 | |
| | | | | llvm-svn: 28099 | |||||
* | Foundation for call frame information. | Jim Laskey | 2006-04-07 | 1 | -1/+7 | |
| | | | | llvm-svn: 27491 | |||||
* | Expose base register for DwarfWriter. Refactor code accordingly. | Jim Laskey | 2006-03-28 | 1 | -9/+2 | |
| | | | | llvm-svn: 27225 | |||||
* | Translate llvm target registers to dwarf register numbers properly. | Jim Laskey | 2006-03-27 | 1 | -1/+1 | |
| | | | | llvm-svn: 27180 | |||||
* | Add support to locate local variables in frames (early version.) | Jim Laskey | 2006-03-23 | 1 | -0/+12 | |
| | | | | llvm-svn: 26994 | |||||
* | Rename SPARC V8 target to be the LLVM SPARC target. | Chris Lattner | 2006-02-05 | 1 | -0/+203 | |
llvm-svn: 25985 |