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path: root/llvm/lib/Target/Sparc/SparcRegisterInfo.cpp
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* Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVMDaniel Sanders2019-08-151-6/+6
* CodeGen: Introduce a class for registersMatt Arsenault2019-06-241-1/+1
* [Sparc] Fix typo. NFC.Jim Lin2019-04-151-2/+2
* [Sparc] Fix incorrect MI insertion position for spilling f128.Jim Lin2019-04-101-2/+2
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [Sparc] Add support for the cycle counter available in GR740Daniel Cederman2018-08-271-0/+4
* Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layeringDavid Blaikie2017-11-081-1/+1
* Pass DebugLoc and SDLoc by const ref.Benjamin Kramer2016-06-121-7/+3
* [Sparc] Support user-specified stack object overalignment.James Y Knight2015-08-211-18/+35
* [Sparc] Implement i64 load/store support for 32-bit sparc.James Y Knight2015-08-101-1/+12
* Remove the need to cache the subtarget in the Sparc TargetRegisterInfoEric Christopher2015-03-121-5/+6
* Have getCallPreservedMask and getThisCallPreservedMask take aEric Christopher2015-03-111-2/+3
* Have MachineFunction cache a pointer to the subtarget to make lookupsEric Christopher2014-08-051-6/+3
* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-3/+6
* [cleanup] Lift using directives, DEBUG_TYPE definitions, and even someChandler Carruth2014-04-221-2/+2
* Make consistent use of MCPhysReg instead of uint16_t throughout the tree.Craig Topper2014-04-041-2/+2
* [Sparc] Set %o7 as the return address register instead of %i7 in MCRegisterIn...Venkatraman Govindaraju2014-02-011-1/+1
* [Sparc] Emit large negative adjustments to SP/FP with sethi+xor instead of se...Venkatraman Govindaraju2013-11-241-7/+34
* Remove getEHExceptionRegister and getEHHandlerRegister.Rafael Espindola2013-10-071-7/+0
* [Sparc] Correctly handle call to functions with ReturnsTwice attribute.Venkatraman Govindaraju2013-09-051-0/+5
* [Sparc] Implement spill and load for long double(f128) registers.Venkatraman Govindaraju2013-09-021-18/+59
* [Sparc] Added V9's extra floating point registers and their aliases.Venkatraman Govindaraju2013-08-251-0/+9
* Add an OtherPreserved field to the CalleeSaved TableGen class.Jakob Stoklund Olesen2013-08-231-2/+6
* Don't cache the instruction and register info from the TargetMachine, becauseBill Wendling2013-06-071-3/+3
* Sparc: No functionality change. Cleanup whitespaces, comment formatting etc.,Venkatraman Govindaraju2013-06-041-4/+4
* [Sparc] Generate correct code for leaf functions with stack objects Venkatraman Govindaraju2013-06-011-1/+8
* [Sparc] Add support for leaf functions in sparc backend. Venkatraman Govindaraju2013-05-291-3/+5
* [Sparc] Rearrange integer registers' allocation order so that register alloca...Venkatraman Govindaraju2013-05-191-4/+16
* SPARC v9 stack pointer bias.Jakob Stoklund Olesen2013-04-061-2/+3
* Add an I64Regs register class for 64-bit registers.Jakob Stoklund Olesen2013-04-021-0/+6
* Move the eliminateCallFramePseudoInstr method from TargetRegisterInfoEli Bendersky2013-02-211-13/+0
* [PEI] Pass the frame index operand number to the eliminateFrameIndex function.Chad Rosier2013-01-311-13/+8
* Move all of the header files which are involved in modelling the LLVM IRChandler Carruth2013-01-021-1/+1
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-031-5/+5
* Remove empty overrides of processFunctionBeforeFrameFinalized().Roman Divacky2012-08-061-3/+0
* Reorder includes in Target backends to following coding standards. Remove som...Craig Topper2012-03-171-2/+2
* Use uint16_t to store registers in callee saved register tables to reduce siz...Craig Topper2012-03-041-2/+2
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...Jia Liu2012-02-181-1/+1
* More dead code removal (using -Wunreachable-code)David Blaikie2012-01-201-2/+0
* Move getInitialFrameState from TargetFrameInfo to MCAsmInfo (suggestions forEvan Cheng2011-07-181-1/+0
* Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo downEvan Cheng2011-07-181-13/+1
* Next round of MC refactoring. This patch factor MC table instantiations, MCEvan Cheng2011-07-141-1/+0
* Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo.Evan Cheng2011-06-281-2/+1
* Hide more details in tablegen generated MCRegisterInfo ctor function.Evan Cheng2011-06-281-2/+1
* Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.incEvan Cheng2011-06-271-1/+4
* Starting to refactor Target to separate out code that's needed to fully describeEvan Cheng2011-06-241-4/+4
* Remove custom allocation order boilerplate that is no longer needed.Jakob Stoklund Olesen2011-06-091-0/+2
* Use the dwarf->llvm mapping to print register names in the cfiRafael Espindola2011-05-301-0/+4
* Move hasFP() and few related hooks to TargetFrameInfo.Anton Korobeynikov2010-11-181-4/+0
* First step of huge frame-related refactoring: move emit{Prologue,Epilogue} ou...Anton Korobeynikov2010-11-151-49/+0
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