| Commit message (Expand) | Author | Age | Files | Lines |
* | Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM | Daniel Sanders | 2019-08-15 | 1 | -6/+6 |
* | CodeGen: Introduce a class for registers | Matt Arsenault | 2019-06-24 | 1 | -1/+1 |
* | [Sparc] Fix typo. NFC. | Jim Lin | 2019-04-15 | 1 | -2/+2 |
* | [Sparc] Fix incorrect MI insertion position for spilling f128. | Jim Lin | 2019-04-10 | 1 | -2/+2 |
* | Update the file headers across all of the LLVM projects in the monorepo | Chandler Carruth | 2019-01-19 | 1 | -4/+3 |
* | [Sparc] Add support for the cycle counter available in GR740 | Daniel Cederman | 2018-08-27 | 1 | -0/+4 |
* | Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layering | David Blaikie | 2017-11-08 | 1 | -1/+1 |
* | Pass DebugLoc and SDLoc by const ref. | Benjamin Kramer | 2016-06-12 | 1 | -7/+3 |
* | [Sparc] Support user-specified stack object overalignment. | James Y Knight | 2015-08-21 | 1 | -18/+35 |
* | [Sparc] Implement i64 load/store support for 32-bit sparc. | James Y Knight | 2015-08-10 | 1 | -1/+12 |
* | Remove the need to cache the subtarget in the Sparc TargetRegisterInfo | Eric Christopher | 2015-03-12 | 1 | -5/+6 |
* | Have getCallPreservedMask and getThisCallPreservedMask take a | Eric Christopher | 2015-03-11 | 1 | -2/+3 |
* | Have MachineFunction cache a pointer to the subtarget to make lookups | Eric Christopher | 2014-08-05 | 1 | -6/+3 |
* | Remove the TargetMachine forwards for TargetSubtargetInfo based | Eric Christopher | 2014-08-04 | 1 | -3/+6 |
* | [cleanup] Lift using directives, DEBUG_TYPE definitions, and even some | Chandler Carruth | 2014-04-22 | 1 | -2/+2 |
* | Make consistent use of MCPhysReg instead of uint16_t throughout the tree. | Craig Topper | 2014-04-04 | 1 | -2/+2 |
* | [Sparc] Set %o7 as the return address register instead of %i7 in MCRegisterIn... | Venkatraman Govindaraju | 2014-02-01 | 1 | -1/+1 |
* | [Sparc] Emit large negative adjustments to SP/FP with sethi+xor instead of se... | Venkatraman Govindaraju | 2013-11-24 | 1 | -7/+34 |
* | Remove getEHExceptionRegister and getEHHandlerRegister. | Rafael Espindola | 2013-10-07 | 1 | -7/+0 |
* | [Sparc] Correctly handle call to functions with ReturnsTwice attribute. | Venkatraman Govindaraju | 2013-09-05 | 1 | -0/+5 |
* | [Sparc] Implement spill and load for long double(f128) registers. | Venkatraman Govindaraju | 2013-09-02 | 1 | -18/+59 |
* | [Sparc] Added V9's extra floating point registers and their aliases. | Venkatraman Govindaraju | 2013-08-25 | 1 | -0/+9 |
* | Add an OtherPreserved field to the CalleeSaved TableGen class. | Jakob Stoklund Olesen | 2013-08-23 | 1 | -2/+6 |
* | Don't cache the instruction and register info from the TargetMachine, because | Bill Wendling | 2013-06-07 | 1 | -3/+3 |
* | Sparc: No functionality change. Cleanup whitespaces, comment formatting etc., | Venkatraman Govindaraju | 2013-06-04 | 1 | -4/+4 |
* | [Sparc] Generate correct code for leaf functions with stack objects | Venkatraman Govindaraju | 2013-06-01 | 1 | -1/+8 |
* | [Sparc] Add support for leaf functions in sparc backend. | Venkatraman Govindaraju | 2013-05-29 | 1 | -3/+5 |
* | [Sparc] Rearrange integer registers' allocation order so that register alloca... | Venkatraman Govindaraju | 2013-05-19 | 1 | -4/+16 |
* | SPARC v9 stack pointer bias. | Jakob Stoklund Olesen | 2013-04-06 | 1 | -2/+3 |
* | Add an I64Regs register class for 64-bit registers. | Jakob Stoklund Olesen | 2013-04-02 | 1 | -0/+6 |
* | Move the eliminateCallFramePseudoInstr method from TargetRegisterInfo | Eli Bendersky | 2013-02-21 | 1 | -13/+0 |
* | [PEI] Pass the frame index operand number to the eliminateFrameIndex function. | Chad Rosier | 2013-01-31 | 1 | -13/+8 |
* | Move all of the header files which are involved in modelling the LLVM IR | Chandler Carruth | 2013-01-02 | 1 | -1/+1 |
* | Use the new script to sort the includes of every file under lib. | Chandler Carruth | 2012-12-03 | 1 | -5/+5 |
* | Remove empty overrides of processFunctionBeforeFrameFinalized(). | Roman Divacky | 2012-08-06 | 1 | -3/+0 |
* | Reorder includes in Target backends to following coding standards. Remove som... | Craig Topper | 2012-03-17 | 1 | -2/+2 |
* | Use uint16_t to store registers in callee saved register tables to reduce siz... | Craig Topper | 2012-03-04 | 1 | -2/+2 |
* | Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,... | Jia Liu | 2012-02-18 | 1 | -1/+1 |
* | More dead code removal (using -Wunreachable-code) | David Blaikie | 2012-01-20 | 1 | -2/+0 |
* | Move getInitialFrameState from TargetFrameInfo to MCAsmInfo (suggestions for | Evan Cheng | 2011-07-18 | 1 | -1/+0 |
* | Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo down | Evan Cheng | 2011-07-18 | 1 | -13/+1 |
* | Next round of MC refactoring. This patch factor MC table instantiations, MC | Evan Cheng | 2011-07-14 | 1 | -1/+0 |
* | Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo. | Evan Cheng | 2011-06-28 | 1 | -2/+1 |
* | Hide more details in tablegen generated MCRegisterInfo ctor function. | Evan Cheng | 2011-06-28 | 1 | -2/+1 |
* | Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.inc | Evan Cheng | 2011-06-27 | 1 | -1/+4 |
* | Starting to refactor Target to separate out code that's needed to fully describe | Evan Cheng | 2011-06-24 | 1 | -4/+4 |
* | Remove custom allocation order boilerplate that is no longer needed. | Jakob Stoklund Olesen | 2011-06-09 | 1 | -0/+2 |
* | Use the dwarf->llvm mapping to print register names in the cfi | Rafael Espindola | 2011-05-30 | 1 | -0/+4 |
* | Move hasFP() and few related hooks to TargetFrameInfo. | Anton Korobeynikov | 2010-11-18 | 1 | -4/+0 |
* | First step of huge frame-related refactoring: move emit{Prologue,Epilogue} ou... | Anton Korobeynikov | 2010-11-15 | 1 | -49/+0 |