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* [Sparc] Add support for inline assembly constraint 'I'. Venkatraman Govindaraju2014-01-221-0/+60
| | | | llvm-svn: 199781
* Add FPExt option to CCValAssign::LocInfo. When generating calling-conventionLang Hames2014-01-141-1/+3
| | | | | | | | | | promotion code, Tablegen will now select FPExt for floating point promotions (previously it had returned AExt, which is not valid for floating point types). Any out-of-tree targets that were relying on AExt being returned for FP promotions will need to update their code check for FPExt instead. llvm-svn: 199252
* The SPARCv9 ABI returns a float in %f0.Jakob Stoklund Olesen2014-01-121-2/+2
| | | | | | | | | | | | | | | This is different from the argument passing convention which puts the first float argument in %f1. With this patch, all returned floats are treated as if the 'inreg' flag were set. This means multiple float return values get packed in %f0, %f1, %f2, ... Note that when returning a struct in registers, clang will set the 'inreg' flag on the return value, so that behavior is unchanged. This also happens when returning a float _Complex. llvm-svn: 199028
* Re-sort all of the includes with ./utils/sort_includes.py so thatChandler Carruth2014-01-071-1/+1
| | | | | | | | | | subsequent changes are easier to review. About to fix some layering issues, and wanted to separate out the necessary churn. Also comment and sink the include of "Windows.h" in three .inc files to match the usage in Memory.inc. llvm-svn: 198685
* Remove unnecessary #includes.Bill Wendling2014-01-061-1/+0
| | | | llvm-svn: 198585
* Refactor function that checks that __builtin_returnaddress's argument is ↵Bill Wendling2014-01-061-4/+1
| | | | | | | | | constant. This moves the check up into the parent class so that all targets can use it without having to copy (and keep in sync) the same error message. llvm-svn: 198579
* Emit an error message if the value passed to __builtin_returnaddress isn't a ↵Bill Wendling2014-01-051-0/+7
| | | | | | | | | | constant __builtin_returnaddress requires that the value passed into is be a constant. However, at -O0 even a constant expression may not be converted to a constant. Emit an error message intead of crashing. llvm-svn: 198531
* [SparcV9]: Implement RETURNADDR and FRAMEADDR lowering in SPARC64. Venkatraman Govindaraju2014-01-041-39/+54
| | | | | | Fixes PR18356. llvm-svn: 198480
* [Sparc] Handle atomic loads/stores in sparc backend.Venkatraman Govindaraju2014-01-011-3/+35
| | | | llvm-svn: 198286
* [SparcV9]: Custom lower UMULO/SMULO so that the arguments are send to ↵Venkatraman Govindaraju2014-01-011-0/+52
| | | | | | __multi3() in correct order. llvm-svn: 198281
* [SparcV9] For codegen generated library calls that return float, set inreg ↵Venkatraman Govindaraju2013-12-291-0/+6
| | | | | | | | flag manually in LowerCall(). This makes the sparc backend to generate Sparc64 ABI compliant code. llvm-svn: 198149
* [SparcV9]: Implement lowering of long double (fp128) arguments in Sparc64 ABI.Venkatraman Govindaraju2013-12-291-8/+60
| | | | | | Also, pass fp128 arguments to varargs through integer registers if necessary. llvm-svn: 198145
* [SPARCV9]: Adjust the resultant pointer of DYNAMIC_STACKALLOC with the stack ↵Venkatraman Govindaraju2013-12-091-3/+5
| | | | | | BIAS on sparcV9. llvm-svn: 196755
* [Sparc]: Implement getSetCCResultType() in SparcTargetLowering so that ↵Venkatraman Govindaraju2013-12-091-0/+6
| | | | | | umulo/smulo can be lowered on sparcv9 without an assertion error. llvm-svn: 196751
* [SparcV9]: Expand MULHU/MULHS:i64 and UMUL_LOHI/SMUL_LOHI:i64 on sparcv9.Venkatraman Govindaraju2013-12-081-0/+7
| | | | | | This fixes PR18150. llvm-svn: 196735
* [SparcV9] Enable custom lowering of DYNAMIC_STACKALLOC in sparc64.Venkatraman Govindaraju2013-11-241-6/+11
| | | | llvm-svn: 195573
* Expand rotate instructions on sparcv9 as well.Roman Divacky2013-11-121-0/+2
| | | | llvm-svn: 194500
* [SparcV9] Handle i64 <-> float conversions in sparcv9 mode.Venkatraman Govindaraju2013-11-031-28/+136
| | | | llvm-svn: 193957
* [Sparc] Expand FP_TO_UINT, UINT_TO_FP for fp128.Venkatraman Govindaraju2013-11-031-3/+42
| | | | llvm-svn: 193947
* [SparcV9] Add ctpop instruction for i64. Also, expand ctlz, cttz and bswap.Venkatraman Govindaraju2013-11-031-0/+7
| | | | llvm-svn: 193941
* SparcV9 doesnt have rem instruction either.Roman Divacky2013-10-311-0/+8
| | | | llvm-svn: 193789
* [Sparc] Disable tail call optimization for sparc64.Venkatraman Govindaraju2013-10-091-0/+3
| | | | | | This patch fixes PR17506. llvm-svn: 192294
* [Sparc] Implement JIT for SPARC.Venkatraman Govindaraju2013-10-081-0/+1
| | | | | | | No new testcases. However, this patch makes all supported JIT testcases in test/ExecutionEngine pass on Sparc. llvm-svn: 192176
* [Sparc] Custom lower addc/adde/subc/sube on i64 in sparc64.Venkatraman Govindaraju2013-10-061-0/+55
| | | | | | This is required because i64 is a legal type but addxcc/subxcc reads icc carry bit, which are 32 bit conditional codes. llvm-svn: 192054
* [Sparc] Use correct alignment while loading/storing fp128 values.Venkatraman Govindaraju2013-10-051-4/+13
| | | | llvm-svn: 192023
* [Sparc] Respect hasHardQuad parameter correctly when lowering SINT_TO_FP ↵Venkatraman Govindaraju2013-10-051-1/+1
| | | | | | with fp128 operand. llvm-svn: 192015
* [Sparc] Implements exception handling in SPARC with DwarfCFI.Venkatraman Govindaraju2013-09-261-4/+2
| | | | llvm-svn: 191432
* [Sparc] Add support for TLS in sparc.Venkatraman Govindaraju2013-09-221-2/+101
| | | | llvm-svn: 191164
* [SPARC] Make functions with GLOBAL_OFFSET_TABLE access as non-leaf functions.Venkatraman Govindaraju2013-09-221-0/+4
| | | | llvm-svn: 191160
* [Sparc] Fix lowering FABS on fp128 (long double) on pre-v9 targets.Venkatraman Govindaraju2013-09-211-6/+6
| | | | llvm-svn: 191154
* [Sparc] Correctly handle call to functions with ReturnsTwice attribute.Venkatraman Govindaraju2013-09-051-4/+34
| | | | | | | | | | | | In sparc, setjmp stores only the registers %fp, %sp, %i7 and %o7. longjmp restores the stack, and the callee-saved registers (all local/in registers: %i0-%i7, %l0-%l7) using the stored %fp and register windows. However, this does not guarantee that the longjmp will restore the registers, as they were when the setjmp was called. This is because these registers may be clobbered after returning from setjmp, but before calling longjmp. This patch prevents the registers %i0-%i5, %l0-l7 to live across the setjmp call using the register mask. llvm-svn: 190033
* [Sparc] Fix an assertion failure while lowering fcmp on long double.Venkatraman Govindaraju2013-09-041-1/+1
| | | | | | | This assertion is triggered because an integer constant is created with wrong type. llvm-svn: 189948
* [Sparc] Add support for soft long double (fp128).Venkatraman Govindaraju2013-09-031-18/+396
| | | | llvm-svn: 189780
* [Sparc] Add long double (f128) instructions to sparc backend. Venkatraman Govindaraju2013-08-251-0/+134
| | | | llvm-svn: 189198
* Use register masks on SPARC call instructions.Jakob Stoklund Olesen2013-08-231-0/+13
| | | | llvm-svn: 189085
* [Sparc] Rewrite MBB's live-in registers for leaf functions. Also, addVenkatraman Govindaraju2013-07-301-7/+9
| | | | | | | | register i7 as a live-in if current function's return address is taken. This revision fixes PR16269. llvm-svn: 187433
* Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector ↵Craig Topper2013-07-141-3/+3
| | | | | | size. llvm-svn: 186274
* The getRegForInlineAsmConstraint function should only accept MVT value types.Chad Rosier2013-06-221-1/+1
| | | | llvm-svn: 184642
* [Sparc] Delete FPMover Pass and remove Fp* Pseudo-instructions from Sparc ↵Venkatraman Govindaraju2013-06-081-1/+39
| | | | | | backend. llvm-svn: 183613
* [Sparc]: Use cmp instruction instead of subcc to compare integers.Venkatraman Govindaraju2013-06-071-7/+2
| | | | llvm-svn: 183463
* Sparc: No functionality change. Cleanup whitespaces, comment formatting etc.,Venkatraman Govindaraju2013-06-041-21/+22
| | | | llvm-svn: 183243
* Sparc: Add support for indirect branch and blockaddress in Sparc backend.Venkatraman Govindaraju2013-06-031-0/+13
| | | | llvm-svn: 183094
* Sparc: Mark functions calling llvm.vastart and llvm.returnaddress intrinsics ↵Venkatraman Govindaraju2013-06-011-0/+6
| | | | | | as non-leaf functions. llvm-svn: 183079
* Order CALLSEQ_START and CALLSEQ_END nodes.Andrew Trick2013-05-291-4/+6
| | | | | | | | | | | | Fixes PR16146: gdb.base__call-ar-st.exp fails after pre-RA-sched=source fixes. Patch by Xiaoyi Guo! This also fixes an unsupported dbg.value test case. Codegen was previously incorrect but the test was passing by luck. llvm-svn: 182885
* Track IR ordering of SelectionDAG nodes 2/4.Andrew Trick2013-05-251-21/+21
| | | | | | | Change SelectionDAG::getXXXNode() interfaces as well as call sites of these functions to pass in SDLoc instead of DebugLoc. llvm-svn: 182703
* Also expand 64-bit bitcasts.Jakob Stoklund Olesen2013-05-201-0/+2
| | | | llvm-svn: 182229
* Mark i64 SETCC as expand so it is turned into a SELECT_CC.Jakob Stoklund Olesen2013-05-201-0/+2
| | | | llvm-svn: 182227
* Passing arguments to varags functions under the SPARC v9 ABI.Jakob Stoklund Olesen2013-04-211-0/+47
| | | | | | | Arguments after the fixed arguments never use the floating point registers. llvm-svn: 179987
* Compile varargs functions for SPARCv9.Jakob Stoklund Olesen2013-04-201-31/+57
| | | | | | | | | | | | With a little help from the frontend, it looks like the standard va_* intrinsics can do the job. Also clean up an old bitcast hack in LowerVAARG that dealt with unaligned double loads. Load SDNodes can specify an alignment now. Still missing: Calling varargs functions with float arguments. llvm-svn: 179961
* Remove unused MEMBARRIER DAG node; it's been replaced by ATOMIC_FENCE.Tim Northover2013-04-201-1/+0
| | | | llvm-svn: 179939
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