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* Add 64-bit multiply and divide instructions for SPARC v9.Jakob Stoklund Olesen2013-04-161-0/+3
| | | | llvm-svn: 179582
* Use the correct types when matching ADDRri patterns from frame indexes.Jakob Stoklund Olesen2013-04-131-3/+4
| | | | | | | It doesn't seem like anybody is checking types this late in isel, so no test case. llvm-svn: 179462
* Move all of the header files which are involved in modelling the LLVM IRChandler Carruth2013-01-021-1/+1
| | | | | | | | | | | | | | | | | | | | | into their new header subdirectory: include/llvm/IR. This matches the directory structure of lib, and begins to correct a long standing point of file layout clutter in LLVM. There are still more header files to move here, but I wanted to handle them in separate commits to make tracking what files make sense at each layer easier. The only really questionable files here are the target intrinsic tablegen files. But that's a battle I'd rather not fight today. I've updated both CMake and Makefile build systems (I think, and my tests think, but I may have missed something). I've also re-sorted the includes throughout the project. I'll be committing updates to Clang, DragonEgg, and Polly momentarily. llvm-svn: 171366
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-031-1/+1
| | | | | | | | | | | | | | | | | Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] llvm-svn: 169131
* Remove dead code. Improve llvm_unreachable text. Simplify some control flow.Ahmed Charles2012-02-191-1/+0
| | | | llvm-svn: 150918
* rename MVT::Flag to MVT::Glue. "Flag" is a terrible name forChris Lattner2010-12-211-2/+2
| | | | | | | something that just glues two nodes together, even if it is sometimes used for flags. llvm-svn: 122310
* fix a long standing wart: all the ComplexPattern's were beingChris Lattner2010-09-211-8/+6
| | | | | | | | | | | passed the root of the match, even though only a few patterns actually needed this (one in X86, several in ARM [which should be refactored anyway], and some in CellSPU that I don't feel like detangling). Instead of requiring all ComplexPatterns to take the dead root, have targets opt into getting the root by putting SDNPWantRoot on the ComplexPattern. llvm-svn: 114471
* Don't call Predicate_* methods directly from Sparc target.Jakob Stoklund Olesen2010-08-171-4/+4
| | | | | | | | | Modernize predicates a bit. The Predicate_* methods are not used by TableGen any longer. They are only emitted for the sake of legacy code. llvm-svn: 111263
* Delete an unnecessary reference to SelectionDAGISel::BB.Dan Gohman2010-04-191-1/+0
| | | | llvm-svn: 101824
* Use const qualifiers with TargetLowering. This eliminates severalDan Gohman2010-04-171-1/+0
| | | | | | | | | | | | | const_casts, and it reinforces the design of the Target classes being immutable. SelectionDAGISel::IsLegalToFold is now a static member function, because PIC16 uses it in an unconventional way. There is more room for API cleanup here. And PIC16's AsmPrinter no longer uses TargetLowering. llvm-svn: 101635
* Sink InstructionSelect() out of each target into SDISel, and rename itChris Lattner2010-03-021-15/+1
| | | | | | | | | | | | DoInstructionSelection. Inline "SelectRoot" into it from DAGISelHeader. Sink some other stuff out of DAGISelHeader into SDISel. Eliminate the various 'Indent' stuff from various targets, which dates to when isel was recursive. 17 files changed, 114 insertions(+), 430 deletions(-) llvm-svn: 97555
* Change SelectCode's argument from SDValue to SDNode *, to make it moreDan Gohman2010-01-051-10/+9
| | | | | | | | | clear what information these functions are actually using. This is also a micro-optimization, as passing a SDNode * around is simpler than passing a { SDNode *, int } by value or reference. llvm-svn: 92564
* Remove uninteresting and confusing debug output.Dan Gohman2009-11-051-1/+0
| | | | llvm-svn: 86149
* Rename getTargetNode to getMachineNode, for consistency with theDan Gohman2009-09-251-4/+4
| | | | | | | | naming scheme used in SelectionDAG, where there are multiple kinds of "target" nodes, but "machine" nodes are nodes which represent a MachineInstr. llvm-svn: 82790
* several major improvements to the sparc backend: support for weak linkageChris Lattner2009-09-151-4/+19
| | | | | | and PIC codegen. Patch by Venkatraman Govindaraju! llvm-svn: 81877
* Split EVT into MVT and EVT, the former representing _just_ a primitive type, ↵Owen Anderson2009-08-111-14/+14
| | | | | | | | while the latter is capable of representing either a primitive or an extended type. llvm-svn: 78713
* Rename MVT to EVT, in preparation for splitting SimpleValueType out into its ↵Owen Anderson2009-08-101-14/+14
| | | | | | own struct type. llvm-svn: 78610
* Implement changes from Chris's feedback.Torok Edwin2009-07-081-0/+2
| | | | | | Finish converting lib/Target. llvm-svn: 75043
* Eliminate remaining non-DebugLoc version of getTargetNode.Dale Johannesen2009-02-061-3/+4
| | | | llvm-svn: 63951
* Move a few containers out of ScheduleDAGInstrs::BuildSchedGraphDan Gohman2009-01-151-1/+1
| | | | | | | | | | | and into the ScheduleDAGInstrs class, so that they don't get destructed and re-constructed for each block. This fixes a compile-time hot spot in the post-pass scheduler. To help facilitate this, tidy and do some minor reorganization in the scheduler constructor functions. llvm-svn: 62275
* Eliminate the ISel priority queue, which used the topological order for aDan Gohman2008-11-051-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | priority function. Instead, just iterate over the AllNodes list, which is already in topological order. This eliminates a fair amount of bookkeeping, and speeds up the isel phase by about 15% on many testcases. The impact on most targets is that AddToISelQueue calls can be simply removed. In the x86 target, there are two additional notable changes. The rule-bending AND+SHIFT optimization in MatchAddress that creates new pre-isel nodes during isel is now a little more verbose, but more robust. Instead of either creating an invalid DAG or creating an invalid topological sort, as it has historically done, it can now just insert the new nodes into the node list at a position where they will be consistent with the topological ordering. Also, the address-matching code has logic that checked to see if a node was "already selected". However, when a node is selected, it has all its uses taken away via ReplaceAllUsesWith or equivalent, so it won't recieve any further visits from MatchAddress. This code is now removed. llvm-svn: 58748
* Have TableGen emit setSubgraphColor calls under control of a -gen-debugDavid Greene2008-10-271-1/+1
| | | | | | | | flag. Then in a debugger developers can set breakpoints at these calls to see waht is about to be selected and what the resulting subgraph looks like. This really helps when debugging instruction selection. llvm-svn: 58278
* Add dummy 'm' inline asm constraint handler for Sparc. I'm not sure, whether ↵Anton Korobeynikov2008-10-101-0/+26
| | | | | | it is correct, however :) llvm-svn: 57345
* CleanupAnton Korobeynikov2008-10-101-12/+12
| | | | llvm-svn: 57344
* Avoid creating two TargetLowering objects for each target.Dan Gohman2008-10-031-5/+3
| | | | | | | | | | | | Instead, just create one, and make sure everything that needs it can access it. Previously most of the SelectionDAGISel subclasses all had their own TargetLowering object, which was redundant with the TargetLowering object in the TargetMachine subclasses, except on Sparc, where SparcTargetMachine didn't have a TargetLowering object. Change Sparc to work more like the other targets here. llvm-svn: 57016
* Reverting r56249. On further investigation, this functionality isn't needed.Bill Wendling2008-09-161-2/+2
| | | | | | Apologies for the thrashing. llvm-svn: 56251
* - Change "ExternalSymbolSDNode" to "SymbolSDNode".Bill Wendling2008-09-161-2/+2
| | | | | | | | | | - Add linkage to SymbolSDNode (default to external). - Change ISD::ExternalSymbol to ISD::Symbol. - Change ISD::TargetExternalSymbol to ISD::TargetSymbol These changes pave the way to allowing SymbolSDNodes with non-external linkage. llvm-svn: 56249
* Rename ConstantSDNode::getValue to getZExtValue, for consistencyDan Gohman2008-09-121-1/+1
| | | | | | | with ConstantInt. This led to fixing a bug in TargetLowering.cpp using getValue instead of getAPIntValue. llvm-svn: 56159
* erect abstraction boundaries for accessing SDValue members, rename Val -> ↵Gabor Greif2008-08-281-2/+2
| | | | | | Node to reflect semantics llvm-svn: 55504
* Move the point at which FastISel taps into the SelectionDAGISelDan Gohman2008-08-231-3/+3
| | | | | | | | | | | | | | | | | | process up to a higher level. This allows FastISel to leverage more of SelectionDAGISel's infastructure, such as updating Machine PHI nodes. Also, implement transitioning from SDISel back to FastISel in the middle of a block, so it's now possible to go back and forth. This allows FastISel to hand individual CallInsts and other complicated things off to SDISel to handle, while handling the rest of the block itself. To help support this, reorganize the SelectionDAG class so that it is allocated once and reused throughout a function, instead of being completely reallocated for each block. llvm-svn: 55219
* Simplify SelectRoot's interface, and factor out some common codeDan Gohman2008-08-211-1/+1
| | | | | | from all targets. llvm-svn: 55124
* Rename SDOperand to SDValue.Dan Gohman2008-07-271-17/+17
| | | | llvm-svn: 54128
* Add a new function, ReplaceAllUsesOfValuesWith, which handles bulkDan Gohman2008-07-171-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | replacement of multiple values. This is slightly more efficient than doing multiple ReplaceAllUsesOfValueWith calls, and theoretically could be optimized even further. However, an important property of this new function is that it handles the case where the source value set and destination value set overlap. This makes it feasible for isel to use SelectNodeTo in many very common cases, which is advantageous because SelectNodeTo avoids a temporary node and it doesn't require CSEMap updates for users of values that don't change position. Revamp MorphNodeTo, which is what does all the work of SelectNodeTo, to handle operand lists more efficiently, and to correctly handle a number of corner cases to which its new wider use exposes it. This commit also includes a change to the encoding of post-isel opcodes in SDNodes; now instead of being sandwiched between the target-independent pre-isel opcodes and the target-dependent pre-isel opcodes, post-isel opcodes are now represented as negative values. This makes it possible to test if an opcode is pre-isel or post-isel without having to know the size of the current target's post-isel instruction set. These changes speed up llc overall by 3% and reduce memory usage by 10% on the InstructionCombining.cpp testcase with -fast and -regalloc=local. llvm-svn: 53728
* Add explicit keywords.Dan Gohman2008-07-071-1/+1
| | | | llvm-svn: 53179
* Split scheduling from instruction selection.Evan Cheng2008-06-301-7/+4
| | | | llvm-svn: 52923
* split sparc lowering out into SparcISelLowering.{cpp|h} to followChris Lattner2008-03-171-986/+1
| | | | | | best practices. llvm-svn: 48442
* refactor the LowerOperation code out to individual functions for Chris Lattner2008-03-171-173/+197
| | | | | | each lowering, which is 'best practice'. llvm-svn: 48441
* Default ISD::PREFETCH to expand.Evan Cheng2008-03-101-1/+0
| | | | llvm-svn: 48169
* Implement x86 support for @llvm.prefetch. It corresponds to prefetcht{0|1|2} ↵Evan Cheng2008-03-081-0/+1
| | | | | | and prefetchnta instructions. llvm-svn: 48042
* Sparc backend doesn't support debug info yet, mark the nodes as expand. ↵Chris Lattner2008-02-281-2/+6
| | | | | | | | This fixes a crash on test/DebugInfo/funccall.ll llvm-svn: 47709
* Fix CodeGen/Generic/storetrunc-fp.ll on sparc, PR2105Chris Lattner2008-02-281-1/+2
| | | | llvm-svn: 47707
* fix CodeGen/Generic/2008-01-25-dag-combine-mul.ll on sparc, PR2105Chris Lattner2008-02-281-0/+3
| | | | llvm-svn: 47706
* I cannot find a libgcc function for this builtin. Therefor expanding it to ↵Andrew Lenharth2008-02-161-1/+2
| | | | | | a noop (which is how it use to be treated). If someone who knows the x86 backend better than me could tell me how to get a lock prefix on an instruction, that would be nice to complete x86 support. llvm-svn: 47213
* In TargetLowering::LowerCallTo, don't assert thatDuncan Sands2008-02-141-8/+14
| | | | | | | | | | | | | | | | | the return value is zero-extended if it isn't sign-extended. It may also be any-extended. Also, if a floating point value was returned in a larger floating point type, pass 1 as the second operand to FP_ROUND, which tells it that all the precision is in the original type. I think this is right but I could be wrong. Finally, when doing libcalls, set isZExt on a parameter if it is "unsigned". Currently isSExt is set when signed, and nothing is set otherwise. This should be right for all calls to standard library routines. llvm-svn: 47122
* Change how FP immediates are handled. Nate Begeman2008-02-141-3/+0
| | | | | | | | | | | | | | 1) ConstantFP is now expand by default 2) ConstantFP is not turned into TargetConstantFP during Legalize if it is legal. This allows ConstantFP to be handled like Constant, allowing for targets that can encode FP immediates as MachineOperands. As a bonus, fix up Itanium FP constants, which now correctly match, and match more constants! Hooray. llvm-svn: 47121
* Simplify some logic in ComputeMaskedBits. And change ComputeMaskedBitsDan Gohman2008-02-131-2/+2
| | | | | | to pass the mask APInt by value, not by reference. llvm-svn: 47096
* Convert SelectionDAG::ComputeMaskedBits to use APInt instead of uint64_t.Dan Gohman2008-02-131-8/+8
| | | | | | | Add an overload that supports the uint64_t interface for use by clients that haven't been updated yet. llvm-svn: 47039
* Re-apply the memory operand changes, with a fix for the staticDan Gohman2008-02-061-7/+5
| | | | | | | | initializer problem, a minor tweak to the way the DAGISelEmitter finds load/store nodes, and a renaming of the new PseudoSourceValue objects. llvm-svn: 46827
* Dwarf requires variable entries to be in the source order. Right now, since ↵Evan Cheng2008-02-041-1/+0
| | | | | | we are recording variable information at isel time this means parameters would appear in the reverse order. The short term fix is to issue recordVariable() at asm printing time instead. llvm-svn: 46724
* explicitly include Compiler.h instead of getting it from tblgen in the ↵Chris Lattner2008-02-031-0/+1
| | | | | | middle of a class. llvm-svn: 46676
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