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* Create a new class, MemOperand, for describing memory referencesDan Gohman2008-01-311-7/+5
| | | | | | | | | | | | | | | | in the backend. Introduce a new SDNode type, MemOperandSDNode, for holding a MemOperand in the SelectionDAG IR, and add a MemOperand list to MachineInstr, and code to manage them. Remove the offset field from SrcValueSDNode; uses of SrcValueSDNode that were using it are all all using MemOperandSDNode now. Also, begin updating some getLoad and getStore calls to use the PseudoSourceValue objects. Most of this was written by Florian Brander, some reorganization and updating to TOT by me. llvm-svn: 46585
* Even though InsertAtEndOfBasicBlock is an ugly hack it still deserves a ↵Evan Cheng2008-01-301-4/+4
| | | | | | | | proper name. Rename it to EmitInstrWithCustomInserter since it does not necessarily insert instruction at the end. llvm-svn: 46562
* The last pieces needed for loading arbitraryDuncan Sands2008-01-231-1/+4
| | | | | | | | | | | | | | | precision integers. This won't actually work (and most of the code is dead) unless the new legalization machinery is turned on. While there, I rationalized the handling of i1, and removed some bogus (and unused) sextload patterns. For i1, this could result in microscopically better code for some architectures (not X86). It might also result in worse code if annotating with AssertZExt nodes turns out to be more harmful than helpful. llvm-svn: 46280
* Rename SSARegMap -> MachineRegisterInfo in keeping with the idea Chris Lattner2007-12-311-17/+17
| | | | | | | | | | | | | | that "machine" classes are used to represent the current state of the code being compiled. Given this expanded name, we can start moving other stuff into it. For now, move the UsedPhysRegs and LiveIn/LoveOuts vectors from MachineFunction into it. Update all the clients to match. This also reduces some needless #includes, such as MachineModuleInfo from MachineFunction. llvm-svn: 45467
* Use MachineOperand::getImm instead of MachineOperand::getImmedValue. ↵Chris Lattner2007-12-301-1/+1
| | | | | | Likewise setImmedValue -> setImm llvm-svn: 45453
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+2
| | | | llvm-svn: 45418
* Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stackBill Wendling2007-11-131-3/+4
| | | | | | | | | | | adjustment fields, and an optional flag. If there is a "dynamic_stackalloc" in the code, make sure that it's bracketed by CALLSEQ_START and CALLSEQ_END. If not, then there is the potential for the stack to be changed while the stack's being used by another instruction (like a call). This can only result in tears... llvm-svn: 44037
* Set ISD::FPOW to Expand.Dan Gohman2007-10-111-0/+2
| | | | llvm-svn: 42881
* Fix CodeGen/Generic/BasicInstrs.llx on sparc by marking divremChris Lattner2007-10-101-1/+3
| | | | | | illegal. Thanks to gabor for pointing this out! llvm-svn: 42832
* Fold the adjust_trampoline intrinsic intoDuncan Sands2007-09-111-2/+0
| | | | | | | init_trampoline. There is now only one trampoline intrinsic. llvm-svn: 41841
* Support for trampolines, except for X86 codegen which isDuncan Sands2007-07-271-1/+3
| | | | | | still under discussion. llvm-svn: 40549
* Fix CodeGen/Generic/print-arith-fp.ll on sparc (PR1551)Chris Lattner2007-07-131-0/+2
| | | | llvm-svn: 39813
* Assert when TLS is not implemented.Lauro Ramos Venancio2007-07-111-0/+3
| | | | llvm-svn: 39737
* Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits fromDan Gohman2007-06-221-2/+6
| | | | | | | | | TargetLowering to SelectionDAG so that they have more convenient access to the current DAG, in preparation for the ValueType routines being changed from standalone functions to members of SelectionDAG for the pre-legalize vector type changes. llvm-svn: 37704
* Refactoring of formal parameter flags. Enable properly use ofAnton Korobeynikov2007-03-071-2/+4
| | | | | | zext/sext/aext stuff. llvm-svn: 35008
* Simplify lowering and selection of exception ops.Jim Laskey2007-02-221-3/+0
| | | | llvm-svn: 34488
* Support to provide exception and selector registers.Jim Laskey2007-02-211-0/+3
| | | | llvm-svn: 34482
* Finish off bug 680, allowing targets to custom lower frame and returnNate Begeman2007-01-291-0/+4
| | | | | | address nodes. llvm-svn: 33636
* Make LABEL a builtin opcode.Jim Laskey2007-01-261-1/+1
| | | | llvm-svn: 33537
* For PR950:Reid Spencer2006-12-311-19/+21
| | | | | | | | | | | | | | | | | | Three changes: 1. Convert signed integer types to signless versions. 2. Implement the @sext and @zext parameter attributes. Previously the type of an function parameter was used to determine whether it should be sign extended or zero extended before the call. This information is now communicated via the function type's parameter attributes. 3. The interface to LowerCallTo had to be changed in order to accommodate the parameter attribute information. Although it would have been convenient to pass in the FunctionType itself, there isn't always one present in the caller. Consequently, a signedness indication for the result type and for each parameter was provided for in the interface to this method. All implementations were changed to make the adjustment necessary. llvm-svn: 32788
* What should be the last unnecessary <iostream>s in the library.Bill Wendling2006-12-071-1/+0
| | | | llvm-svn: 32333
* Change MachineInstr ctor's to take a TargetInstrDescriptor reference insteadEvan Cheng2006-11-271-2/+3
| | | | | | of opcode and number of operands. llvm-svn: 31947
* Match tblegen changes.Evan Cheng2006-11-081-6/+7
| | | | llvm-svn: 31571
* All targets expand BR_JT for now.Evan Cheng2006-10-301-1/+2
| | | | llvm-svn: 31294
* Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode.Evan Cheng2006-10-131-7/+6
| | | | llvm-svn: 30945
* Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes.Evan Cheng2006-10-091-10/+10
| | | | llvm-svn: 30844
* Make use of getStore().Evan Cheng2006-10-051-8/+7
| | | | llvm-svn: 30759
* Combine ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD into ISD::LOADX. Add anEvan Cheng2006-10-041-4/+4
| | | | | | extra operand to LOADX to specify the exact value extension type. llvm-svn: 30714
* Reflects MachineConstantPoolEntry changes.Evan Cheng2006-09-121-1/+1
| | | | llvm-svn: 30279
* SelectNodeTo now returns a SDNode*.Evan Cheng2006-08-261-2/+2
| | | | llvm-svn: 29901
* Select() no longer require Result operand by reference.Evan Cheng2006-08-261-6/+4
| | | | llvm-svn: 29898
* Match tblgen changes.Evan Cheng2006-08-261-6/+8
| | | | llvm-svn: 29895
* SelectNodeTo() may return a SDOperand that is different from the input.Evan Cheng2006-08-161-3/+3
| | | | llvm-svn: 29726
* Match tablegen changes.Evan Cheng2006-08-111-6/+6
| | | | llvm-svn: 29604
* Start eliminating temporary vectors used to create DAG nodes. Instead, passChris Lattner2006-08-081-24/+14
| | | | | | | | | | | | | | | | | | | in the start of an array and a count of operands where applicable. In many cases, the number of operands is known, so this static array can be allocated on the stack, avoiding the heap. In many other cases, a SmallVector can be used, which has the same benefit in the common cases. I updated a lot of code calling getNode that takes a vector, but ran out of time. The rest of the code should be updated, and these methods should be removed. We should also do the same thing to eliminate the methods that take a vector of MVT::ValueTypes. It would be extra nice to convert the dagiselemitter to avoid creating vectors for operands when calling getTargetNode. llvm-svn: 29566
* Match tablegen isel changes.Evan Cheng2006-08-071-14/+5
| | | | llvm-svn: 29549
* Remove InFlightSet hack. No longer needed.Evan Cheng2006-07-281-1/+0
| | | | llvm-svn: 29373
* Type of extract_element index operand should be iPTR.Evan Cheng2006-06-151-2/+2
| | | | llvm-svn: 28797
* Change RET node to include signness information of the return values. i.e.Evan Cheng2006-05-261-3/+3
| | | | | | RET chain, value1, sign1, value2, sign2, ... llvm-svn: 28510
* Add support for the missing FP condition codesChris Lattner2006-05-251-6/+12
| | | | llvm-svn: 28482
* Assert if InflightSet is not cleared after instruction selecting a BB.Evan Cheng2006-05-251-0/+1
| | | | llvm-svn: 28459
* Clear HandleMap and ReplaceMap after instruction selection. Or it may causeEvan Cheng2006-05-241-0/+2
| | | | | | non-deterministic behavior. llvm-svn: 28454
* Patches to make the LLVM sources more -pedantic clean. Patch providedChris Lattner2006-05-241-1/+1
| | | | | | by Anton Korobeynikov! This is a step towards closing PR786. llvm-svn: 28447
* Remove dead variable.Chris Lattner2006-05-121-1/+0
| | | | llvm-svn: 28247
* JumpTable support! What this represents is working asm and jit support forNate Begeman2006-04-221-0/+1
| | | | | | | | x86 and ppc for 100% dense switch statements when relocations are non-PIC. This support will be extended and enhanced in the coming days to support PIC, and less dense forms of jump tables. llvm-svn: 27947
* SelectionDAGISel can now natively handle Switch instructions, in the sameNate Begeman2006-03-271-1/+9
| | | | | | | | | | | | | | manner that the LowerSwitch LLVM to LLVM pass does: emitting a binary search tree of basic blocks. The new approach has several advantages: it is faster, it generates significantly smaller code in many cases, and it paves the way for implementing dense switch tables as a jump table by handling switches directly in the instruction selector. This functionality is currently only enabled on x86, but should be safe for every target. In anticipation of making it the default, the cfg is now properly updated in the x86, ppc, and sparc select lowering code. llvm-svn: 27156
* #include Intrinsics.h into all dag iselsChris Lattner2006-03-251-0/+1
| | | | llvm-svn: 27109
* Remove BRTWOWAY*Nate Begeman2006-03-171-2/+0
| | | | | | | | Make the PPC backend not dependent on BRTWOWAY_CC and make the branch selector smarter about the code it generates, fixing a case in the readme. llvm-svn: 26814
* Copysign needs to be expanded everywhere. Note that Alpha and IA64 shouldChris Lattner2006-03-051-0/+2
| | | | | | implement copysign as a native op if they have it. llvm-svn: 26541
* kill ADD_PARTS & SUB_PARTS and replace them with fancy new ADDC, ADDE, SUBCNate Begeman2006-02-171-35/+0
| | | | | | | and SUBE nodes that actually expose what's going on and allow for significant simplifications in the targets. llvm-svn: 26255
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