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path: root/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
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* Remove the UseCFI option from createAsmStreamer.Rafael Espindola2014-05-071-4/+3
| | | | | | We were already always passing true, this just removes the option. llvm-svn: 208205
* [C++] Use 'nullptr'. Target edition.Craig Topper2014-04-251-2/+2
| | | | llvm-svn: 207197
* [cleanup] Lift using directives, DEBUG_TYPE definitions, and even someChandler Carruth2014-04-221-3/+2
| | | | | | | | | | | | system headers above the includes of generated '.inc' files that actually contain code. In a few targets this was already done pretty consistently, but it wasn't done *really* consistently anywhere. It is strictly cleaner IMO and necessary in a bunch of places where the DEBUG_TYPE is referenced from the generated code. Consistency with the necessary places trumps. Hopefully the build bots are OK with the movement of intrin.h... llvm-svn: 206838
* [Sparc] Add support for parsing fcmp with %fcc registers.Venkatraman Govindaraju2014-03-021-1/+1
| | | | llvm-svn: 202610
* [Sparc] Add support for parsing sparcv9 instructions addc/subc/addccc/subccc.Venkatraman Govindaraju2014-03-011-0/+3
| | | | llvm-svn: 202598
* Remove support for not using .loc directives.Rafael Espindola2014-02-051-5/+5
| | | | | | Clang itself was not using this. The only way to access it was via llc. llvm-svn: 200862
* [Sparc] Set %o7 as the return address register instead of %i7 in ↵Venkatraman Govindaraju2014-02-011-3/+22
| | | | | | MCRegisterInfo. Also, add CFI instructions to initialize the frame correctly. llvm-svn: 200617
* Pass a MCSubtargetInfo down to the TargetStreamer creation.Rafael Espindola2014-01-261-1/+2
| | | | | | | With this the target streamers will be able to know the target features that are in use. llvm-svn: 200135
* Construct the MCStreamer before constructing the MCTargetStreamer.Rafael Espindola2014-01-261-6/+9
| | | | | | | | | | This has a few advantages: * Only targets that use a MCTargetStreamer have to worry about it. * There is never a MCTargetStreamer without a MCStreamer, so we can use a reference. * A MCTargetStreamer can talk to the MCStreamer in its constructor. llvm-svn: 200129
* [SparcV9] Add support for JIT in Sparc64.Venkatraman Govindaraju2014-01-241-6/+18
| | | | | | With this change, all supported tests in test/ExecutionEngine pass in sparcv9. llvm-svn: 199977
* Re-sort all of the includes with ./utils/sort_includes.py so thatChandler Carruth2014-01-071-1/+1
| | | | | | | | | | subsequent changes are easier to review. About to fix some layering issues, and wanted to separate out the necessary churn. Also comment and sink the include of "Windows.h" in three .inc files to match the usage in Memory.inc. llvm-svn: 198685
* [Sparc] Add ELF Object Writer for Sparc. Venkatraman Govindaraju2014-01-061-0/+15
| | | | llvm-svn: 198580
* [Sparc] Add initial implementation of MC Code emitter for sparc.Venkatraman Govindaraju2014-01-051-0/+12
| | | | llvm-svn: 198533
* [Sparc] Add the initial implementation of an asm parser for sparc/sparcv9.Venkatraman Govindaraju2014-01-041-0/+5
| | | | llvm-svn: 198484
* [Sparc] Lower and MachineInstr to MC and print assembly using MCInstPrinter.Venkatraman Govindaraju2013-12-261-0/+35
| | | | llvm-svn: 198030
* Define SPARC code models.Jakob Stoklund Olesen2013-04-131-1/+29
| | | | | | | Currently, only abs32 and pic32 are implemented. Add a test case for abs32 with 64-bit code. 64-bit PIC code is currently broken. llvm-svn: 179463
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, ↵Jia Liu2012-02-181-1/+1
| | | | | | MSP430, PPC, PTX, Sparc, X86, XCore. llvm-svn: 150878
* Convert assert(0) to llvm_unreachableCraig Topper2012-02-051-0/+1
| | | | llvm-svn: 149814
* Sink codegen optimization level into MCCodeGenInfo along side relocation modelEvan Cheng2011-11-161-2/+3
| | | | | | | and code model. This eliminates the need to pass OptLevel flag all over the place and makes it possible for any codegen pass to use this information. llvm-svn: 144788
* Move TargetRegistry and TargetSelect from Target to Support where they belong.Evan Cheng2011-08-241-1/+1
| | | | | | These are strictly utilities for registering targets and components. llvm-svn: 138450
* Some refactoring so TargetRegistry.h no longer has to include any filesEvan Cheng2011-08-231-0/+1
| | | | | | from MC. llvm-svn: 138367
* createXXXMCCodeGenInfo should be static.Evan Cheng2011-07-231-2/+2
| | | | llvm-svn: 135826
* Combine all MC initialization routines into one. e.g. InitializeX86MCAsmInfo,Evan Cheng2011-07-221-20/+16
| | | | | | InitializeX86MCInstrInfo, etc. are combined into InitializeX86TargetMC. llvm-svn: 135812
* - Move CodeModel from a TargetMachine global option to MCCodeGenInfo.Evan Cheng2011-07-201-2/+3
| | | | | | | | - Introduce JITDefault code model. This tells targets to set different default code model for JIT. This eliminates the ugly hack in TargetMachine where code model is changed after construction. llvm-svn: 135580
* Introduce MCCodeGenInfo, which keeps information that can affect codegenEvan Cheng2011-07-191-0/+14
| | | | | | | (including compilation, assembly). Move relocation model Reloc::Model from TargetMachine to MCCodeGenInfo so it's accessible even without TargetMachine. llvm-svn: 135468
* Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo downEvan Cheng2011-07-181-0/+10
| | | | | | | | | to MCRegisterInfo. Also initialize the mapping at construction time. This patch eliminate TargetRegisterInfo from TargetAsmInfo. It's another step towards fixing the layering violation. llvm-svn: 135424
* Rename createAsmInfo to createMCAsmInfo and move registration code to ↵Evan Cheng2011-07-141-3/+9
| | | | | | MCTargetDesc to prepare for next round of changes. llvm-svn: 135219
* Next round of MC refactoring. This patch factor MC table instantiations, MCEvan Cheng2011-07-141-0/+51
registeration and creation code into XXXMCDesc libraries. llvm-svn: 135184
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