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path: root/llvm/lib/Target/Sparc/DelaySlotFiller.cpp
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* Sparc - fix uninitialized variable warnings. NFCI.Simon Pilgrim2019-11-131-1/+1
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* Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVMDaniel Sanders2019-08-151-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This clang-tidy check is looking for unsigned integer variables whose initializer starts with an implicit cast from llvm::Register and changes the type of the variable to llvm::Register (dropping the llvm:: where possible). Partial reverts in: X86FrameLowering.cpp - Some functions return unsigned and arguably should be MCRegister X86FixupLEAs.cpp - Some functions return unsigned and arguably should be MCRegister X86FrameLowering.cpp - Some functions return unsigned and arguably should be MCRegister HexagonBitSimplify.cpp - Function takes BitTracker::RegisterRef which appears to be unsigned& MachineVerifier.cpp - Ambiguous operator==() given MCRegister and const Register PPCFastISel.cpp - No Register::operator-=() PeepholeOptimizer.cpp - TargetInstrInfo::optimizeLoadInstr() takes an unsigned& MachineTraceMetrics.cpp - MachineTraceMetrics lacks a suitable constructor Manual fixups in: ARMFastISel.cpp - ARMEmitLoad() now takes a Register& instead of unsigned& HexagonSplitDouble.cpp - Ternary operator was ambiguous between unsigned/Register HexagonConstExtenders.cpp - Has a local class named Register, used llvm::Register instead of Register. PPCFastISel.cpp - PPCEmitLoad() now takes a Register& instead of unsigned& Depends on D65919 Reviewers: arsenm, bogner, craig.topper, RKSimon Reviewed By: arsenm Subscribers: RKSimon, craig.topper, lenary, aemerson, wuzish, jholewinski, MatzeB, qcolombet, dschuff, jyknight, dylanmckay, sdardis, nemanjai, jvesely, wdng, nhaehnle, sbc100, jgravelle-google, kristof.beyls, hiraditya, aheejin, kbarton, fedor.sergeev, javed.absar, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, tpr, PkmX, jocewei, jsji, Petar.Avramovic, asbirlea, Jim, s.egerton, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D65962 llvm-svn: 369041
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
| | | | | | | | | | | | | | | | | to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. llvm-svn: 351636
* [DebugInfo] Examine all uses of isDebugValue() for debug instructions.Shiva Chen2018-05-091-2/+2
| | | | | | | | | | | | | | | | | | Because we create a new kind of debug instruction, DBG_LABEL, we need to check all passes which use isDebugValue() to check MachineInstr is debug instruction or not. When expelling debug instructions, we should expel both DBG_VALUE and DBG_LABEL. So, I create a new function, isDebugInstr(), in MachineInstr to check whether the MachineInstr is debug instruction or not. This patch has no new test case. I have run regression test and there is no difference in regression test. Differential Revision: https://reviews.llvm.org/D45342 Patch by Hsiangkai Wang. llvm-svn: 331844
* Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie2017-11-171-1/+1
| | | | | | | | All these headers already depend on CodeGen headers so moving them into CodeGen fixes the layering (since CodeGen depends on Target, not the other way around). llvm-svn: 318490
* Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layeringDavid Blaikie2017-11-081-1/+1
| | | | | | | | This header includes CodeGen headers, and is not, itself, included by any Target headers, so move it into CodeGen to match the layering of its implementation. llvm-svn: 317647
* [LegacyPassManager] Remove TargetMachine constructorsFrancis Visoiu Mistrih2017-05-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This provides a new way to access the TargetMachine through TargetPassConfig, as a dependency. The patterns replaced here are: * Passes handling a null TargetMachine call `getAnalysisIfAvailable<TargetPassConfig>`. * Passes not handling a null TargetMachine `addRequired<TargetPassConfig>` and call `getAnalysis<TargetPassConfig>`. * MachineFunctionPasses now use MF.getTarget(). * Remove all the TargetMachine constructors. * Remove INITIALIZE_TM_PASS. This fixes a crash when running `llc -start-before prologepilog`. PEI needs StackProtector, which gets constructed without a TargetMachine by the pass manager. The StackProtector pass doesn't handle the case where there is no TargetMachine, so it segfaults. Related to PR30324. Differential Revision: https://reviews.llvm.org/D33222 llvm-svn: 303360
* Use StringRef in Pass/PassManager APIs (NFC)Mehdi Amini2016-10-011-3/+1
| | | | llvm-svn: 283004
* MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, ↵Matthias Braun2016-08-251-1/+1
| | | | | | | | | | | | | compute it Rename AllVRegsAllocated to NoVRegs. This avoids the connotation of running after register and simply describes that no vregs are used in a machine function. With that we can simply compute the property and do not need to dump/parse it in .mir files. Differential Revision: http://reviews.llvm.org/D23850 llvm-svn: 279698
* [SPARC] Additional condition required for DelaySlot fixing erratum in ↵Chris Dewhurst2016-06-191-0/+7
| | | | | | revision r273108. llvm-svn: 273111
* [sparc] Remove some unused (and undefined) declarations.Benjamin Kramer2016-05-271-6/+2
| | | | | | No functionality change. llvm-svn: 270981
* [Sparc] LEON erratum fix - Delay Slot Filler modification.Chris Dewhurst2016-05-231-0/+9
| | | | | | This code should have been with the previous check-in (r270417) and prevents the DelaySlotFiller pass being utilized in functions where the erratum fix has been applied as this will break the run-time code. llvm-svn: 270418
* [Sparc] Allow taking of function address into a register.Chris Dewhurst2016-05-041-5/+5
| | | | | | | | Modification of previously existing code (variable rename only), with unit test added. Differential Revision: http://reviews.llvm.org/D19368 llvm-svn: 268493
* The following code would not work before this patch, due to the inability to ↵Chris Dewhurst2016-04-221-1/+1
| | | | | | | | | | | | | | | | | | | | | take the address of a global object: void func1() { ... } int main(int argc, char** argv) { void (*pFunc)(); pFunc = &func1 pFunc(); ... } Phabricator review: http://reviews.llvm.org/D19368 llvm-svn: 267120
* Add MachineFunctionProperty checks for AllVRegsAllocated for target passesDerek Schuff2016-04-041-0/+5
| | | | | | | | | | | | | | Summary: This adds the same checks that were added in r264593 to all target-specific passes that run after register allocation. Reviewers: qcolombet Subscribers: jyknight, dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D18525 llvm-svn: 265313
* Add a TODO item that the nop handling before FP conditional branches isJoerg Sonnenberger2015-12-031-0/+2
| | | | | | not enough for SPARCv7. llvm-svn: 254580
* Reuse a bunch of cached subtargets and remove getSubtarget callsEric Christopher2015-01-301-10/+7
| | | | | | without a Function argument. llvm-svn: 227644
* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-4/+5
| | | | | | information and update all callers. No functional change. llvm-svn: 214781
* [C++11] Add 'override' keywords and remove 'virtual'. Additionally add ↵Craig Topper2014-04-291-2/+2
| | | | | | 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. Sparc edition llvm-svn: 207502
* [Modules] Fix potential ODR violations by sinking the DEBUG_TYPEChandler Carruth2014-04-221-1/+2
| | | | | | | definition below all of the header #include lines, lib/Target/... edition. llvm-svn: 206842
* Replace PROLOG_LABEL with a new CFI_INSTRUCTION.Rafael Espindola2014-03-071-6/+2
| | | | | | | | | | | | | | | | | | | | | | | The old system was fairly convoluted: * A temporary label was created. * A single PROLOG_LABEL was created with it. * A few MCCFIInstructions were created with the same label. The semantics were that the cfi instructions were mapped to the PROLOG_LABEL via the temporary label. The output position was that of the PROLOG_LABEL. The temporary label itself was used only for doing the mapping. The new CFI_INSTRUCTION has a 1:1 mapping to MCCFIInstructions and points to one by holding an index into the CFI instructions of this function. I did consider removing MMI.getFrameInstructions completelly and having CFI_INSTRUCTION own a MCCFIInstruction, but MCCFIInstructions have non trivial constructors and destructors and are somewhat big, so the this setup is probably better. The net result is that we don't create temporary labels that are never used. llvm-svn: 203204
* [C++11] Replace llvm::next and llvm::prior with std::next and std::prev.Benjamin Kramer2014-03-021-1/+1
| | | | | | Remove the old functions. llvm-svn: 202636
* [Sparc] Bundle instruction with delay slow and its filler. Now, we can use ↵Venkatraman Govindaraju2014-01-111-19/+14
| | | | | | -verify-machineinstrs with SPARC backend. llvm-svn: 199014
* [Sparc] Add support for parsing jmpl instruction and make indirect call and ↵Venkatraman Govindaraju2014-01-101-8/+8
| | | | | | jmp instructions as aliases to jmpl. llvm-svn: 198909
* [Sparc] Do not hardcode nop in the delay slot of TLS_CALL. Use ↵Venkatraman Govindaraju2013-10-081-1/+2
| | | | | | DelaySlotFiller to fill the delay slot instead. llvm-svn: 192160
* [Sparc] Do not emit nop after fcmp* instruction with V9.Venkatraman Govindaraju2013-10-061-2/+15
| | | | llvm-svn: 192056
* [Sparc] Use call's debugloc for the unimp instruction.Venkatraman Govindaraju2013-07-301-1/+1
| | | | llvm-svn: 187402
* Don't cache the instruction and register info from the TargetMachine, becauseBill Wendling2013-06-071-3/+5
| | | | | | | | the internals of TargetMachine could change. No functionality change intended. llvm-svn: 183565
* Sparc: No functionality change. Cleanup whitespaces, comment formatting etc.,Venkatraman Govindaraju2013-06-041-37/+37
| | | | llvm-svn: 183243
* Sparc: Combine add/or/sethi instruction with restore if possible.Venkatraman Govindaraju2013-06-021-22/+177
| | | | llvm-svn: 183088
* [Sparc] Add support for leaf functions in sparc backend. Venkatraman Govindaraju2013-05-291-9/+19
| | | | llvm-svn: 182822
* [Sparc] Prevent instructions that defines or uses %o7 to be in call's delay ↵Venkatraman Govindaraju2013-05-161-5/+9
| | | | | | slot. llvm-svn: 182063
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-031-3/+3
| | | | | | | | | | | | | | | | | Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] llvm-svn: 169131
* Switch some getAliasSet clients to MCRegAliasIterator.Jakob Stoklund Olesen2012-06-011-7/+4
| | | | | | | MCRegAliasIterator can optionally visit the register itself, allowing for simpler code. llvm-svn: 157837
* Use uint16_t to store register overlaps to reduce static data.Craig Topper2012-03-041-1/+1
| | | | llvm-svn: 152001
* Add bundle aware API for querying instruction properties and switch the codeEvan Cheng2011-12-071-8/+8
| | | | | | | | | | | | | | generator to it. For non-bundle instructions, these behave exactly the same as the MC layer API. For properties like mayLoad / mayStore, look into the bundle and if any of the bundled instructions has the property it would return true. For properties like isPredicable, only return true if *all* of the bundled instructions have the property. For properties like canFoldAsLoad, isCompare, conservatively return false for bundles. llvm-svn: 146026
* - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo andEvan Cheng2011-06-281-1/+1
| | | | | | | | sink them into MC layer. - Added MCInstrInfo, which captures the tablegen generated static data. Chang TargetInstrInfo so it's based off MCInstrInfo. llvm-svn: 134021
* Generate correct Sparc32 ABI compliant code for functions that return a struct.Venkatraman Govindaraju2011-02-211-0/+31
| | | | llvm-svn: 126108
* Prevent IMPLICIT_DEF/KILL to become a delay filler instruction in SPARC backend.Venkatraman Govindaraju2011-02-121-0/+3
| | | | llvm-svn: 125444
* Sparc backend: Implements a delay slot filler that attempt to fill delay slotsVenkatraman Govindaraju2011-01-201-7/+220
| | | | | | with useful instructions. llvm-svn: 123884
* Reapply r110396, with fixes to appease the Linux buildbot gods.Owen Anderson2010-08-061-1/+1
| | | | llvm-svn: 110460
* Revert r110396 to fix buildbots.Owen Anderson2010-08-061-1/+1
| | | | llvm-svn: 110410
* Don't use PassInfo* as a type identifier for passes. Instead, use the ↵Owen Anderson2010-08-051-1/+1
| | | | | | | | address of the static ID member as the sole unique type identifier. Clean up APIs related to this change. llvm-svn: 110396
* use DebugLoc default ctor instead of DebugLoc::getUnknownLoc()Chris Lattner2010-04-021-1/+1
| | | | llvm-svn: 100214
* Remove non-DebugLoc versions of buildMI from Sparc.Dale Johannesen2009-02-131-1/+1
| | | | llvm-svn: 64435
* Tidy up several unbeseeming casts from pointer to intptr_t.Dan Gohman2008-09-041-1/+1
| | | | llvm-svn: 55779
* rename TargetInstrDescriptor -> TargetInstrDesc.Chris Lattner2008-01-071-1/+1
| | | | | | | Make MachineInstr::getDesc return a reference instead of a pointer, since it can never be null. llvm-svn: 45695
* Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflectsChris Lattner2008-01-071-1/+1
| | | | | | | | | | | | | | | that it is cheap and efficient to get. Move a variety of predicates from TargetInstrInfo into TargetInstrDescriptor, which makes it much easier to query a predicate when you don't have TII around. Now you can use MI->getDesc()->isBranch() instead of going through TII, and this is much more efficient anyway. Not all of the predicates have been moved over yet. Update old code that used MI->getInstrDescriptor()->Flags to use the new predicates in many places. llvm-svn: 45674
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+2
| | | | llvm-svn: 45418
* Drop 'const'Devang Patel2007-05-031-2/+2
| | | | llvm-svn: 36662
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