bcm5719-llvm - Project Ortega BCM5719 LLVM

	Commit message (Collapse)	Author	Age	Files	Lines
*	Revert "R600: Non vector only instruction can be scheduled on trans unit"	Tom Stellard	2013-07-31	1	-33/+5
\| \| \| \| \| \|	This reverts commit 98ce62780ea7185ba710868bf83c8077e8d7f6d6. llvm-svn: 187526
*	R600: Non vector only instruction can be scheduled on trans unit	Vincent Lejeune	2013-07-31	1	-5/+33
\| \| \| \|	llvm-svn: 187514
*	R600: Don't mix LDS and non-LDS instructions in the same group	Vincent Lejeune	2013-07-31	1	-0/+4
\| \| \| \| \| \| \| \|	There are a lot of restrictions on instruction groups that contain LDS instructions, so for now we will be conservative and not packetize anything else with them. llvm-svn: 187513
*	R600: Do not predicated basic block with multiple alu clause	Vincent Lejeune	2013-07-09	1	-1/+2
\| \| \| \| \| \| \| \| \|	Test is not included as it is several 1000 lines long. To test this functionnality, a test case must generate at least 2 ALU clauses, where an ALU clause is ~110 instructions long. NOTE: This is a candidate for the stable branch. llvm-svn: 185943
*	R600: Support schedule and packetization of trans-only inst	Vincent Lejeune	2013-06-29	1	-34/+56
\| \| \| \|	llvm-svn: 185268
*	R600: Add local memory support via LDS	Tom Stellard	2013-06-28	1	-0/+3
\| \| \| \| \|	Reviewed-by: Vincent Lejeune<vljn at ovi.com> llvm-svn: 185162
*	R600: Add support for GROUP_BARRIER instruction	Tom Stellard	2013-06-28	1	-1/+7
\| \| \| \| \|	Reviewed-by: Vincent Lejeune<vljn at ovi.com> llvm-svn: 185161
*	R600: Use new getNamedOperandIdx function generated by TableGen	Tom Stellard	2013-06-25	1	-9/+9
\| \| \| \|	llvm-svn: 184880
*	R600: 3 op instructions have no write bit but the result are store in PV	Vincent Lejeune	2013-06-03	1	-3/+1
\| \| \| \|	llvm-svn: 183111
*	Move passes from namespace llvm into anonymous namespaces. Sort includes ↵	Benjamin Kramer	2013-05-23	1	-12/+9
\| \| \| \| \| \|	while there. llvm-svn: 182594
*	R600: Relax some vector constraints on Dot4.	Vincent Lejeune	2013-05-17	1	-1/+2
\| \| \| \| \| \| \| \| \| \|	Dot4 now uses 8 scalar operands instead of 2 vectors one which allows register coalescer to remove some unneeded COPY. This patch also defines some structures/functions that can be used to handle every vector instructions (CUBE, Cayman special instructions...) in a similar fashion. llvm-svn: 182126
*	R600: Some factorization	Vincent Lejeune	2013-05-17	1	-138/+11
\| \| \| \|	llvm-svn: 182123
*	R600: If previous bundle is dot4, PV valid chan is always X	Vincent Lejeune	2013-05-02	1	-38/+51
\| \| \| \|	llvm-svn: 180959
*	R600: Packetize instructions	Vincent Lejeune	2013-04-30	1	-0/+446
	llvm-svn: 180760