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path: root/llvm/lib/Target/R600/R600Packetizer.cpp
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* R600: Support schedule and packetization of trans-only instVincent Lejeune2013-06-291-34/+56
| | | | llvm-svn: 185268
* R600: Add local memory support via LDSTom Stellard2013-06-281-0/+3
| | | | | Reviewed-by: Vincent Lejeune<vljn at ovi.com> llvm-svn: 185162
* R600: Add support for GROUP_BARRIER instructionTom Stellard2013-06-281-1/+7
| | | | | Reviewed-by: Vincent Lejeune<vljn at ovi.com> llvm-svn: 185161
* R600: Use new getNamedOperandIdx function generated by TableGenTom Stellard2013-06-251-9/+9
| | | | llvm-svn: 184880
* R600: 3 op instructions have no write bit but the result are store in PVVincent Lejeune2013-06-031-3/+1
| | | | llvm-svn: 183111
* Move passes from namespace llvm into anonymous namespaces. Sort includes ↵Benjamin Kramer2013-05-231-12/+9
| | | | | | while there. llvm-svn: 182594
* R600: Relax some vector constraints on Dot4.Vincent Lejeune2013-05-171-1/+2
| | | | | | | | | | Dot4 now uses 8 scalar operands instead of 2 vectors one which allows register coalescer to remove some unneeded COPY. This patch also defines some structures/functions that can be used to handle every vector instructions (CUBE, Cayman special instructions...) in a similar fashion. llvm-svn: 182126
* R600: Some factorizationVincent Lejeune2013-05-171-138/+11
| | | | llvm-svn: 182123
* R600: If previous bundle is dot4, PV valid chan is always XVincent Lejeune2013-05-021-38/+51
| | | | llvm-svn: 180959
* R600: Packetize instructionsVincent Lejeune2013-04-301-0/+446
llvm-svn: 180760
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