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path: root/llvm/lib/Target/R600/R600OptimizeVectorRegisters.cpp
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* Eliminate some deep std::vector copies. NFC.Benjamin Kramer2014-10-031-3/+2
| | | | llvm-svn: 218999
* Have MachineFunction cache a pointer to the subtarget to make lookupsEric Christopher2014-08-051-2/+1
| | | | | | | | | | | shorter/easier and have the DAG use that to do the same lookup. This can be used in the future for TargetMachine based caching lookups from the MachineFunction easily. Update the MIPS subtarget switching machinery to update this pointer at the same time it runs. llvm-svn: 214838
* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-1/+3
| | | | | | information and update all callers. No functional change. llvm-svn: 214781
* [C++11] Add 'override' keywords and remove 'virtual'. Additionally add ↵Craig Topper2014-04-291-3/+3
| | | | | | 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. R600 edition llvm-svn: 207503
* [C++] Use 'nullptr'. Target edition.Craig Topper2014-04-251-1/+1
| | | | llvm-svn: 207197
* [Modules] Fix potential ODR violations by sinking the DEBUG_TYPEChandler Carruth2014-04-221-1/+2
| | | | | | | definition below all of the header #include lines, lib/Target/... edition. llvm-svn: 206842
* Phase 2 of the great MachineRegisterInfo cleanup. This time, we're changingOwen Anderson2014-03-131-8/+9
| | | | | | | | | | operator* on the by-operand iterators to return a MachineOperand& rather than a MachineInstr&. At this point they almost behave like normal iterators! Again, this requires making some existing loops more verbose, but should pave the way for the big range-based for-loop cleanups in the future. llvm-svn: 203865
* Re-sort all of the includes with ./utils/sort_includes.py so thatChandler Carruth2014-01-071-2/+2
| | | | | | | | | | subsequent changes are easier to review. About to fix some layering issues, and wanted to separate out the necessary churn. Also comment and sink the include of "Windows.h" in three .inc files to match the usage in Memory.inc. llvm-svn: 198685
* Use llvm_unreachable instead of assert(0)Matt Arsenault2013-12-101-1/+1
| | | | llvm-svn: 196971
* R600: Enable folding of inline literals into REQ_SEQUENCE instructionsTom Stellard2013-08-161-0/+3
| | | | | Tested-by: Aaron Watry <awatry@gmail.com> llvm-svn: 188517
* R600: Do not mergevector after a vector reg is usedVincent Lejeune2013-07-311-1/+10
| | | | | | | | | | If we merge vector when a vector is used, it will generate an artificial antidependency that can prevent 2 tex/vtx instructions to use the same clause and thus generate extra clauses that reduce performance. There is no test case as such situation is really hard to predict. llvm-svn: 187516
* R600: Fix wrong export reswizzlingVincent Lejeune2013-07-091-4/+0
| | | | llvm-svn: 185941
* Don't cache the instruction and register info from the TargetMachine, becauseBill Wendling2013-06-071-1/+2
| | | | | | | | the internals of TargetMachine could change. No functionality change intended. llvm-svn: 183561
* Vincent says the element is at most once in the vector, so we don't need a ↵Benjamin Kramer2013-06-071-3/+7
| | | | | | full std::remove. llvm-svn: 183541
* R600: Fix a potential iterator invalidation issue.Benjamin Kramer2013-06-071-5/+3
| | | | | | As a bonus this reduces the loop from O(n^2) to O(n). llvm-svn: 183532
* R600: Remove an extra break in R600OptimizeVectorRegisters.cppVincent Lejeune2013-06-071-3/+1
| | | | llvm-svn: 183528
* R600: Rewrite an awkward loop in R600MachineSchedulerVincent Lejeune2013-06-061-7/+15
| | | | llvm-svn: 183458
* R600OptimizeVectorRegisters.cpp: Tweak a warning. [-Wsometimes-uninitialized]NAKAMURA Takumi2013-06-061-1/+1
| | | | | FIXME: Is it false alarm? llvm-svn: 183371
* R600OptimizeVectorRegisters.cpp: Suppress a warning. [-Wunused-variable]NAKAMURA Takumi2013-06-061-0/+1
| | | | llvm-svn: 183370
* Trailing linefeed.NAKAMURA Takumi2013-06-061-1/+0
| | | | llvm-svn: 183369
* R600: Add a pass that merge Vector RegisterVincent Lejeune2013-06-051-0/+363
| | | | | | | Previously commited @183279 but tests were failing, reverted @183286 It was broken because @183336 was missing, now it's there. llvm-svn: 183343
* Revert "R600: Add a pass that merge Vector Register"Rafael Espindola2013-06-051-363/+0
| | | | | | This reverts commit r183279. CodeGen/R600/texture-input-merge.ll was failing. llvm-svn: 183286
* R600: Add a pass that merge Vector RegisterVincent Lejeune2013-06-041-0/+363
llvm-svn: 183279
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