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path: root/llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp
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* R600: Anti dep better handled in tex clauseVincent Lejeune2013-06-071-6/+4
| | | | llvm-svn: 183592
* R600: Rework subtarget info and remove AMDILDevice classesTom Stellard2013-06-071-6/+8
| | | | | | | | This should simplify the subtarget definitions and make it easier to add new ones. Reviewed-by: Vincent Lejeune <vljn@ovi.com> llvm-svn: 183566
* Don't cache the instruction and register info from the TargetMachine, becauseBill Wendling2013-06-071-7/+9
| | | | | | | | the internals of TargetMachine could change. No functionality change intended. llvm-svn: 183561
* R600: CALL_FS consumes a stack size entryVincent Lejeune2013-06-031-0/+1
| | | | llvm-svn: 183108
* R600: Fix R600ControlFlowFinalizer not considering VTX_READ 128 bit dst regTom Stellard2013-05-231-2/+9
| | | | | | | | | Patch by: Vincent Lejeune https://bugs.freedesktop.org/show_bug.cgi?id=64877 NOTE: This is a candidate for the 3.3 branch. llvm-svn: 182600
* Move passes from namespace llvm into anonymous namespaces. Sort includes ↵Benjamin Kramer2013-05-231-4/+5
| | | | | | while there. llvm-svn: 182594
* Setting the default value (fixes CRT assertions about uninitialized variable ↵Aaron Ballman2013-05-231-3/+3
| | | | | | use when doing debug MSVC builds), and fixing coding style. llvm-svn: 182585
* R600: Some factorizationVincent Lejeune2013-05-171-9/+7
| | | | llvm-svn: 182123
* R600: Factorize Fetch size limit inside AMDGPUSubTargetVincent Lejeune2013-05-171-5/+2
| | | | llvm-svn: 182122
* R600: Signed literals are 64bits wideVincent Lejeune2013-05-021-3/+3
| | | | llvm-svn: 180960
* R600: use native for aluVincent Lejeune2013-04-301-1/+109
| | | | llvm-svn: 180761
* R600: Take inner dependency into tex/vtx clausesVincent Lejeune2013-04-301-0/+34
| | | | llvm-svn: 180757
* R600: Turn TEX/VTX into native instructionsVincent Lejeune2013-04-301-10/+31
| | | | llvm-svn: 180756
* R600: Add FetchInst bit to instruction defs to denote vertex/tex instructionsVincent Lejeune2013-04-301-36/+9
| | | | | | v2[Vincent Lejeune]: Split FetchInst into usesTextureCache/usesVertexCache llvm-svn: 180755
* R600: Use correct CF_END instruction on Northern Island GPUsTom Stellard2013-04-291-1/+1
| | | | llvm-svn: 180735
* R600: Use .AMDGPU.config section to emit stacksizeVincent Lejeune2013-04-231-5/+21
| | | | llvm-svn: 180124
* R600: Add CF_ENDVincent Lejeune2013-04-231-42/+49
| | | | llvm-svn: 180123
* R600ControlFlowFinalizer.cpp: Fix a warning. [-Wunused-variable]NAKAMURA Takumi2013-04-111-0/+1
| | | | llvm-svn: 179263
* Whitespace.NAKAMURA Takumi2013-04-111-2/+1
| | | | llvm-svn: 179262
* R600: Add VTX_READ_* and RAT_WRITE_CACHELESS_* when computing cf addrVincent Lejeune2013-04-101-1/+10
| | | | llvm-svn: 179174
* R600: Control Flow support for pre EG genVincent Lejeune2013-04-081-12/+72
| | | | llvm-svn: 179020
* R600: Fix wrong address when substituting ENDIFVincent Lejeune2013-04-041-1/+1
| | | | llvm-svn: 178762
* R600: Take export into account when computing cf addressVincent Lejeune2013-04-041-0/+4
| | | | llvm-svn: 178761
* R600: Simplify data structure and add DEBUG to R600ControlFlowFinalizerVincent Lejeune2013-04-031-20/+21
| | | | llvm-svn: 178665
* R600: Consider KILLGT as an ALU instructionVincent Lejeune2013-04-031-1/+0
| | | | | | | Mesa does not override llvm behavior wrt KILLGT anymore so llvm has to handle KILLGT on its own. llvm-svn: 178664
* R600: Add support for native control flowVincent Lejeune2013-04-011-0/+264
llvm-svn: 178505
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