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path: root/llvm/lib/Target/R600/AMDGPUTargetMachine.h
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* R600/SI: Add a stub GCNTargetMachineTom Stellard2015-01-061-0/+17
| | | | | | | | | | | | This is equivalent to the AMDGPUTargetMachine now, but it is the starting point for separating R600 and GCN functionality into separate targets. It is recommened that users start using the gcn triple for GCN-based GPUs, because using the r600 triple for these GPUs will be deprecated in the future. llvm-svn: 225277
* This patch changes the ownership of TLOF from TargetLoweringBase to ↵Aditya Nandakumar2014-11-131-0/+4
| | | | | | TargetMachine so that different subtargets could share the TLOF effectively llvm-svn: 221878
* Reverting NFC changes from r218050. Instead, the warning was disabled for ↵Aaron Ballman2014-09-181-2/+0
| | | | | | GCC in r218059, so these changes are no longer required. llvm-svn: 218062
* Fixing a bunch of -Woverloaded-virtual warnings due to hiding ↵Aaron Ballman2014-09-181-0/+2
| | | | | | getSubtargetImpl from the base class. NFC. llvm-svn: 218050
* Add override to overriden virtual methods, remove virtual keywords.Benjamin Kramer2014-09-031-1/+3
| | | | | | No functionality change. Changes made by clang-tidy + some manual cleanup. llvm-svn: 217028
* Canonicalize header guards into a common format.Benjamin Kramer2014-08-131-3/+3
| | | | | | | | | | Add header guards to files that were missing guards. Remove #endif comments as they don't seem common in LLVM (we can easily add them back if we decide they're useful) Changes made by clang-tidy with minor tweaks. llvm-svn: 215558
* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-21/+1
| | | | | | information and update all callers. No functional change. llvm-svn: 214781
* Move the R600 intrinsic support back to the target machine - there'sEric Christopher2014-08-041-2/+2
| | | | | | | nothing subtarget dependent about the intrinsic support in any backend as far as I can tell. llvm-svn: 214738
* Move R600 subtarget dependent variables onto the subtarget.Eric Christopher2014-07-251-11/+8
| | | | | | No functional change. llvm-svn: 213982
* R600: Rename AMDIL fileMatt Arsenault2014-06-231-1/+1
| | | | llvm-svn: 211512
* R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtargetTom Stellard2014-06-131-3/+2
| | | | llvm-svn: 210869
* [C++11] Add 'override' keywords and remove 'virtual'. Additionally add ↵Craig Topper2014-04-291-10/+12
| | | | | | 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. R600 edition llvm-svn: 207503
* [C++11] Replace OwningPtr with std::unique_ptr in places where it doesn't ↵Benjamin Kramer2014-04-211-3/+2
| | | | | | | | break the API. No functionality change. llvm-svn: 206740
* SimplifyCFG: Use parallel-and and parallel-or mode to consolidate branch ↵Tom Stellard2013-07-271-0/+3
| | | | | | | | | | | | | | conditions Merge consecutive if-regions if they contain identical statements. Both transformations reduce number of branches. The transformation is guarded by a target-hook, and is currently enabled only for +R600, but the correctness has been tested on X86 target using a variety of CPU benchmarks. Patch by: Mei Ye llvm-svn: 187278
* Remove dead prototype.Bill Wendling2013-06-181-2/+0
| | | | llvm-svn: 184173
* Fix a leak on the r600 backend.Rafael Espindola2013-05-231-4/+8
| | | | | | This should bring the valgrind bot back to life. llvm-svn: 182561
* clang-format this file.Rafael Espindola2013-05-231-29/+25
| | | | llvm-svn: 182560
* R600: Support for indirect addressing v4Tom Stellard2013-02-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Only implemented for R600 so far. SI is missing implementations of a few callbacks used by the Indirect Addressing pass and needs code to handle frame indices. At the moment R600 only supports array sizes of 16 dwords or less. Register packing of vector types is currently disabled, which means that a vec4 is stored in T0_X, T1_X, T2_X, T3_X, rather than T0_XYZW. In order to correctly pack registers in all cases, we will need to implement an analysis pass for R600 that determines the correct vector width for each array. v2: - Add support for i8 zext load from stack. - Coding style fixes v3: - Don't reserve registers for indirect addressing when it isn't being used. - Fix bug caused by LLVM limiting the number of SubRegIndex declarations. v4: - Fix 64-bit defines llvm-svn: 174525
* Move all of the header files which are involved in modelling the LLVM IRChandler Carruth2013-01-021-1/+1
| | | | | | | | | | | | | | | | | | | | | into their new header subdirectory: include/llvm/IR. This matches the directory structure of lib, and begins to correct a long standing point of file layout clutter in LLVM. There are still more header files to move here, but I wanted to handle them in separate commits to make tracking what files make sense at each layer easier. The only really questionable files here are the target intrinsic tablegen files. But that's a battle I'd rather not fight today. I've updated both CMake and Makefile build systems (I think, and my tests think, but I may have missed something). I've also re-sorted the includes throughout the project. I'll be committing updates to Clang, DragonEgg, and Polly momentarily. llvm-svn: 171366
* Add R600 backendTom Stellard2012-12-111-0/+70
A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX llvm-svn: 169915
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