summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/R600/AMDGPUISelLowering.cpp
Commit message (Expand)AuthorAgeFilesLines
* R600/SI: Remove v_sub_f64 pseudoMatt Arsenault2015-02-201-0/+3
* R600: Use new fmad node.Matt Arsenault2015-02-201-1/+7
* R600/SI: Fix implicit vcc operand to v_div_fmas_*Matt Arsenault2015-02-141-3/+2
* R600/SI: Make more store operations legalTom Stellard2015-02-041-3/+0
* R600: Don't promote i64 stores to v2i32 during DAG legalizationTom Stellard2015-02-041-3/+0
* Reuse a bunch of cached subtargets and remove getSubtarget callsEric Christopher2015-01-301-7/+4
* Move DataLayout back to the TargetMachine from TargetSubtargetInfoEric Christopher2015-01-261-2/+2
* R600/SI: Move i64 -> v2i32 load promotion into AMDGPUDAGToDAGISel::Select()Tom Stellard2015-01-231-3/+0
* R600: Try to use lower types for 64bit division if possibleJan Vesely2015-01-221-12/+38
* R600: Simplify LowerUDIVREMJan Vesely2015-01-221-19/+11
* R600/SI: Custom lower froundMatt Arsenault2015-01-211-10/+113
* Implement new way of expanding extloads.Matt Arsenault2015-01-141-18/+8
* R600: Implement getRecipEstimateMatt Arsenault2015-01-131-0/+23
* R600: Implement getRsqrtEstimateMatt Arsenault2015-01-131-0/+18
* R600: Make cttz / ctlz cheap to speculateMatt Arsenault2015-01-131-0/+12
* [SelectionDAG] Allow targets to specify legality of extloads' resultAhmed Bougacha2015-01-081-13/+16
* R600/SI: Add class intrinsicMatt Arsenault2015-01-061-0/+5
* R600: Remove outdated commentMatt Arsenault2014-12-191-4/+0
* R600/SI: Only form min/max with 1 use.Matt Arsenault2014-12-191-1/+1
* R600: Fix min/max matching problems with unordered comparesMatt Arsenault2014-12-121-42/+43
* Add target hook for whether it is profitable to reduce load widthsMatt Arsenault2014-12-121-0/+23
* R600/SI: Update instruction conversions for VIMarek Olsak2014-12-071-1/+19
* R600/SI: Use ZeroOrNegativeOneBooleanContentMatt Arsenault2014-11-261-0/+3
* R600: Fix assert on copy of an i1 on pre-SIMatt Arsenault2014-11-231-1/+2
* R600: Permute operands when selecting legacy min/maxMatt Arsenault2014-11-151-6/+9
* R600: Fix 64-bit integer divisionTom Stellard2014-11-151-2/+2
* R600: Factor i64 UDIVREM lowering into its own fuctionTom Stellard2014-11-151-0/+81
* R600/SI: Combine min3/max3 instructionsMatt Arsenault2014-11-141-0/+6
* R600/SI: Match integer min / max instructionsMatt Arsenault2014-11-141-21/+69
* R600/SI: Fix fmin_legacy / fmax_legacy matching for SIMatt Arsenault2014-11-131-19/+50
* We can get the TLOF from the TargetMachine - so constructor no longer require...Aditya Nandakumar2014-11-131-1/+1
* R600: Error on initializer for LDS.Matt Arsenault2014-11-131-2/+21
* This patch changes the ownership of TLOF from TargetLoweringBase to TargetMac...Aditya Nandakumar2014-11-131-1/+1
* Add minnum / maxnum codegenMatt Arsenault2014-10-211-0/+2
* R600/SI: Add missing parameter to div_fmas intrinsicMatt Arsenault2014-10-211-0/+2
* R600: Fix nonsensical implementation of computeKnownBits for BFEMatt Arsenault2014-10-161-5/+1
* R600: Remove dead functionMatt Arsenault2014-10-161-12/+0
* R600: Remove unnecessary part of computeKnownBitsForTargetNodeMatt Arsenault2014-10-151-5/+0
* Move variable down to useMatt Arsenault2014-10-151-4/+4
* R600: Fix miscompiles when BFE has multiple usesMatt Arsenault2014-10-151-7/+10
* R600: Use existing variableMatt Arsenault2014-10-151-1/+1
* R600: Remove outdated commentMatt Arsenault2014-10-151-3/+0
* R600/SI: Custom lower f64 -> i64 conversionsMatt Arsenault2014-10-031-0/+53
* R600: Custom lower [s|u]int_to_fp for i64 -> f64Matt Arsenault2014-10-031-2/+43
* R600/SI: Fix ftrunc f64 conformance failures.Matt Arsenault2014-10-031-1/+1
* R600/SI: Add a note about the order of the operands to div_scaleMatt Arsenault2014-09-261-0/+6
* R600: Don't set BypassSlowDiv for 64-bit divisionTom Stellard2014-09-221-3/+0
* R600/SI: Use ISD::MUL instead of ISD::UMULO when lowering divisionTom Stellard2014-09-221-3/+3
* R600: Better fix for bug 20982Matt Arsenault2014-09-191-6/+3
* R600: Bug 20982 - Avoid undefined left shift of negative valueMatt Arsenault2014-09-181-3/+10
OpenPOWER on IntegriCloud