bcm5719-llvm - Project Ortega BCM5719 LLVM

	Commit message (Collapse)	Author	Age	Files	Lines
*	Canonicalize header guards into a common format.	Benjamin Kramer	2014-08-13	1	-3/+3
\| \| \| \| \| \| \| \| \| \|	Add header guards to files that were missing guards. Remove #endif comments as they don't seem common in LLVM (we can easily add them back if we decide they're useful) Changes made by clang-tidy with minor tweaks. llvm-svn: 215558
*	De-virtualize or remove some methods that have no overrides nor override ↵	Craig Topper	2014-04-30	1	-1/+1
\| \| \| \| \| \|	anything. In some cases remove all together if there are no callers either. llvm-svn: 207610
*	[C++11] Add 'override' keywords and remove 'virtual'. Additionally add ↵	Craig Topper	2014-04-29	1	-6/+7
\| \| \| \| \| \|	'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. R600 edition llvm-svn: 207503
*	R600: Support for indirect addressing v4	Tom Stellard	2013-02-06	1	-0/+44
	Only implemented for R600 so far. SI is missing implementations of a few callbacks used by the Indirect Addressing pass and needs code to handle frame indices. At the moment R600 only supports array sizes of 16 dwords or less. Register packing of vector types is currently disabled, which means that a vec4 is stored in T0_X, T1_X, T2_X, T3_X, rather than T0_XYZW. In order to correctly pack registers in all cases, we will need to implement an analysis pass for R600 that determines the correct vector width for each array. v2: - Add support for i8 zext load from stack. - Coding style fixes v3: - Don't reserve registers for indirect addressing when it isn't being used. - Fix bug caused by LLVM limiting the number of SubRegIndex declarations. v4: - Fix 64-bit defines llvm-svn: 174525