| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Implement floating point select for lt, gt, le, ge using the powerpc fsel | Nate Begeman | 2004-10-06 | 1 | -25/+113 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | instruction. Now, rather than emitting the following loop out of bisect: .LBB_main_19: ; no_exit.0.i rlwinm r3, r2, 3, 0, 28 lfdx f1, r3, r27 addis r3, r30, ha16(.CPI_main_1-"L00000$pb") lfd f2, lo16(.CPI_main_1-"L00000$pb")(r3) fsub f2, f2, f1 addis r3, r30, ha16(.CPI_main_1-"L00000$pb") lfd f4, lo16(.CPI_main_1-"L00000$pb")(r3) fcmpu cr0, f1, f4 bge .LBB_main_64 ; no_exit.0.i .LBB_main_63: ; no_exit.0.i b .LBB_main_65 ; no_exit.0.i .LBB_main_64: ; no_exit.0.i fmr f2, f1 .LBB_main_65: ; no_exit.0.i addi r3, r2, 1 rlwinm r3, r3, 3, 0, 28 lfdx f1, r3, r27 addis r3, r30, ha16(.CPI_main_1-"L00000$pb") lfd f4, lo16(.CPI_main_1-"L00000$pb")(r3) fsub f4, f4, f1 addis r3, r30, ha16(.CPI_main_1-"L00000$pb") lfd f5, lo16(.CPI_main_1-"L00000$pb")(r3) fcmpu cr0, f1, f5 bge .LBB_main_67 ; no_exit.0.i .LBB_main_66: ; no_exit.0.i b .LBB_main_68 ; no_exit.0.i .LBB_main_67: ; no_exit.0.i fmr f4, f1 .LBB_main_68: ; no_exit.0.i fadd f1, f2, f4 addis r3, r30, ha16(.CPI_main_2-"L00000$pb") lfd f2, lo16(.CPI_main_2-"L00000$pb")(r3) fmul f1, f1, f2 rlwinm r3, r2, 3, 0, 28 lfdx f2, r3, r28 fadd f4, f2, f1 fcmpu cr0, f4, f0 bgt .LBB_main_70 ; no_exit.0.i .LBB_main_69: ; no_exit.0.i b .LBB_main_71 ; no_exit.0.i .LBB_main_70: ; no_exit.0.i fmr f0, f4 .LBB_main_71: ; no_exit.0.i fsub f1, f2, f1 addi r2, r2, -1 fcmpu cr0, f1, f3 blt .LBB_main_73 ; no_exit.0.i .LBB_main_72: ; no_exit.0.i b .LBB_main_74 ; no_exit.0.i .LBB_main_73: ; no_exit.0.i fmr f3, f1 .LBB_main_74: ; no_exit.0.i cmpwi cr0, r2, -1 fmr f16, f0 fmr f17, f3 bgt .LBB_main_19 ; no_exit.0.i We emit this instead: .LBB_main_19: ; no_exit.0.i rlwinm r3, r2, 3, 0, 28 lfdx f1, r3, r27 addis r3, r30, ha16(.CPI_main_1-"L00000$pb") lfd f2, lo16(.CPI_main_1-"L00000$pb")(r3) fsub f2, f2, f1 fsel f1, f1, f1, f2 addi r3, r2, 1 rlwinm r3, r3, 3, 0, 28 lfdx f2, r3, r27 addis r3, r30, ha16(.CPI_main_1-"L00000$pb") lfd f4, lo16(.CPI_main_1-"L00000$pb")(r3) fsub f4, f4, f2 fsel f2, f2, f2, f4 fadd f1, f1, f2 addis r3, r30, ha16(.CPI_main_2-"L00000$pb") lfd f2, lo16(.CPI_main_2-"L00000$pb")(r3) fmul f1, f1, f2 rlwinm r3, r2, 3, 0, 28 lfdx f2, r3, r28 fadd f4, f2, f1 fsub f5, f0, f4 fsel f0, f5, f0, f4 fsub f1, f2, f1 addi r2, r2, -1 fsub f2, f1, f3 fsel f3, f2, f3, f1 cmpwi cr0, r2, -1 fmr f16, f0 fmr f17, f3 bgt .LBB_main_19 ; no_exit.0.i llvm-svn: 16764 | ||||
| * | Generate better code by being far less clever when it comes to the select ↵ | Nate Begeman | 2004-09-29 | 1 | -7/+17 |
| | | | | | | | instruction. Don't create overlapping register lifetimes llvm-svn: 16580 | ||||
| * | improve Type::BoolTy codegen by eliminating unnecessary clears and sign extends | Nate Begeman | 2004-09-29 | 1 | -1/+8 |
| | | | | | llvm-svn: 16578 | ||||
| * | To go along with sabre's improved InstCombining, improve recognition of | Nate Begeman | 2004-09-29 | 1 | -21/+9 |
| | | | | | | | | | | | | | | | | integers that we can use as immediate values in instructions. Example from yacr2: - lis r10, -1 - ori r10, r10, 65535 - add r28, r28, r10 + addi r28, r28, -1 addi r7, r7, 1 addi r9, r9, 1 b .LBB_main_9 ; loopentry.1.i214 llvm-svn: 16566 | ||||
| * | Correct some BuildMI arguments for the upcoming simple scheduler | Nate Begeman | 2004-09-27 | 3 | -3/+3 |
| | | | | | llvm-svn: 16519 | ||||
| * | Fix the last of the major PPC GEP folding deficiencies. This will allow | Nate Begeman | 2004-09-23 | 1 | -178/+163 |
| | | | | | | | | | the ISel to use indexed and non-zero immediate offsets for GEPs that have more than one use. This is common for instruction sequences such as a load followed by a modify and store to the same address. llvm-svn: 16493 | ||||
| * | add optimized code sequences for setcc x, 0 | Nate Begeman | 2004-09-22 | 3 | -7/+96 |
| | | | | | llvm-svn: 16478 | ||||
| * | s/ISel/PPC64ISel/ to have unique class names for debugging via gdb because the | Misha Brukman | 2004-09-21 | 1 | -78/+81 |
| | | | | | | | C++ front-end in gcc does not mangle classes in anonymous namespaces correctly. llvm-svn: 16471 | ||||
| * | s/ISel/PPC32ISel/ to have unique class names for debugging via gdb because the | Misha Brukman | 2004-09-21 | 1 | -87/+90 |
| | | | | | | | C++ front-end in gcc does not mangle classes in anonymous namespaces correctly. llvm-svn: 16470 | ||||
| * | Revamp the Register class, and allow the use of the RegisterGroup class to | Chris Lattner | 2004-09-14 | 1 | -29/+49 |
| | | | | | | | | | specify aliases directly in register definitions. Patch contributed by Jason Eckhardt! llvm-svn: 16330 | ||||
| * | Add 64 bit divide instructions, and use them | Nate Begeman | 2004-09-06 | 2 | -34/+15 |
| | | | | | llvm-svn: 16198 | ||||
| * | * Change PPC32AsmPrinter => PowerPCAsmPrinter since it is now shared between | Misha Brukman | 2004-09-05 | 3 | -13/+59 |
| | | | | | | | | | Darwin and AIX and is not 32- or 64-bit specific * Bring back PowerPC.td as a result, to make it use the `PowerPC' class name * Adjust Makefile accordingly llvm-svn: 16174 | ||||
| * | Renamed PPC32AsmPrinter.cpp => PowerPCAsmPrinter.cpp as the Darwin and AIX asm | Misha Brukman | 2004-09-05 | 1 | -0/+0 |
| | | | | | | | printers are now unified into one file. llvm-svn: 16173 | ||||
| * | Include MathExtras.h to fix build breakage, thanks to Vladimir | Nate Begeman | 2004-09-04 | 1 | -0/+1 |
| | | | | | llvm-svn: 16164 | ||||
| * | All PPC instructions are now auto-printed | Nate Begeman | 2004-09-04 | 10 | -1014/+562 |
| | | | | | | | | 32 and 64 bit AsmWriters unified Darwin and AIX specific features of AsmWriter split out llvm-svn: 16163 | ||||
| * | Convert remaining X-Form and Pseudo instructions over to asm writer | Nate Begeman | 2004-09-02 | 5 | -83/+81 |
| | | | | | llvm-svn: 16142 | ||||
| * | Changes For Bug 352 | Reid Spencer | 2004-09-01 | 9 | -22/+22 |
| | | | | | | | | | Move include/Config and include/Support into include/llvm/Config, include/llvm/ADT and include/llvm/Support. From here on out, all LLVM public header files must be under include/llvm/. llvm-svn: 16137 | ||||
| * | convert M and MD form instructions to generated asm writer | Nate Begeman | 2004-08-31 | 2 | -20/+41 |
| | | | | | llvm-svn: 16121 | ||||
| * | Move yet more instructions over to being printed by the generated asm writer | Nate Begeman | 2004-08-30 | 3 | -134/+182 |
| | | | | | llvm-svn: 16112 | ||||
| * | Convert A-Form instructions to auto-generated asm writer | Nate Begeman | 2004-08-29 | 2 | -45/+62 |
| | | | | | llvm-svn: 16107 | ||||
| * | Improvements to int->float cast code for PPC-64 | Nate Begeman | 2004-08-29 | 3 | -61/+60 |
| | | | | | llvm-svn: 16105 | ||||
| * | Implement the following missing functionality in the PPC backend: | Nate Begeman | 2004-08-29 | 3 | -66/+137 |
| | | | | | | | | | | cast fp->bool cast ulong->fp algebraic right shift long by non-constant value These changes tested across most of the test suite. Fixes Regression/casts llvm-svn: 16081 | ||||
| * | Register sizes are in bits, not bytes | Nate Begeman | 2004-08-27 | 2 | -3/+3 |
| | | | | | llvm-svn: 16070 | ||||
| * | Kill a majority of unnecessary sign extensions for byte loads | Nate Begeman | 2004-08-22 | 1 | -12/+30 |
| | | | | | llvm-svn: 15991 | ||||
| * | Don't hard code the offset of the saved R31 in functions with frame pointers | Nate Begeman | 2004-08-22 | 1 | -1/+2 |
| | | | | | llvm-svn: 15990 | ||||
| * | Back out branchless SetCC code. While it helped a lot in some cases, it | Nate Begeman | 2004-08-21 | 1 | -188/+25 |
| | | | | | | | | | hurt a lot in others. Instead, improve branching version of SetCC and Select instructions. The old code will be in CVS should we ever need to dig it up again. llvm-svn: 15979 | ||||
| * | Switch from bytes to bits for alignment. | Chris Lattner | 2004-08-21 | 2 | -6/+6 |
| | | | | | | | Also, change GPRC for PPC32 to align on 32-bit boundary instead of 64-bit llvm-svn: 15975 | ||||
| * | Reduce uses of getRegClass | Chris Lattner | 2004-08-21 | 2 | -8/+6 |
| | | | | | llvm-svn: 15968 | ||||
| * | Fix warning | Chris Lattner | 2004-08-21 | 1 | -1/+1 |
| | | | | | llvm-svn: 15964 | ||||
| * | Move XForm instructions over to the auto-generated asm writer | Nate Begeman | 2004-08-21 | 3 | -71/+133 |
| | | | | | llvm-svn: 15962 | ||||
| * | remove some things from the todo list. | Nate Begeman | 2004-08-20 | 1 | -6/+0 |
| | | | | | llvm-svn: 15956 | ||||
| * | Do not register ppc64 yet, as it breaks the SparcV9 backend | Chris Lattner | 2004-08-20 | 1 | -0/+3 |
| | | | | | llvm-svn: 15955 | ||||
| * | Implement code to convert SetCC into straight line code where appropriate. ↵ | Nate Begeman | 2004-08-20 | 2 | -22/+173 |
| | | | | | | | Add necessary instructions for this transformation to the .td file. llvm-svn: 15952 | ||||
| * | Fix opcodes being printed in caps (the more general fix may be `AsmWriter') | Misha Brukman | 2004-08-19 | 1 | -1/+1 |
| | | | | | llvm-svn: 15932 | ||||
| * | Stack space for argument passing is 32 regardless of 32- vs. 64-bit arch. | Misha Brukman | 2004-08-19 | 1 | -6/+6 |
| | | | | | | | Thanks to Nate Begeman for pointing this out. llvm-svn: 15930 | ||||
| * | LR needs to be saved at 16-byte offset on a 64-bit arch | Misha Brukman | 2004-08-19 | 2 | -6/+6 |
| | | | | | llvm-svn: 15929 | ||||
| * | On 64-bit PowerPC, pointers are 8 bytes, so parameter area offset is 48, not 24 | Misha Brukman | 2004-08-19 | 1 | -7/+10 |
| | | | | | llvm-svn: 15928 | ||||
| * | This PHI has 4 additional operands, not 2. | Misha Brukman | 2004-08-19 | 1 | -1/+1 |
| | | | | | llvm-svn: 15926 | ||||
| * | Use the appropriate 64-bit register description file. | Misha Brukman | 2004-08-19 | 1 | -1/+1 |
| | | | | | llvm-svn: 15922 | ||||
| * | Fix more remaining 32-bit vestiges of PowerPC | Misha Brukman | 2004-08-19 | 1 | -6/+2 |
| | | | | | llvm-svn: 15919 | ||||
| * | Fix another vestige of the 32-bit PowerPC backend. | Misha Brukman | 2004-08-19 | 1 | -3/+1 |
| | | | | | llvm-svn: 15918 | ||||
| * | Correct character prepended to global symbols ('.'), use Mangler consistently | Misha Brukman | 2004-08-19 | 1 | -2/+2 |
| | | | | | llvm-svn: 15917 | ||||
| * | * Eliminate global base register, r2 is used for that on AIX/PowerPC | Misha Brukman | 2004-08-19 | 1 | -45/+6 |
| | | | | | | | * Fix bug from 32-bit PowerPC days of 2-register long split llvm-svn: 15916 | ||||
| * | Wrap long lines. | Misha Brukman | 2004-08-19 | 1 | -4/+5 |
| | | | | | llvm-svn: 15915 | ||||
| * | Convert casts that will have no effect into move instructions. | Nate Begeman | 2004-08-19 | 1 | -4/+22 |
| | | | | | llvm-svn: 15914 | ||||
| * | Clean up floating point instruction selection. | Nate Begeman | 2004-08-19 | 4 | -110/+30 |
| | | | | | | | | | Change int->float cast code to put conversion constants in constant pool. Shorten code sequence for constant pool fp loads. Remove LOADLoDirect/LOADLoIndirect psuedo instructions and tweak asmwriter llvm-svn: 15913 | ||||
| * | Rename var | Chris Lattner | 2004-08-18 | 1 | -3/+3 |
| | | | | | llvm-svn: 15897 | ||||
| * | This file is no longer used. | Misha Brukman | 2004-08-17 | 1 | -30/+0 |
| | | | | | llvm-svn: 15893 | ||||
| * | Start using alignment output routines from AsmPrinter. | Chris Lattner | 2004-08-17 | 1 | -12/+12 |
| | | | | | | | | | Changes to make this more similar to the X86 asmprinter Fix overalignment of globals. llvm-svn: 15891 | ||||
| * | Print comments with ; | Chris Lattner | 2004-08-17 | 1 | -0/+1 |
| | | | | | llvm-svn: 15881 | ||||

