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* X11/X2 loads around indirect calls on ppc64 should not be deleted.Hal Finkel2012-02-241-2/+4
| | | | llvm-svn: 151374
* MCize function entry label emission on PowerPC64 properly.Roman Divacky2012-02-231-6/+14
| | | | llvm-svn: 151278
* Allow the use of an alternate symbol for calculating a function's size.Hal Finkel2012-02-221-1/+5
| | | | | | | | | | | | | The standard function epilog includes a .size directive, but ppc64 uses an alternate local symbol to tag the actual start of each function. Until recently, binutils accepted the .size directive as: .size test1, .Ltmp0-test1 however, using this directive with recent binutils will result in the error: .size expression for XXX does not evaluate to a constant so we must use the label which actually tags the start of the function. llvm-svn: 151200
* Make all pointers to TargetRegisterClass const since they are all pointers ↵Craig Topper2012-02-221-1/+1
| | | | | | to static data that should not be modified. llvm-svn: 151134
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, ↵Jia Liu2012-02-1834-62/+62
| | | | | | MSP430, PPC, PTX, Sparc, X86, XCore. llvm-svn: 150878
* Move pass configuration out of pass constructors: BranchFolderPassAndrew Trick2012-02-081-6/+7
| | | | llvm-svn: 150095
* Convert assert(0) to llvm_unreachableCraig Topper2012-02-074-8/+6
| | | | llvm-svn: 149961
* Convert assert(0) to llvm_unreachableCraig Topper2012-02-051-0/+1
| | | | llvm-svn: 149814
* TargetPassConfig: confine the MC configuration to TargetMachine.Andrew Trick2012-02-042-8/+5
| | | | | | | | | | Passes prior to instructon selection are now split into separate configurable stages. Header dependencies are simplified. The bulk of this diff is simply removal of the silly DisableVerify flags. Sorry for the target header churn. Attempting to stabilize them. llvm-svn: 149754
* Added TargetPassConfig. The first little step toward configuring codegen passes.Andrew Trick2012-02-032-10/+33
| | | | | | | | | | | Allows command line overrides to be centralized in LLVMTargetMachine.cpp. LLVMTargetMachine can intercept common passes and give precedence to command line overrides. Allows adding "internal" target configuration options without touching TargetOptions. Encapsulates the PassManager. Provides a good point to initialize all CodeGen passes so that Pass ID's can be used in APIs. Allows modifying the target configuration hooks without rebuilding the world. llvm-svn: 149672
* whitespaceAndrew Trick2012-02-032-9/+9
| | | | llvm-svn: 149671
* Widen the instruction encoder that TblGen emits to a 64 bits, which should ↵Owen Anderson2012-01-242-2/+2
| | | | | | accomodate every target I can think of offhand. llvm-svn: 148833
* More dead code removal (using -Wunreachable-code)David Blaikie2012-01-202-2/+0
| | | | llvm-svn: 148578
* Remove a bunch of unused variable assignments.Benjamin Kramer2012-01-201-2/+1
| | | | | | Found by the clang static analyzer. llvm-svn: 148541
* Ignore register mask operands when lowering instructions to MC.Jakob Stoklund Olesen2012-01-181-0/+2
| | | | | | | This is similar to implicit register operands. MC doesn't understand register liveness and call clobbers. llvm-svn: 148437
* Tidy up. 80 columns.Jim Grosbach2012-01-181-13/+13
| | | | llvm-svn: 148401
* Tidy up. MCAsmBackend naming conventions.Jim Grosbach2012-01-181-7/+7
| | | | llvm-svn: 148400
* Cleanup PPC RLWINM8 vs RLWINMHal Finkel2012-01-161-1/+1
| | | | | | No test case: output assembly will be identical. llvm-svn: 148261
* Return an ArrayRef from ShuffleVectorSDNode::getMask and push it through ↵Benjamin Kramer2012-01-151-2/+1
| | | | | | CodeGen. llvm-svn: 148218
* Remove unnecessary default cases in switches that cover all enum values.David Blaikie2012-01-101-1/+0
| | | | llvm-svn: 147855
* Remove VectorExtras. This unused helper was written for a type of API that ↵Benjamin Kramer2012-01-071-1/+0
| | | | | | is discouraged now. llvm-svn: 147738
* Cleanup stack/frame register define/kill states. This fixes two bugs:Hal Finkel2011-12-302-17/+17
| | | | | | | | 1. The ST*UX instructions that store and update the stack pointer did not set define/kill on R1. This became a problem when I activated post-RA scheduling (and had incorrectly adjusted the Frames-large test). 2. eliminateFrameIndex did not kill its scavenged temporary register, and this could cause the scavenger to exhaust all available registers (and its emergency spill slot) when there were a lot of CR values to spill. The 2010-02-12-saveCR test has been adjusted to check for this. llvm-svn: 147359
* Fix an incomplete refactoring of the ppc backend. Thanks to rdivacky for ↵Rafael Espindola2011-12-222-15/+3
| | | | | | | | reporting it. It does need some some tests... llvm-svn: 147154
* Fix cmake.Rafael Espindola2011-12-221-0/+1
| | | | llvm-svn: 147126
* Move PPC bits to lib/Target/PowerPC.Rafael Espindola2011-12-222-1/+112
| | | | llvm-svn: 147124
* Reduce the exposure of Triple::OSType in the ELF object writer. This willRafael Espindola2011-12-211-7/+8
| | | | | | | avoid including ADT/Triple.h in many places when the target specific bits are moved. llvm-svn: 147059
* Fix up the CMake build for the new files added in r146960, they'reChandler Carruth2011-12-201-0/+1
| | | | | | likely to stay either way that discussion ends up resolving itself. llvm-svn: 146966
* Unweaken vtables as per ↵David Blaikie2011-12-206-3/+32
| | | | | | http://llvm.org/docs/CodingStandards.html#ll_virtual_anch llvm-svn: 146960
* Ensure that the nop that should follow a bl call in PPC64 ELF actually doesHal Finkel2011-12-152-0/+14
| | | | llvm-svn: 146664
* Initial CodeGen support for CTTZ/CTLZ where a zero input produces anChandler Carruth2011-12-131-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | undefined result. This adds new ISD nodes for the new semantics, selecting them when the LLVM intrinsic indicates that the undef behavior is desired. The new nodes expand trivially to the old nodes, so targets don't actually need to do anything to support these new nodes besides indicating that they should be expanded. I've done this for all the operand types that I could figure out for all the targets. Owners of various targets, please review and let me know if any of these are incorrect. Note that the expand behavior is *conservatively correct*, and exactly matches LLVM's current behavior with these operations. Ideally this patch will not change behavior in any way. For example the regtest suite finds the exact same instruction sequences coming out of the code generator. That's why there are no new tests here -- all of this is being exercised by the existing test suite. Thanks to Duncan Sands for reviewing the various bits of this patch and helping me get the wrinkles ironed out with expanding for each target. Also thanks to Chris for clarifying through all the discussions that this is indeed the approach he was looking for. That said, there are likely still rough spots. Further review much appreciated. llvm-svn: 146466
* LLVMBuild: Introduce a common section which currently has a list of theDaniel Dunbar2011-12-121-0/+3
| | | | | | | | | | | subdirectories to traverse into. - Originally I wanted to avoid this and just autoscan, but this has one key flaw in that new subdirectories can not automatically trigger a rerun of the llvm-build tool. This is particularly a pain when switching back and forth between trees where one has added a subdirectory, as the dependencies will tend to be wrong. This will also eliminates FIXME implicitly. llvm-svn: 146436
* LLVMBuild: Remove trailing newline, which irked me.Daniel Dunbar2011-12-124-4/+0
| | | | llvm-svn: 146409
* Make CR spill and restore use a reserved register. These operations cannot ↵Hal Finkel2011-12-101-10/+18
| | | | | | use the register scavenger because the scavenger can only scavenge one register and frame-index elimination may have already grabbed it. llvm-svn: 146318
* Teach SelectionDAG to match more calls to libm functions onto existing ↵Owen Anderson2011-12-081-0/+7
| | | | | | SDNodes. Mark these nodes as illegal by default, unless the target declares otherwise. llvm-svn: 146171
* MTCTR needs to be glued to BCTR so that CTR is not marked dead in MTCTR ↵Hal Finkel2011-12-081-1/+1
| | | | | | (another find by -verify-machineinstrs) llvm-svn: 146137
* Add bundle aware API for querying instruction properties and switch the codeEvan Cheng2011-12-072-3/+3
| | | | | | | | | | | | | | generator to it. For non-bundle instructions, these behave exactly the same as the MC layer API. For properties like mayLoad / mayStore, look into the bundle and if any of the bundled instructions has the property it would return true. For properties like isPredicable, only return true if *all* of the bundled instructions have the property. For properties like canFoldAsLoad, isCompare, conservatively return false for bundles. llvm-svn: 146026
* make CR spill and restore 64-bit clean (no functional change), and fix some ↵Hal Finkel2011-12-076-12/+39
| | | | | | other problems found with -verify-machineinstrs llvm-svn: 146024
* make base register selection used in eliminateFrameIndex 64-bit cleanHal Finkel2011-12-071-8/+13
| | | | llvm-svn: 146023
* set mayStore and mayLoad on CR pseudosHal Finkel2011-12-071-2/+4
| | | | llvm-svn: 146022
* 64-bit LR8 load should use X11 not R11Hal Finkel2011-12-071-3/+3
| | | | llvm-svn: 146021
* add RESTORE_CR and support CR unspillsHal Finkel2011-12-065-28/+89
| | | | llvm-svn: 145961
* remove old FIXMEHal Finkel2011-12-061-1/+0
| | | | llvm-svn: 145960
* MipsAsmBackend.cpp, PPCAsmBackend.cpp: Fix -Asserts build to appease msvc.NAKAMURA Takumi2011-12-061-0/+1
| | | | llvm-svn: 145894
* Move target-specific logic out of generic MCAssembler.Jim Grosbach2011-12-061-0/+9
| | | | | | | | Whether a fixup needs relaxation for the associated instruction is a target-specific function, as the FIXME indicated. Create a hook for that and use it. llvm-svn: 145881
* enable PPC register scavenging by default (update tests and remove some FIXMEs)Hal Finkel2011-12-053-17/+13
| | | | llvm-svn: 145819
* don't include CR bit subregs in callee-saved listHal Finkel2011-12-051-16/+0
| | | | llvm-svn: 145818
* add register pressure for CR regsHal Finkel2011-12-051-0/+2
| | | | llvm-svn: 145816
* Move global variables in TargetMachine into new TargetOptions class. As an APINick Lewycky2011-12-026-24/+38
| | | | | | | | | | | | change, now you need a TargetOptions object to create a TargetMachine. Clang patch to follow. One small functionality change in PTX. PTX had commented out the machine verifier parts in their copy of printAndVerify. That now calls the version in LLVMTargetMachine. Users of PTX who need verification disabled should rely on not passing the command-line flag to enable it. llvm-svn: 145714
* remove unneeded FIXME commentHal Finkel2011-12-021-1/+0
| | | | llvm-svn: 145679
* update PPC 940 hazard rec. to function in postRA modeHal Finkel2011-12-026-142/+93
| | | | llvm-svn: 145676
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