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* Convert 2 more uses to shouldAssumeDSOLocal(). NFC.Rafael Espindola2016-06-282-4/+4
| | | | llvm-svn: 274009
* NFC. Fix popular typo in comment 'deferencing' --> 'dereferencing'.Nick Lewycky2016-06-281-6/+6
| | | | | | Bonus changes, * placement in X86ISelLowering and 'exerce' -> 'exercise' in test. llvm-svn: 273984
* Move shouldAssumeDSOLocal to Target.Rafael Espindola2016-06-272-4/+3
| | | | | | Should fix the shared library build. llvm-svn: 273958
* Refactor duplicated condition.Rafael Espindola2016-06-271-4/+3
| | | | llvm-svn: 273900
* Move isPositionIndependent up to AsmPrinter.Rafael Espindola2016-06-271-3/+3
| | | | | | Use it in ppc too. llvm-svn: 273877
* Use the isPositionIndependent predicate. NFC.Rafael Espindola2016-06-271-4/+2
| | | | llvm-svn: 273875
* Simplify getLabelAccessInfo.Rafael Espindola2016-06-271-24/+19
| | | | | | It now takes a IsPIC flag instead of computing and returning it. llvm-svn: 273871
* Use existing predicate. NFC.Rafael Espindola2016-06-241-5/+1
| | | | | | This doesn't handle ELF, but neither did the previous code. llvm-svn: 273677
* Merge two identical if branches. NFC.Rafael Espindola2016-06-241-14/+11
| | | | llvm-svn: 273674
* Merge two identical if branches. NFC.Rafael Espindola2016-06-241-11/+3
| | | | llvm-svn: 273673
* clang-format a region. NFC.Rafael Espindola2016-06-241-4/+4
| | | | llvm-svn: 273672
* Refactor to use shouldAssumeDSOLocal. NFC.Rafael Espindola2016-06-231-10/+14
| | | | llvm-svn: 273612
* Refactor duplicated code. NFC.Rafael Espindola2016-06-231-20/+17
| | | | llvm-svn: 273595
* Use C++ comments for large block comment.Eric Christopher2016-06-231-16/+17
| | | | llvm-svn: 273526
* Use shouldAssumeDSOLocal.Rafael Espindola2016-06-221-5/+5
| | | | | | With this it handle -fPIE. llvm-svn: 273499
* Extract a few variables to make 'if' smaller. NFC.Rafael Espindola2016-06-221-7/+8
| | | | llvm-svn: 273497
* [SDAG] Remove FixedArgs parameter from CallLoweringInfo::setCalleeKrzysztof Parzyszek2016-06-221-1/+1
| | | | | | | | | | | The setCallee function will set the number of fixed arguments based on the size of the argument list. The FixedArgs parameter was often explicitly set to 0, leading to a lack of consistent value for non- vararg functions. Differential Revision: http://reviews.llvm.org/D20376 llvm-svn: 273403
* Add back some dead code.Rafael Espindola2016-06-211-0/+14
| | | | | | | It was there just to avoid warnings. Add a LLVM_ATTRIBUTE_UNUSED attribute so that it doesn't produce warnings with gcc 6. llvm-svn: 273308
* Delete some dead code.Rafael Espindola2016-06-211-14/+0
| | | | | | Found by gcc 6. llvm-svn: 273303
* Replace silly uses of 'signed' with 'int'David Majnemer2016-06-211-1/+1
| | | | llvm-svn: 273244
* Reformat blank lines.NAKAMURA Takumi2016-06-202-3/+1
| | | | llvm-svn: 273131
* Trailing whitespace.NAKAMURA Takumi2016-06-201-3/+3
| | | | llvm-svn: 273130
* Untabify.NAKAMURA Takumi2016-06-202-8/+8
| | | | llvm-svn: 273129
* [Codegen] Change PICLevel.Davide Italiano2016-06-173-6/+6
| | | | | | | | | We convert `Default` to `NotPIC` so that target independent code can reason about this correctly. Differential Revision: http://reviews.llvm.org/D21394 llvm-svn: 273024
* Refactor and cleanup Assembly Parsing / LexingNirav Dave2016-06-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Recommiting after fixing non-atomic insert to front of SmallVector in MCAsmLexer.h Add explicit Comment Token in Assembly Lexing for future support for outputting explicit comments from inline assembly. As part of this, CPPHash Directives are now explicitly distinguished from Hash line comments in Lexer. Line comments are recorded as EndOfStatement tokens, not Comment tokens to simplify compatibility with current TargetParsers. This slightly complicates comment output. This remove all lexing tasks out of the parser, does minor cleanup to remove extraneous newlines Asm Output, and some improvements white space handling. Reviewers: rtrieu, dwmw2, rnk Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D20009 llvm-svn: 273007
* [PPC] Strength-reduce SmallVectors into arrays.Benjamin Kramer2016-06-171-60/+36
| | | | | | No functionality change intended. llvm-svn: 272999
* Revert "Refactor and cleanup Assembly Parsing / Lexing"Nirav Dave2016-06-161-1/+1
| | | | | | | | Reverting for unexpected crashes on various platforms. This reverts commit r272953. llvm-svn: 272957
* Refactor and cleanup Assembly Parsing / LexingNirav Dave2016-06-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | Add explicit Comment Token in Assembly Lexing for future support for outputting explicit comments from inline assembly. As part of this, CPPHash Directives are now explicitly distinguished from Hash line comments in Lexer. Line comments are recorded as EndOfStatement tokens, not Comment tokens to simplify compatibility with current TargetParsers. This slightly complicates comment output. This remove all lexing tasks out of the parser, does minor cleanup to remove extraneous newlines Asm Output, and some improvements white space handling. Reviewers: rtrieu, dwmw2, rnk Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D20009 llvm-svn: 272953
* Tidy the asm parser: 80-col, whitespace.Eric Christopher2016-06-161-8/+14
| | | | llvm-svn: 272861
* Run clang-tidy's performance-unnecessary-copy-initialization over LLVM.Benjamin Kramer2016-06-121-1/+1
| | | | | | No functionality change intended. llvm-svn: 272516
* Pass DebugLoc and SDLoc by const ref.Benjamin Kramer2016-06-125-280/+222
| | | | | | | | This used to be free, copying and moving DebugLocs became expensive after the metadata rewrite. Passing by reference eliminates a ton of track/untrack operations. No functionality change intended. llvm-svn: 272512
* Add aliases for mfvrsave/mtvrsave.Eric Christopher2016-06-091-0/+4
| | | | | | | Update a test as we're now going to emit it for easier reading of generated assembly as well. llvm-svn: 272339
* [PowerPC] Support multiple return values with fast iselUlrich Weigand2016-06-071-1/+1
| | | | | | | | | | | | | | | Using an LLVM IR aggregate return value type containing three or more integer values causes an abort in the fast isel pass. This patch adds two more registers to RetCC_PPC64_ELF_FIS to allow returning up to four integers with fast isel, just the same as is currently supported with regular isel (RetCC_PPC). This is needed for Swift and (possibly) other non-clang frontends. Fixes PR26190. llvm-svn: 272005
* Remove bogus initialization of the PPC and Hexagon SelectionDAGISelChandler Carruth2016-06-031-18/+1
| | | | | | | | | | | | | | | | | subclasses. These are not passes proper. We don't support registering them, they can't be constructed with default arguments, and the ID is actually in a base class. Only these two targets even had any boiler plate to try to do this, and it had to be munged out of the INITIALIZE_PASS macros to work. What's worse, the boiler plate has rotted and the "name" of the pass is actually the description string now!!! =/ All of this is completely unnecessary. No other target bothers, and nothing breaks if you don't initialize them because CodeGen has an entirely separate initialization path that is somewhat more durable than relying on the implicit initialization the way the 'opt' tool does for registered passes. llvm-svn: 271650
* [PPC64] Fix SUBFC8 Defs listKeno Fischer2016-06-012-2/+4
| | | | | | | | | | | | | Fix PR27943 "Bad machine code: Using an undefined physical register". SUBFC8 implicitly defines the CR0 register, but this was omitted in the instruction definition. Patch by Jameson Nash <jameson@juliacomputing.com> Reviewers: hfinkel Differential Revision: http://reviews.llvm.org/D20802 llvm-svn: 271425
* Avoid some copies by using const references.Benjamin Kramer2016-05-271-1/+1
| | | | | | | clang-tidy's performance-unnecessary-copy-initialization with some manual fixes. No functional changes intended. llvm-svn: 270988
* SDAG: Implement Select instead of SelectImpl in PPCDAGToDAGISelJustin Bogner2016-05-201-151/+209
| | | | | | | | | | | - Where we were returning a node before, call ReplaceNode instead. - Where we would return null to fall back to another selector, rename the method to try* and return a bool for success. - Where we were calling SelectNodeTo, just return afterwards. Part of llvm.org/pr26808. llvm-svn: 270283
* Simplify handling of hidden stubs on PowerPC.Rafael Espindola2016-05-202-25/+4
| | | | | | | We now handle them just like non hidden ones. This was already the case on x86 (r207518) and arm (r207517). llvm-svn: 270205
* Delete Reloc::Default.Rafael Espindola2016-05-183-15/+23
| | | | | | | | | | | | Having an enum member named Default is quite confusing: Is it distinct from the others? This patch removes that member and instead uses Optional<Reloc> in places where we have a user input that still hasn't been maped to the default value, which is now clear has no be one of the remaining 3 options. llvm-svn: 269988
* Trivial cleanups.Rafael Espindola2016-05-181-3/+3
| | | | | | | This just clang formats and cleans comments in an area I am about to post a patch for review. llvm-svn: 269946
* [PowerPC] Fix a DAG replacement bug in PPCTargetLowering::DAGCombineExtBoolTruncHal Finkel2016-05-121-10/+19
| | | | | | | | | | | | | | | While promoting nodes in PPCTargetLowering::DAGCombineExtBoolTrunc, it is possible for one of the nodes to be replaced by another. To make sure we do not visit the deleted nodes, and to make sure we visit the replacement nodes, use a list of HandleSDNodes to track the to-be-promoted nodes during the promotion process. The same fix has been applied to the analogous code in PPCTargetLowering::DAGCombineTruncBoolExt. Fixes PR26985. llvm-svn: 269272
* CodeGen: Move TargetPassConfig from Passes.h to an own header; NFCMatthias Braun2016-05-101-0/+1
| | | | | | | | Many files include Passes.h but only a fraction needs to know about the TargetPassConfig class. Move it into an own header. Also rename Passes.cpp to TargetPassConfig.cpp while we are at it. llvm-svn: 269011
* [Power9] Add support for -mcpu=pwr9 in the back endNemanja Ivanovic2016-05-098-6/+26
| | | | | | | | | This patch corresponds to review: http://reviews.llvm.org/D19683 Simply adds the bits for being able to specify -mcpu=pwr9 to the back end. llvm-svn: 268950
* [PowerPC] fix register alignment for long double typeStrahinja Petrovic2016-05-096-4/+101
| | | | | | | | | This patch fixes register alignment for long double type in soft float mode. Before this patch alignment was 8 and this patch changes it to 4. Differential Revision: http://reviews.llvm.org/D18034 llvm-svn: 268909
* SDAG: Rename Select->SelectImpl and repurpose Select as returning voidJustin Bogner2016-05-051-4/+3
| | | | | | | | | | | | | | This is a step towards removing the rampant undefined behaviour in SelectionDAG, which is a part of llvm.org/PR26808. We rename SelectionDAGISel::Select to SelectImpl and update targets to match, and then change Select to return void and consolidate the sketchy behaviour we're trying to get away from there. Next, we'll update backends to implement `void Select(...)` instead of SelectImpl and eventually drop the base Select implementation. llvm-svn: 268693
* [PowerPC] Generate VSX version of splat wordNemanja Ivanovic2016-05-045-7/+37
| | | | | | | | | | This patch corresponds to review: http://reviews.llvm.org/D18592 It allows the PPC back end to generate the xxspltw instruction where we previously only emitted vspltw. llvm-svn: 268516
* [PowerPC/QPX] Fix the load/splat peephole with overlapping readsHal Finkel2016-04-301-1/+9
| | | | | | | | | | | If, in between the splat and the load (which does an implicit splat), there is a read of the splat register, then that register must have another earlier definition. In that case, we can't replace the load's destination register with the splat's destination register. Unfortunately, I don't have a small or non-fragile test case. llvm-svn: 268152
* [PPC] Enable shuffling of VSX vectorsGuozhi Wei2016-04-291-4/+2
| | | | | | This patch fixes PR27078 by enabling shuffling of vectors if VSX is available. llvm-svn: 268064
* LiveIntervalAnalysis: Remove LiveVariables requirementMatthias Braun2016-04-281-1/+8
| | | | | | | | | | | | This requirement was a huge hack to keep LiveVariables alive because it was optionally used by TwoAddressInstructionPass and PHIElimination. However we have AnalysisUsage::addUsedIfAvailable() which we can use in those passes. This re-applies r260806 with LiveVariables manually added to PowerPC to hopefully not break the stage 2 bots this time. llvm-svn: 267954
* [PowerPC] Fix the EH_SjLj_Setup pseudo.Marcin Koscielnicki2016-04-282-1/+6
| | | | | | | | | | | | | | | | | | | This instruction is just a control flow marker - it should not actually exist in the object file. Unfortunately, nothing catches it before it gets to AsmPrinter. If integrated assembler is used, it's considered to be a normal 4-byte instruction, and emitted as an all-0 word, crashing the program. With external assembler, a comment is emitted. Fixed by setting Size to 0 and handling it in MCCodeEmitter - this means the comment will still be emitted if integrated assembler is not used. This broke an ASan test, which has been disabled for a long time as a result (see the discussion on D19657). We can reenable it once this lands. llvm-svn: 267943
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