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* Remove isSS argument from CreateFixedObject. Fixed objects cannot be spill ↵Evan Cheng2010-07-032-19/+13
| | | | | | slots so it's always false. llvm-svn: 107550
* Remove initialized but otherwise unused variables.Duncan Sands2010-06-291-1/+0
| | | | llvm-svn: 107127
* The hasMemory argument is irrelevant to how the argumentDale Johannesen2010-06-252-9/+3
| | | | | | | | | for an "i" constraint should get lowered; PR 6309. While this argument was passed around a lot, this is the only place it was used, so it goes away from a lot of other places. llvm-svn: 106893
* Eliminate unnecessary uses of getZExtValue().Dan Gohman2010-06-181-3/+3
| | | | llvm-svn: 106279
* Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). ThisStuart Hastings2010-06-172-8/+8
| | | | | | | | | | | | addresses a longstanding deficiency noted in many FIXMEs scattered across all the targets. This effectively moves the problem up one level, replacing eleven FIXMEs in the targets with eight FIXMEs in CodeGen, plus one path through FastISel where we actually supply a DebugLoc, fixing Radar 7421831. llvm-svn: 106243
* Reapply r105521, this time appending "LLU" to 64 bitBruno Cardoso Lopes2010-06-081-1/+1
| | | | | | immediates to avoid breaking the build. llvm-svn: 105652
* revert r105521, which is breaking the buildbots with stuff like this:Chris Lattner2010-06-051-1/+1
| | | | | | | | | | | | | | In file included from X86InstrInfo.cpp:16: X86GenInstrInfo.inc:2789: error: integer constant is too large for 'long' type X86GenInstrInfo.inc:2790: error: integer constant is too large for 'long' type X86GenInstrInfo.inc:2792: error: integer constant is too large for 'long' type X86GenInstrInfo.inc:2793: error: integer constant is too large for 'long' type X86GenInstrInfo.inc:2808: error: integer constant is too large for 'long' type X86GenInstrInfo.inc:2809: error: integer constant is too large for 'long' type X86GenInstrInfo.inc:2816: error: integer constant is too large for 'long' type X86GenInstrInfo.inc:2817: error: integer constant is too large for 'long' type llvm-svn: 105524
* Initial AVX support for some instructions. No patterns matchedBruno Cardoso Lopes2010-06-051-1/+1
| | | | | | yet, only assembly encoding support. llvm-svn: 105521
* Remove the TargetRegisterClass member from CalleeSavedInfoRafael Espindola2010-06-021-14/+12
| | | | llvm-svn: 105344
* cleanupRafael Espindola2010-06-022-137/+0
| | | | llvm-svn: 105322
* Replace the SubRegSet tablegen class with a less error-prone mechanism.Jakob Stoklund Olesen2010-05-261-19/+11
| | | | | | | | | | | | | | | | A Register with subregisters must also provide SubRegIndices for adressing the subregisters. TableGen automatically inherits indices for sub-subregisters to minimize typing. CompositeIndices may be specified for the weirder cases such as the XMM sub_sd index that returns the same register, and ARM NEON Q registers where both D subregs have ssub_0 and ssub_1 sub-subregs. It is now required that all subregisters are named by an index, and a future patch will also require inherited subregisters to be named. This is necessary to allow composite subregister indices to be reduced to a single index. llvm-svn: 104704
* Revert "Replace the SubRegSet tablegen class with a less error-prone mechanism."Jakob Stoklund Olesen2010-05-261-11/+19
| | | | | | This reverts commit 104654. llvm-svn: 104660
* Replace the SubRegSet tablegen class with a less error-prone mechanism.Jakob Stoklund Olesen2010-05-261-19/+11
| | | | | | | | | | | | | | | | A Register with subregisters must also provide SubRegIndices for adressing the subregisters. TableGen automatically inherits indices for sub-subregisters to minimize typing. CompositeIndices may be specified for the weirder cases such as the XMM sub_sd index that returns the same register, and ARM NEON Q registers where both D subregs have ssub_0 and ssub_1 sub-subregs. It is now required that all subregisters are named by an index, and a future patch will also require inherited subregisters to be named. This is necessary to allow composite subregister indices to be reduced to a single index. llvm-svn: 104654
* Remove NumberHack entirely.Jakob Stoklund Olesen2010-05-251-4/+4
| | | | | | | SubRegIndex instances are now numbered uniquely the same way Register instances are - in lexicographical order by name. llvm-svn: 104627
* Switch SubRegSet to using symbolic SubRegIndicesJakob Stoklund Olesen2010-05-241-8/+12
| | | | llvm-svn: 104571
* Replace the tablegen RegisterClass field SubRegClassList with an alist-like dataJakob Stoklund Olesen2010-05-241-1/+1
| | | | | | | | | | | structure that represents a mapping without any dependencies on SubRegIndex numbering. This brings us closer to being able to remove the explicit SubRegIndex numbering, and it is now possible to specify any mapping without inventing *_INVALID register classes. llvm-svn: 104563
* Add SubRegIndex defs to PowerPC. It looks like the CR subregister indices areJakob Stoklund Olesen2010-05-241-0/+7
| | | | | | never used. llvm-svn: 104517
* Implement @llvm.returnaddress. rdar://8015977.Evan Cheng2010-05-221-1/+4
| | | | llvm-svn: 104421
* The PPC MFCR instruction implicitly uses all 8 of the CRDale Johannesen2010-05-205-21/+24
| | | | | | | | | | | | | | registers. Currently it is not so marked, which leads to VCMPEQ instructions that feed into it getting deleted. If it is so marked, local RA complains about this sequence: vreg = MCRF CR0 MFCR <kill of whatever preg got assigned to vreg> All current uses of this instruction are only interested in one of the 8 CR registers, so redefine MFCR to be a normal unary instruction with a CR input (which is emitted only as a comment). That avoids all problems. 7739628. llvm-svn: 104238
* Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe whatBill Wendling2010-05-141-1/+1
| | | | | | | | | the variable actually tracks. N.B., several back-ends are using "HasCalls" as being synonymous for something that adjusts the stack. This isn't 100% correct and should be looked into. llvm-svn: 103802
* Set isTerminator on TRAP instructions.Dan Gohman2010-05-141-1/+1
| | | | llvm-svn: 103778
* Don't use isBarrier for the PowerPC sync instruction. isBarrier is forDan Gohman2010-05-141-1/+0
| | | | | | control barriers, not memory ordering barriers. llvm-svn: 103777
* Implement a bunch more TargetSelectionDAGInfo infrastructure.Dan Gohman2010-05-114-4/+13
| | | | | | | | Move EmitTargetCodeForMemcpy, EmitTargetCodeForMemset, and EmitTargetCodeForMemmove out of TargetLowering and into SelectionDAGInfo to exercise this. llvm-svn: 103481
* Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that itDan Gohman2010-05-062-5/+4
| | | | | | doesn't have to guess. llvm-svn: 103194
* Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.Evan Cheng2010-05-062-4/+8
| | | | llvm-svn: 103193
* No-ops emitted for scheduling don't correspond with anything in theDan Gohman2010-05-051-2/+0
| | | | | | user's source, so don't arbitrarily assign them a debug location. llvm-svn: 103121
* Implement builtin_return_address(x) and builtin_frame_address(x) Dale Johannesen2010-05-031-23/+34
| | | | | | on PPC for x!=0. 7624113. llvm-svn: 102972
* Get rid of the EdgeMapping map. Instead, just check for BasicBlockDan Gohman2010-05-012-9/+5
| | | | | | changes before doing phi lowering for switches. llvm-svn: 102809
* Make naked functions work on PPC.Dale Johannesen2010-04-291-1/+7
| | | | llvm-svn: 102657
* Frame index can be negative.Evan Cheng2010-04-292-2/+2
| | | | llvm-svn: 102577
* Use MachineOperand::is* predicates.Devang Patel2010-04-271-3/+3
| | | | llvm-svn: 102472
* Add PPC AsmPrinter handling for target-specific form ofDale Johannesen2010-04-261-0/+18
| | | | | | DBG_VALUE, and a cautionary comment. llvm-svn: 102371
* Add PPC specific emitFrameIndexDebugValue.Evan Cheng2010-04-262-0/+16
| | | | llvm-svn: 102325
* Implement -disable-non-leaf-fp-elim which disable frame pointer eliminationEvan Cheng2010-04-212-2/+2
| | | | | | | optimization for non-leaf functions. This will be hooked up to gcc's -momit-leaf-frame-pointer option. rdar://7886181 llvm-svn: 101984
* Add more const qualifiers on TargetMachine and friends.Dan Gohman2010-04-211-2/+2
| | | | llvm-svn: 101977
* Make processor FUs unique for given itinerary. This extends the limit of 32Anton Korobeynikov2010-04-185-7/+11
| | | | | | | FU per CPU arch to 32 per intinerary allowing precise modelling of quite complex pipelines in the future. llvm-svn: 101754
* Add const qualifiers to TargetLoweringObjectFile usage.Dan Gohman2010-04-171-6/+6
| | | | llvm-svn: 101640
* Use const qualifiers with TargetLowering. This eliminates severalDan Gohman2010-04-174-80/+87
| | | | | | | | | | | | | const_casts, and it reinforces the design of the Target classes being immutable. SelectionDAGISel::IsLegalToFold is now a static member function, because PIC16 uses it in an unconventional way. There is more room for API cleanup here. And PIC16's AsmPrinter no longer uses TargetLowering. llvm-svn: 101635
* Move per-function state out of TargetLowering subclasses and intoDan Gohman2010-04-173-44/+64
| | | | | | MachineFunctionInfo subclasses. llvm-svn: 101634
* Name these stub files consistently with the SPU and PPC targets' conventions.Chandler Carruth2010-04-172-9/+9
| | | | | | | Also rename the classes appropriately. The CMake build already used these names. llvm-svn: 101631
* Add skeleton target-specific SelectionDAGInfo files.Dan Gohman2010-04-163-0/+52
| | | | llvm-svn: 101564
* Eliminate an unnecessary SelectionDAG dependency in getOptimalMemOpType.Dan Gohman2010-04-162-6/+6
| | | | llvm-svn: 101531
* EnablePPC64RS and EnablePPC32RS are used in multiple files, so theyDan Gohman2010-04-152-4/+11
| | | | | | can't be static. llvm-svn: 101377
* Fix a bunch of namespace polution.Dan Gohman2010-04-151-8/+8
| | | | llvm-svn: 101376
* Add const qualifiers to CodeGen's use of LLVM IR constructs.Dan Gohman2010-04-153-9/+9
| | | | llvm-svn: 101334
* remove the TargetLoweringObjectFileMachO::getMachoSectionChris Lattner2010-04-081-10/+10
| | | | | | api and update clients to use MCContext instead. llvm-svn: 100808
* Avoid using f64 to lower memcpy from constant string. It's cheaper to use ↵Evan Cheng2010-04-082-7/+12
| | | | | | i32 store of immediates. llvm-svn: 100751
* add newlines at end of files.Chris Lattner2010-04-071-1/+1
| | | | llvm-svn: 100706
* Educate GetInstrSizeInBytes implementations thatDale Johannesen2010-04-071-0/+1
| | | | | | DBG_VALUE does not generate code. llvm-svn: 100681
* remove the MMI pointer from MachineFrameInfo.Chris Lattner2010-04-051-5/+5
| | | | llvm-svn: 100415
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